diff --git a/Changelog b/Changelog
index d7af186..717d7a5 100644
--- a/Changelog
+++ b/Changelog
@@ -1,4 +1,10 @@
-version 1.3.0-release (2022-7-27)
+version 1.3.1-rc.1 (2022-08-09)
+
+	- added encoding for movq mv
+
+	- added support for rdpmc
+
+version 1.3.0-release (2022-07-27)
 
 	- added support for multiple keywords ex: "jmp far word [rax]"
 	
diff --git a/Makefile.am b/Makefile.am
index e9d2d16..da3554c 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -131,6 +131,7 @@ TEST_TAP = \
 		test/tap/imul.tap \
 		test/tap/lea.tap \
 		test/tap/misc.tap \
+		test/tap/movq.tap \
 		test/tap/nasm_incompatible.tap \
 		test/tap/xor.tap
 
@@ -195,6 +196,7 @@ TEST_ASM = \
 		  test/negative_mem_disp.asm \
 		  test/new_instruction.asm \
 		  test/no_ptr.asm \
+		  test/no_operand.asm \
 		  test/nop.asm \
 		  test/not.asm \
 		  test/or.asm \
diff --git a/configure.ac b/configure.ac
index fa422e0..5519592 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2,7 +2,7 @@
 # Process this file with autoconf to produce a configure script.
 
 AC_PREREQ([2.69])
-AC_INIT([assemblyline],[1.3.0],[yval@cs.adelaide.edu.au])
+AC_INIT([assemblyline],[1.3.1-rc.1],[yval@cs.adelaide.edu.au])
 AC_CONFIG_HEADERS([config.h])
 AC_CONFIG_SRCDIR([src/assemblyline.c])
 AC_CONFIG_AUX_DIR([build-aux])
diff --git a/src/enums.h b/src/enums.h
index ad4a29b..7d4d921 100644
--- a/src/enums.h
+++ b/src/enums.h
@@ -216,6 +216,7 @@ typedef enum {
   push,
   pxor,
   rcr,
+  rdpmc,
   rdtsc,
   rdtscp,
   ret,
diff --git a/src/instructions.c b/src/instructions.c
index 4865468..d0d800e 100644
--- a/src/instructions.c
+++ b/src/instructions.c
@@ -160,8 +160,9 @@ const struct instr_table INSTR_TABLE[] = {
     {"movntdqa",    movntdqa,    {NA, vm},   RM,  VECTOR,         NA,  NA,  6,  {0x66, REX, 0x0f, 0x38, 0x2a, REG}},
     {"movntq",      movntq,      {NA, mr},   MR,  VECTOR,         NA,  NA,  4,  {REX, 0x0f, 0xe7, REG}},
     {"movq",        movq,        {NA, vr},   RM,  VECTOR,         NA,  NA,  5,  {0x66, REX, 0x0f, 0x6e, REG}},
-    {{'\0'},        movq,        {vm, vv},   RM,  VECTOR,         NA,  NA,  5,  {0xf3, REX, 0x0f, 0x7e, REG}},
+    {{'\0'},        movq,        {NA, mv},   MR,  VECTOR,         NA,  NA,  5,  {0x66, REX, 0x0f, 0xd6, REG}},
     {{'\0'},        movq,        {NA, rv},   MR,  VECTOR,         NA,  NA,  5,  {0x66, REX, 0x0f, 0x7e, REG}},
+    {{'\0'},        movq,        {vm, vv},   RM,  VECTOR,         NA,  NA,  5,  {0xf3, REX, 0x0f, 0x7e, REG}},
     {"movzx",       movzx,       {rr, rm},   RM,  OTHER,          NA,  NA,  4,  {REX, 0x0f, 0xb6, REG}},
     {"mulpd",       mulpd,       {NA, vv},   RM,  VECTOR,         NA,  NA,  5,  {0x66, REX, 0x0f, 0x59, REG}},
     {"mulx",        mulx,        {rrr, rrm}, RVM, VECTOR_EXT,     NA,  NA,  3,  {VEX(NDD,LZ,XF2,X0F38,W0_W1), 0xf6, REG}},
@@ -231,6 +232,7 @@ const struct instr_table INSTR_TABLE[] = {
     {{'\0'},        push,        {NA, NA},   I,   PAD_ALWAYS,     NA,  NA,  1,  {0x68}},
     {"rcr",         rcr,         {mi, ri},   M,   SHIFT,          1,   3,   4,  {REX, 0xd0, REG, ib}},
     {{'\0'},        rcr,         {NA, NA},   M,   SHIFT,          1,   2,   4,  {REX, 0xc1, REG, ib}},
+    {"rdpmc",       rdpmc,       {n,  n},    NA,  OTHER,          NA,  NA,  2,  {0x0f, 0x33}},
     {"rdtsc",       rdtsc,       {n,  n},    NA,  OTHER,          NA,  NA,  2,  {0x0f, 0x31}},
     {"rdtscp",      rdtscp,      {n,  n},    NA,  OTHER,          NA,  NA,  3,  {0x0f, 0x01, 0xf9}},
     {"ret",         ret,         {n,  n},    NA,  CONTROL_FLOW,   NA,  NA,  1,  {0xc3}},
diff --git a/test/no_operand.asm b/test/no_operand.asm
new file mode 100644
index 0000000..00ef39c
--- /dev/null
+++ b/test/no_operand.asm
@@ -0,0 +1,12 @@
+SECTION .text
+GLOBAL test
+test:
+sfence
+lfence
+mfence
+xend
+rdpmc
+rdtsc
+rdtscp
+clc
+cpuid
\ No newline at end of file
diff --git a/test/tap/movq.tap b/test/tap/movq.tap
new file mode 100644
index 0000000..c66ee75
--- /dev/null
+++ b/test/tap/movq.tap
@@ -0,0 +1,31 @@
+movq rax, xmm2
+
+movq xmm1, r9
+movq xmm2, xmm1
+movq xmm0, rax
+movq xmm0, rcx
+movq xmm0, rdx
+movq xmm0, rbx
+movq xmm0, rsp
+movq xmm0, rbp
+movq xmm0, rsi
+movq xmm0, rdi
+movq xmm0, r8
+movq xmm0, r9
+movq xmm0, r10
+movq xmm0, r11
+movq xmm0, r12
+movq xmm0, r13
+movq xmm0, r14
+movq xmm0, r15
+
+movq xmm1, rcx
+movq xmm2, rdx
+
+movq [rsp], xmm15
+movq xmm15, [rsp]
+
+movq xmm0, xmm15
+
+movq [rsp + 0x08], xmm15
+movq xmm15, [rsp + 0x10]