-
Notifications
You must be signed in to change notification settings - Fork 85
/
backend_ag32_cvScript.sml
167 lines (132 loc) · 5.32 KB
/
backend_ag32_cvScript.sml
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
(*
Translate ag32-specialised functions to cv equations.
*)
open preamble cv_transLib cv_stdTheory backend_cvTheory backend_32_cvTheory;
open backend_ag32Theory ag32Theory ag32_targetTheory to_data_cvTheory;
open export_ag32Theory ag32_configTheory;
val _ = new_theory "backend_ag32_cv";
(*---------------------------------------------------------------------------*
Translation of instruction encoder
*---------------------------------------------------------------------------*)
Theorem IN_INSERT[cv_inline,local] = IN_INSERT;
Theorem NOT_IN_EMPTY[cv_inline,local] = NOT_IN_EMPTY;
val _ = cv_trans ag32Theory.funcT2num_thm;
val _ = cv_trans ag32Theory.shiftT2num_thm;
val _ = cv_trans ag32Theory.ri2bits_def;
val _ = cv_trans ag32Theory.enc_def;
val _ = cv_trans ag32Theory.encShift_def;
val _ = cv_trans ag32Theory.Encode_def;
val _ = cv_trans ag32_targetTheory.ag32_encode1_def;
val _ = cv_trans ag32_targetTheory.ag32_constant_def;
val _ = cv_trans ag32_targetTheory.ag32_jump_constant_def;
val _ = cv_trans ag32_targetTheory.ag32_cmp_def;
val _ = cv_trans ag32_targetTheory.ag32_bop_def;
val _ = cv_trans ag32_targetTheory.ag32_sh_def;
val _ = cv_auto_trans (ag32_targetTheory.ag32_encode_def
|> SRULE [LIST_BIND_def,FUN_EQ_THM]);
val _ = cv_trans ag32_targetTheory.ag32_enc_def;
(*---------------------------------------------------------------------------*
Remaining ag32-specific functions
*---------------------------------------------------------------------------*)
Triviality fp_ok_false:
fp_ok_ag32 v = F
Proof
Cases_on ‘v’ \\ gvs [fp_ok_ag32_def |> SRULE [fp_reg_ok_ag32_def]]
QED
val _ = cv_auto_trans (inst_ok_ag32_def
|> SRULE [fp_ok_false,alignmentTheory.aligned_w2n,asmTheory.offset_ok_def,LET_THM]);
val _ = cv_auto_trans (asm_ok_ag32_def
|> SRULE [alignmentTheory.aligned_w2n,asmTheory.offset_ok_def,LET_THM]);
val _ = cv_auto_trans line_ok_light_ag32_def;
val _ = cv_auto_trans sec_ok_light_ag32_def;
val pre = cv_trans_pre enc_lines_again_ag32_def;
Theorem enc_lines_again_ag32_pre[cv_pre,local]:
∀labs ffis pos v0 v. enc_lines_again_ag32_pre labs ffis pos v0 v
Proof
Induct_on ‘v0’ \\ simp [Once pre]
QED
val pre = cv_trans_pre enc_secs_again_ag32_def;
Theorem enc_secs_again_ag32_pre[cv_pre,local]:
∀pos labs ffis v. enc_secs_again_ag32_pre pos labs ffis v
Proof
Induct_on ‘v’ \\ simp [Once pre]
QED
val pre = cv_auto_trans_pre remove_labels_loop_ag32_def;
Theorem remove_labels_loop_ag32_pre[cv_pre]:
∀clock pos init_labs ffis sec_list.
remove_labels_loop_ag32_pre clock pos init_labs ffis sec_list
Proof
Induct_on ‘clock’ \\ simp [Once pre]
QED
val _ = cv_trans enc_line_ag32_def;
val _ = cv_auto_trans enc_sec_ag32_def;
val _ = cv_auto_trans enc_sec_list_ag32_def;
val _ = cv_trans remove_labels_ag32_def;
val _ = cv_auto_trans compile_lab_ag32_def;
val _ = cv_trans lab_to_target_ag32_def;
val _ = cv_trans from_lab_ag32_def;
val _ = cv_trans (from_stack_ag32_def
|> SRULE [data_to_wordTheory.max_heap_limit_def,backend_commonTheory.word_shift_def]);
val _ = cv_auto_trans from_word_ag32_def;
val pre = cv_trans_pre get_forced_ag32_def;
Theorem get_forced_ag32_pre[cv_pre,local]:
∀v acc. get_forced_ag32_pre v acc
Proof
gen_tac \\ completeInduct_on ‘prog_size (K 0) v’
\\ rw [] \\ gvs [PULL_FORALL]
\\ simp [Once pre] \\ rw []
\\ gvs [] \\ last_x_assum $ irule
\\ gvs [wordLangTheory.prog_size_def]
QED
val _ = cv_trans word_alloc_inlogic_ag32_def;
val pre = cv_trans_pre inst_select_exp_ag32_def;
Theorem inst_select_exp_ag32_pre[cv_pre]:
∀v tar temp. inst_select_exp_ag32_pre tar temp v
Proof
gen_tac \\ completeInduct_on ‘exp_size (K 0) v’
\\ rw [] \\ gvs [PULL_FORALL]
\\ rw [] \\ simp [Once pre]
\\ rw [] \\ gvs []
\\ last_x_assum irule
\\ gvs [wordLangTheory.exp_size_def]
QED
val pre = cv_trans_pre inst_select_ag32_def;
Theorem inst_select_ag32_pre[cv_pre,local]:
∀v temp. inst_select_ag32_pre temp v
Proof
gen_tac \\ completeInduct_on ‘prog_size (K 0) v’
\\ rw [] \\ gvs [PULL_FORALL]
\\ simp [Once pre] \\ rw []
\\ first_x_assum irule \\ gvs [wordLangTheory.prog_size_def]
QED
val pre = each_inlogic_ag32_def |> cv_trans_pre;
Theorem each_inlogic_ag32_pre[cv_pre,local]:
∀v. each_inlogic_ag32_pre v
Proof
Induct \\ rw [] \\ simp [Once pre]
QED
val _ = cv_trans word_to_word_inlogic_ag32_def;
val _ = cv_trans from_word_0_ag32_def;
val _ = cv_trans (compile_0_ag32_def
|> SRULE [data_to_wordTheory.stubs_def,
backend_32_cvTheory.inline,
to_map_compile_part]);
val _ = cv_trans backend_ag32Theory.to_word_0_ag32_def;
val _ = cv_auto_trans backend_ag32Theory.to_livesets_0_ag32_def;
(* export *)
val _ = cv_auto_trans
(export_ag32Theory.ag32_export_def
|> REWRITE_RULE [to_words_line_word,
to_words_line_byte,
split16_eq_chunks16]);
(* main two translations below *)
val _ = cv_trans backend_ag32Theory.to_livesets_ag32_def;
val _ = cv_trans backend_ag32Theory.compile_cake_ag32_def;
(* lemma used by automation *)
Theorem set_asm_conf_ag32_backend_config:
set_asm_conf ag32_backend_config ag32_config = ag32_backend_config
Proof
irule backendTheory.set_asm_conf_id \\ EVAL_TAC
QED
val _ = Feedback.set_trace "TheoryPP.include_docs" 0;
val _ = export_theory();