- Synopsis
-
Broadcasts an instruction, that ensures that all preceding instructions retire earlier than this instruction and all subsequent instructions retire later than this instruction on all harts.
- Mnemonic
-
th.sync.s
- Encoding
{reg:[
{ bits: 7, name: 0xb, attr: ['custom-0, 32 bit'] },
{ bits: 5, name: 0x0 },
{ bits: 3, name: 0x0, attr: ['CMO'] },
{ bits: 5, name: 0x0 },
{ bits: 5, name: 0x19, attr: ['SYNC.S'] },
{ bits: 7, name: 0x00 },
]}
- Description
-
This instruction ensures that all preceding instructions retire earlier than this instruction and all subsequent instructions retire later than this instruction. The instruction is executing on all harts via broadcasting.
- Operation
msg := encode_out_of_order_barrier()
broadcast_to_all_harts(msg)- Permission
-
This instruction can be executed in all privilege levels.
- Exceptions
-
This instruction does not trigger any exceptions.
- Included in
| Extension |
|---|
XTheadSync ([xtheasync]) |