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xtheadfmemidx.adoc

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Indexed memory operations for floating-point registers (XTheadFMemIdx)

Frozen
The XTheadFMemIdx extension is stable.

The XTheadFMemIdx ISA extension provides indexed memory operations for floating-point registers.

The table below gives an overview of the instructions:

F D Mnemonic Instruction

Y

Y

th.flrd rd, rs1, rs2, imm2

[xtheadfmemidx-insns-flrd]

Y

Y

th.flrw rd, rs1, rs2, imm2

[xtheadfmemidx-insns-flrw]

N

Y

th.flurd rd, rs1, rs2, imm2

[xtheadfmemidx-insns-flurd]

N

Y

th.flurw rd, rs1, rs2, imm2

[xtheadfmemidx-insns-flurw]

Y

Y

th.fsrd rd, rs1, rs2, imm2

[xtheadfmemidx-insns-fsrd]

Y

Y

th.fsrw rd, rs1, rs2, imm2

[xtheadfmemidx-insns-flrw]

N

Y

th.fsurd rd, rs1, rs2, imm2

[xtheadfmemidx-insns-fsurd]

N

Y

th.fsurw rd, rs1, rs2, imm2

[xtheadfmemidx-insns-flurw]

All instructions are available for RV32 and RV64. Additionally at least the F extension needs to be available. In order to have all instructions available, the D extensions needs to be implemented.