add separation between PS and PL area

sim/hwdbg/DebuggerModuleTestingBRAM/test_DebuggerModuleTestingBRAM.py

@@ -131,14 +131,34 @@ def print_bram_content(dut):
     #
     sorted_list = sorted(mem_items, key=extract_number)
 
-    #
-    # Print the sorted list
-    #
-
     with open("bram_content_after_emulation.txt", "w") as file:
         file.write("Content of BRAM after emulation:\n")
         print("Content of BRAM after emulation:")
 
+        #
+        # The second half of the BRAM is used for PL to PS communication
+        #
+        address_of_ps_to_pl_communication = "mem_0"
+        address_of_ps_to_pl_communication_checksum1 = "mem_0"
+        address_of_ps_to_pl_communication_checksum2 = "mem_1"
+        address_of_ps_to_pl_communication_indicator1 = "mem_2"
+        address_of_ps_to_pl_communication_indicator2 = "mem_3"
+        address_of_ps_to_pl_communication_type_of_packet = "mem_4"
+        address_of_ps_to_pl_communication_requested_action_of_the_packet = "mem_5"
+        address_of_ps_to_pl_communication_start_of_data = "mem_6"
+
+        len_of_sorted_list_div_by_2 = int(len(sorted_list) / 2)
+        address_of_pl_to_ps_communication = "mem_" + str(len_of_sorted_list_div_by_2)
+        address_of_pl_to_ps_communication_checksum1 = "mem_" + str(len_of_sorted_list_div_by_2 + 0)
+        address_of_pl_to_ps_communication_checksum2 = "mem_" + str(len_of_sorted_list_div_by_2 + 1)
+        address_of_pl_to_ps_communication_indicator1 = "mem_" + str(len_of_sorted_list_div_by_2 + 2)
+        address_of_pl_to_ps_communication_indicator2 = "mem_" + str(len_of_sorted_list_div_by_2 + 3)
+        address_of_pl_to_ps_communication_type_of_packet = "mem_" + str(len_of_sorted_list_div_by_2 + 4)
+        address_of_pl_to_ps_communication_requested_action_of_the_packet = "mem_" + str(len_of_sorted_list_div_by_2 + 5)
+        address_of_pl_to_ps_communication_start_of_data = "mem_" + str(len_of_sorted_list_div_by_2 + 6)
+
+        print("Address of PL to PS communication: " + address_of_pl_to_ps_communication)
+
         for item in sorted_list:
             element = getattr(dut.dataOut_initRegMemFromFileModule, item)
 
@@ -165,6 +185,36 @@ def print_bram_content(dut):
             else:
                 final_string = item + ": " + hex_string
 
+            #
+            # Make a separation between PS and PL area
+            #
+            if item == address_of_ps_to_pl_communication:
+                file.write("\nPS to PL area:\n")
+                print("\nPS to PL area:")
+            elif item == address_of_pl_to_ps_communication:
+                file.write("\nPL to PS area:\n")
+                print("\nPL to PS area:")
+
+            if item == address_of_ps_to_pl_communication_checksum1 or \
+            item == address_of_ps_to_pl_communication_checksum2 or \
+            item == address_of_pl_to_ps_communication_checksum1 or \
+            item == address_of_pl_to_ps_communication_checksum2:
+                final_string = final_string + "   | Checksum"
+            elif item == address_of_ps_to_pl_communication_indicator1 or \
+            item == address_of_ps_to_pl_communication_indicator2 or \
+            item == address_of_pl_to_ps_communication_indicator1 or \
+            item == address_of_pl_to_ps_communication_indicator2:
+                final_string = final_string + "   | Indicator"
+            elif item == address_of_ps_to_pl_communication_type_of_packet or \
+            item == address_of_pl_to_ps_communication_type_of_packet:
+                final_string = final_string + "   | TypeOfThePacket"
+            elif item == address_of_ps_to_pl_communication_requested_action_of_the_packet or \
+            item == address_of_pl_to_ps_communication_requested_action_of_the_packet:
+                final_string = final_string + "   | RequestedActionOfThePacket"
+            elif item == address_of_ps_to_pl_communication_start_of_data or \
+            item == address_of_pl_to_ps_communication_start_of_data:
+                final_string = final_string + "   | Start of Optional Data"
+
             #
             # Print contents of BRAM
             #
@@ -178,7 +228,9 @@ def print_bram_content(dut):
 async def DebuggerModuleTestingBRAM_test(dut):
     """Test hwdbg module (with pre-defined BRAM)"""
 
+    #
     # Assert initial output is unknown
+    #
     assert LogicArray(dut.io_outputPin_0.value) == LogicArray("Z")
     assert LogicArray(dut.io_outputPin_1.value) == LogicArray("Z")
     assert LogicArray(dut.io_outputPin_2.value) == LogicArray("Z")
@@ -212,29 +264,42 @@ async def DebuggerModuleTestingBRAM_test(dut):
     assert LogicArray(dut.io_outputPin_30.value) == LogicArray("Z")
     assert LogicArray(dut.io_outputPin_31.value) == LogicArray("Z")
 
-    clock = Clock(dut.clock, 10, units="ns")  # Create a 10ns period clock on port clock
+    #
+    # Create a 10ns period clock on port clock
+    #
+    clock = Clock(dut.clock, 10, units="ns")
 
+    #
     # Start the clock. Start it low to avoid issues on the first RisingEdge
+    #
     cocotb.start_soon(clock.start(start_high=False))
 
     dut._log.info("Initialize and reset module")
 
+    #
     # Initial values
+    #
     dut.io_en.value = 0
     dut.io_plInSignal.value = 0
-
+
+    #
     # Reset DUT
+    #
     dut.reset.value = 1
     for _ in range(10):
         await RisingEdge(dut.clock)
     dut.reset.value = 0
 
     dut._log.info("Enabling an interrupting chip to receive commands from BRAM")
 
+    #
     # Enable chip
+    #
     dut.io_en.value = 1
 
+    #
     # Set initial input value to prevent it from floating
+    #
     dut.io_inputPin_0.value = 1
     dut.io_inputPin_1.value = 0
     dut.io_inputPin_2.value = 1
@@ -268,7 +333,9 @@ async def DebuggerModuleTestingBRAM_test(dut):
     dut.io_inputPin_30.value = 1
     dut.io_inputPin_31.value = 1
 
+    #
     # Tell the hwdbg to receive BRAM results
+    #
     dut.io_plInSignal.value = 1
     await RisingEdge(dut.clock)
     dut.io_plInSignal.value = 0
@@ -318,4 +385,3 @@ async def DebuggerModuleTestingBRAM_test(dut):
     # Check the final input on the next clock
     #
     await RisingEdge(dut.clock)
-

src/main/scala/hwdbg/communication/interpreter/interpreter.scala

@@ -142,7 +142,7 @@ class DebuggerPacketInterpreter(
           //
           // Set the response packet type
           //
-          regRequestedActionOfThePacketOutput := HwdbgResponseEnums.hwdbgResponsePinInformation.id.U
+          regRequestedActionOfThePacketOutput := HwdbgResponseEnums.hwdbgResponseVersion.id.U
 
           //
           // This action needs a response

src/main/scala/hwdbg/configs/configs.scala

@@ -92,7 +92,7 @@ object MemoryCommunicationConfigurations {
   //
   // Default number of bytes used in initialized SRAM memory
   //
-  val DEFAULT_CONFIGURATION_INITIALIZED_MEMORY_SIZE: Int = 8192 // 8 KB
+  val DEFAULT_CONFIGURATION_INITIALIZED_MEMORY_SIZE: Int = 8192 / 8 // 8 Kilobits
 
   //
   // Base address of PS to PL SRAM communication memory

src/main/scala/hwdbg/types/communication.scala

@@ -73,7 +73,7 @@ class DebuggerRemotePacket() extends Bundle {
  */
 object HwdbgActionEnums extends Enumeration {
 
-  val hwdbgActionSendVersion = Value(0)
+  val hwdbgActionSendVersion = Value(0x8555)
   val hwdbgActionSendPinInformation = Value(1)
   val hwdbgActionConfigureScriptBuffer = Value(2)
 
@@ -89,7 +89,7 @@ object HwdbgActionEnums extends Enumeration {
  */
 object HwdbgResponseEnums extends Enumeration {
 
-  val hwdbgResponseVersion = Value(0)
+  val hwdbgResponseVersion = Value(0x855585)
   val hwdbgResponsePinInformation = Value(1)
   val hwdbgResponseScriptBufferConfigurationResult = Value(2)
 

src/test/bram/send_version.hex.txt

@@ -3,65 +3,65 @@
 48595045 ; +0x8   | Indicator
 0d0e0f10 ; +0xc   | Indicator
 00000004 ; +0x10  | TypeOfThePacket - DEBUGGER_TO_DEBUGGEE_HARDWARE_LEVEL (0x4)
-00000000 ; +0x14  | RequestedActionOfThePacket - hwdbgActionSendVersion (0x0) 
+00008555 ; +0x14  | RequestedActionOfThePacket - hwdbgActionSendVersion (0x0) 
 00000000 ; +0x18  |
-00000000 ; +0x1c  |
-00000000 ; +0x20  |
-00000000 ; +0x24  |
-00000000 ; +0x28  |
-00000000 ; +0x2c  |
-00000000 ; +0x30  |
-00000000 ; +0x34  |
-00000000 ; +0x38  |
-00000000 ; +0x3c  |
-00000000 ; +0x40  |
-00000000 ; +0x44  |
-00000000 ; +0x48  |
-00000000 ; +0x4c  |
-00000000 ; +0x50  |
-00000000 ; +0x54  |
-00000000 ; +0x58  |
-00000000 ; +0x5c  |
-00000000 ; +0x60  |
-00000000 ; +0x64  |
-00000000 ; +0x68  |
-00000000 ; +0x6c  |
-00000000 ; +0x70  |
-00000000 ; +0x74  |
-00000000 ; +0x78  |
-00000000 ; +0x7c  |
-00000000 ; +0x80  |
-00000000 ; +0x84  |
-00000000 ; +0x88  |
-00000000 ; +0x8c  |
-00000000 ; +0x90  |
-00000000 ; +0x94  |
-00000000 ; +0x98  |
-00000000 ; +0x9c  |
-00000000 ; +0xa0  |
-00000000 ; +0xa4  |
-00000000 ; +0xa8  |
-00000000 ; +0xac  |
-00000000 ; +0xb0  |
-00000000 ; +0xb4  |
-00000000 ; +0xb8  |
-00000000 ; +0xbc  |
-00000000 ; +0xc0  |
-00000000 ; +0xc4  |
-00000000 ; +0xc8  |
-00000000 ; +0xcc  |
-00000000 ; +0xd0  |
-00000000 ; +0xd4  |
-00000000 ; +0xd8  |
-00000000 ; +0xdc  |
-00000000 ; +0xe0  |
-00000000 ; +0xe4  |
-00000000 ; +0xe8  |
-00000000 ; +0xec  |
-00000000 ; +0xf0  |
-00000000 ; +0xf4  |
-00000000 ; +0xf8  |
-00000000 ; +0xfc  |
+00000000 ; +0x1c  |
+00000000 ; +0x20  |
+00000000 ; +0x24  |
+00000000 ; +0x28  |
+00000000 ; +0x2c  |
+00000000 ; +0x30  |
+00000000 ; +0x34  |
+00000000 ; +0x38  |
+00000000 ; +0x3c  |
+00000000 ; +0x40  |
+00000000 ; +0x44  |
+00000000 ; +0x48  |
+00000000 ; +0x4c  |
+00000000 ; +0x50  |
+00000000 ; +0x54  |
+00000000 ; +0x58  |
+00000000 ; +0x5c  |
+00000000 ; +0x60  |
+00000000 ; +0x64  |
+00000000 ; +0x68  |
+00000000 ; +0x6c  |
+00000000 ; +0x70  |
+00000000 ; +0x74  |
+00000000 ; +0x78  |
+00000000 ; +0x7c  |
+00000000 ; +0x80  |
+00000000 ; +0x84  |
+00000000 ; +0x88  |
+00000000 ; +0x8c  |
+00000000 ; +0x90  |
+00000000 ; +0x94  |
+00000000 ; +0x98  |
+00000000 ; +0x9c  |
+00000000 ; +0xa0  |
+00000000 ; +0xa4  |
+00000000 ; +0xa8  |
+00000000 ; +0xac  |
+00000000 ; +0xb0  |
+00000000 ; +0xb4  |
+00000000 ; +0xb8  |
+00000000 ; +0xbc  |
+00000000 ; +0xc0  |
+00000000 ; +0xc4  |
+00000000 ; +0xc8  |
+00000000 ; +0xcc  |
+00000000 ; +0xd0  |
+00000000 ; +0xd4  |
+00000000 ; +0xd8  |
+00000000 ; +0xdc  |
+00000000 ; +0xe0  |
+00000000 ; +0xe4  |
+00000000 ; +0xe8  |
+00000000 ; +0xec  |
+00000000 ; +0xf0  |
+00000000 ; +0xf4  |
+00000000 ; +0xf8  |
+00000000 ; +0xfc  |
 00000000 ; +0x100 |
 00000000
 00000000