From 39cdec292c233e3e50bda5cfb3abb445d318e3bd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Radim=20Karni=C5=A1?= Date: Tue, 19 Mar 2024 12:56:06 +0100 Subject: [PATCH 1/2] revert: clear boot control register on ESP32-S3 --- esptool/targets/esp32s3.py | 6 ------ 1 file changed, 6 deletions(-) diff --git a/esptool/targets/esp32s3.py b/esptool/targets/esp32s3.py index aa07e20f2..7531f4ae0 100644 --- a/esptool/targets/esp32s3.py +++ b/esptool/targets/esp32s3.py @@ -352,12 +352,6 @@ def hard_reset(self): if uses_usb_otg: self._check_if_can_reset() - # Clear force download boot mode to avoid the chip being stuck in download mode after reset - # workaround for issue: https://github.com/espressif/arduino-esp32/issues/6762 - self.write_reg( - self.RTC_CNTL_OPTION1_REG, 0, self.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK - ) - print("Hard resetting via RTS pin...") HardReset(self._port, uses_usb_otg)() From 1c355f9fad13f214fde0566fa307a333a4413697 Mon Sep 17 00:00:00 2001 From: Peter Dragun Date: Wed, 20 Mar 2024 09:56:46 +0100 Subject: [PATCH 2/2] feat(esp32s3): clear boot control register on hard reset --- esptool/targets/esp32s3.py | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/esptool/targets/esp32s3.py b/esptool/targets/esp32s3.py index 7531f4ae0..04c3c0ef4 100644 --- a/esptool/targets/esp32s3.py +++ b/esptool/targets/esp32s3.py @@ -352,6 +352,16 @@ def hard_reset(self): if uses_usb_otg: self._check_if_can_reset() + try: + # Clear force download boot mode to avoid the chip being stuck in download mode after reset + # workaround for issue: https://github.com/espressif/arduino-esp32/issues/6762 + self.write_reg( + self.RTC_CNTL_OPTION1_REG, 0, self.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK + ) + except Exception: + # Skip if response was not valid and proceed to reset; e.g. when monitoring while resetting + pass + print("Hard resetting via RTS pin...") HardReset(self._port, uses_usb_otg)()