diff --git a/core/arch/arm/plat-stm32mp1/shared_resources.c b/core/arch/arm/plat-stm32mp1/shared_resources.c
index 0ccd282abc5..af220db9c29 100644
--- a/core/arch/arm/plat-stm32mp1/shared_resources.c
+++ b/core/arch/arm/plat-stm32mp1/shared_resources.c
@@ -437,65 +437,6 @@ bool stm32mp_periph_is_secure(enum stm32mp_shres id)
 	return shres_state[id] == SHRES_SECURE;
 }
 
-bool stm32mp_gpio_bank_is_non_secure(unsigned int bank)
-{
-	unsigned int not_secure = 0;
-	unsigned int pin = 0;
-
-	lock_registering();
-
-	if (bank != GPIO_BANK_Z)
-		return true;
-
-	for (pin = 0; pin < get_gpioz_nbpin(); pin++)
-		if (!stm32mp_periph_is_secure(STM32MP1_SHRES_GPIOZ(pin)))
-			not_secure++;
-
-	return not_secure > 0 && not_secure == get_gpioz_nbpin();
-}
-
-bool stm32mp_nsec_can_access_reset(unsigned int reset_id)
-{
-	enum stm32mp_shres shres_id = STM32MP1_SHRES_COUNT;
-
-	switch (reset_id) {
-	case GPIOZ_R:
-		return stm32mp_gpio_bank_is_non_secure(GPIO_BANK_Z);
-	case SPI6_R:
-		shres_id = STM32MP1_SHRES_SPI6;
-		break;
-	case I2C4_R:
-		shres_id = STM32MP1_SHRES_I2C4;
-		break;
-	case I2C6_R:
-		shres_id = STM32MP1_SHRES_I2C6;
-		break;
-	case USART1_R:
-		shres_id = STM32MP1_SHRES_USART1;
-		break;
-	case CRYP1_R:
-		shres_id = STM32MP1_SHRES_CRYP1;
-		break;
-	case HASH1_R:
-		shres_id = STM32MP1_SHRES_HASH1;
-		break;
-	case RNG1_R:
-		shres_id = STM32MP1_SHRES_RNG1;
-		break;
-	case MDMA_R:
-		shres_id = STM32MP1_SHRES_MDMA;
-		break;
-	case MCU_R:
-	case MCU_HOLD_BOOT_R:
-		shres_id = STM32MP1_SHRES_MCU;
-		break;
-	default:
-		return false;
-	}
-
-	return !stm32mp_periph_is_secure(shres_id);
-}
-
 static bool mckprot_resource(enum stm32mp_shres id)
 {
 	switch (id) {
diff --git a/core/arch/arm/plat-stm32mp1/stm32_util.h b/core/arch/arm/plat-stm32mp1/stm32_util.h
index dc0b64991ef..3b9a33dc266 100644
--- a/core/arch/arm/plat-stm32mp1/stm32_util.h
+++ b/core/arch/arm/plat-stm32mp1/stm32_util.h
@@ -58,16 +58,6 @@ static inline bool stm32mp_nsec_can_access_pmic_regu(const char *name __unused)
 }
 #endif
 
-#ifdef CFG_STM32MP1_SHARED_RESOURCES
-/* Return true if and only if @reset_id relates to a non-secure peripheral */
-bool stm32mp_nsec_can_access_reset(unsigned int reset_id);
-#else /* CFG_STM32MP1_SHARED_RESOURCES */
-static inline bool stm32mp_nsec_can_access_reset(unsigned int reset_id __unused)
-{
-	return true;
-}
-#endif /* CFG_STM32MP1_SHARED_RESOURCES */
-
 /* Return rstctrl instance related to RCC reset controller DT binding ID */
 struct rstctrl *stm32mp_rcc_reset_id_to_rstctrl(unsigned int binding_id);
 
@@ -243,9 +233,6 @@ void stm32mp_register_non_secure_pinctrl(struct pinctrl_state *pinctrl);
 /* Return true if and only if resource @id is registered as secure */
 bool stm32mp_periph_is_secure(enum stm32mp_shres id);
 
-/* Return true if and only if GPIO bank @bank is registered as non-secure */
-bool stm32mp_gpio_bank_is_non_secure(unsigned int bank);
-
 /* Register parent clocks of @clock (ID used in clock DT bindings) as secure */
 void stm32mp_register_clock_parents_secure(unsigned long clock_id);