diff --git a/projects/etherkit_basic_key_irq/.cproject b/projects/etherkit_basic_key_irq/.cproject
index 3ddde26..e7490b5 100644
--- a/projects/etherkit_basic_key_irq/.cproject
+++ b/projects/etherkit_basic_key_irq/.cproject
@@ -101,7 +101,7 @@
-
+
diff --git a/projects/template_project/memory_regions.icf b/projects/template_project/memory_regions.icf
deleted file mode 100644
index 90bea7a..0000000
--- a/projects/template_project/memory_regions.icf
+++ /dev/null
@@ -1,38 +0,0 @@
-
- /* generated memory regions file - do not edit */
- define symbol ATCM_START = 0x00000000;
- define symbol ATCM_LENGTH = 0x20000;
- define symbol BTCM_START = 0x00100000;
- define symbol BTCM_LENGTH = 0x20000;
- define symbol SYSTEM_RAM_START = 0x10000000;
- define symbol SYSTEM_RAM_LENGTH = 0x180000;
- define symbol SYSTEM_RAM_MIRROR_START = 0x30000000;
- define symbol SYSTEM_RAM_MIRROR_LENGTH = 0x180000;
- define symbol xSPI0_CS0_SPACE_MIRROR_START = 0x40000000;
- define symbol xSPI0_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
- define symbol xSPI0_CS1_SPACE_MIRROR_START = 0x44000000;
- define symbol xSPI0_CS1_SPACE_MIRROR_LENGTH = 0x4000000;
- define symbol xSPI1_CS0_SPACE_MIRROR_START = 0x48000000;
- define symbol xSPI1_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
- define symbol CS0_SPACE_MIRROR_START = 0x50000000;
- define symbol CS0_SPACE_MIRROR_LENGTH = 0x4000000;
- define symbol CS2_SPACE_MIRROR_START = 0x54000000;
- define symbol CS2_SPACE_MIRROR_LENGTH = 0x4000000;
- define symbol CS3_SPACE_MIRROR_START = 0x58000000;
- define symbol CS3_SPACE_MIRROR_LENGTH = 0x4000000;
- define symbol CS5_SPACE_MIRROR_START = 0x5C000000;
- define symbol CS5_SPACE_MIRROR_LENGTH = 0x4000000;
- define symbol xSPI0_CS0_SPACE_START = 0x60000000;
- define symbol xSPI0_CS0_SPACE_LENGTH = 0x4000000;
- define symbol xSPI0_CS1_SPACE_START = 0x64000000;
- define symbol xSPI0_CS1_SPACE_LENGTH = 0x4000000;
- define symbol xSPI1_CS0_SPACE_START = 0x68000000;
- define symbol xSPI1_CS0_SPACE_LENGTH = 0x4000000;
- define symbol CS0_SPACE_START = 0x70000000;
- define symbol CS0_SPACE_LENGTH = 0x4000000;
- define symbol CS2_SPACE_START = 0x74000000;
- define symbol CS2_SPACE_LENGTH = 0x4000000;
- define symbol CS3_SPACE_START = 0x78000000;
- define symbol CS3_SPACE_LENGTH = 0x4000000;
- define symbol CS5_SPACE_START = 0x7C000000;
- define symbol CS5_SPACE_LENGTH = 0x4000000;
diff --git a/projects/template_project/project.ewp b/projects/template_project/project.ewp
index c785525..4f6d8f3 100644
--- a/projects/template_project/project.ewp
+++ b/projects/template_project/project.ewp
@@ -381,23 +381,23 @@
$PROJ_DIR$\src\tcpip\renesas\oss_deps\lwip
$PROJ_DIR$\src\tcpip\oss\amazon-freertos\libraries\3rdparty\lwip_osal\include
$PROJ_DIR$\src\tcpip\oss\lwip\src\include
- $PROJ_DIR$\rt-thread\components\libc\compilers\common\include
- $PROJ_DIR$\rt-thread\components\finsh
$PROJ_DIR$\board\ports
+ $PROJ_DIR$\rt-thread\components\libc\posix\ipc
$PROJ_DIR$\rt-thread\components\libc\posix\io\eventfd
- $PROJ_DIR$\rt-thread\components\libc\posix\io\poll
+ $PROJ_DIR$\.
$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52
$PROJ_DIR$\rt-thread\components\libc\compilers\common\extension
- $PROJ_DIR$\rt-thread\include
- $PROJ_DIR$\.
- $PROJ_DIR$\libraries\HAL_Drivers\config
- $PROJ_DIR$\board
$PROJ_DIR$\rt-thread\components\drivers\include
- $PROJ_DIR$\rt-thread\components\libc\compilers\common\extension\fcntl\octal
$PROJ_DIR$\libraries\HAL_Drivers
- $PROJ_DIR$\rt-thread\components\libc\posix\ipc
- $PROJ_DIR$\rt-thread\components\libc\posix\io\epoll
+ $PROJ_DIR$\rt-thread\include
$PROJ_DIR$\rt-thread\libcpu\arm\common
+ $PROJ_DIR$\rt-thread\components\libc\posix\io\epoll
+ $PROJ_DIR$\libraries\HAL_Drivers\config
+ $PROJ_DIR$\rt-thread\components\libc\compilers\common\extension\fcntl\octal
+ $PROJ_DIR$\rt-thread\components\libc\posix\io\poll
+ $PROJ_DIR$\board
+ $PROJ_DIR$\rt-thread\components\finsh
+ $PROJ_DIR$\rt-thread\components\libc\compilers\common\include
CCStdIncCheck
@@ -1520,23 +1520,23 @@
$PROJ_DIR$/rzn_gen
$PROJ_DIR$/src
$PROJ_DIR$
- $PROJ_DIR$\rt-thread\components\libc\compilers\common\include
- $PROJ_DIR$\rt-thread\components\finsh
$PROJ_DIR$\board\ports
+ $PROJ_DIR$\rt-thread\components\libc\posix\ipc
$PROJ_DIR$\rt-thread\components\libc\posix\io\eventfd
- $PROJ_DIR$\rt-thread\components\libc\posix\io\poll
+ $PROJ_DIR$\.
$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52
$PROJ_DIR$\rt-thread\components\libc\compilers\common\extension
- $PROJ_DIR$\rt-thread\include
- $PROJ_DIR$\.
- $PROJ_DIR$\libraries\HAL_Drivers\config
- $PROJ_DIR$\board
$PROJ_DIR$\rt-thread\components\drivers\include
- $PROJ_DIR$\rt-thread\components\libc\compilers\common\extension\fcntl\octal
$PROJ_DIR$\libraries\HAL_Drivers
- $PROJ_DIR$\rt-thread\components\libc\posix\ipc
- $PROJ_DIR$\rt-thread\components\libc\posix\io\epoll
+ $PROJ_DIR$\rt-thread\include
$PROJ_DIR$\rt-thread\libcpu\arm\common
+ $PROJ_DIR$\rt-thread\components\libc\posix\io\epoll
+ $PROJ_DIR$\libraries\HAL_Drivers\config
+ $PROJ_DIR$\rt-thread\components\libc\compilers\common\extension\fcntl\octal
+ $PROJ_DIR$\rt-thread\components\libc\posix\io\poll
+ $PROJ_DIR$\board
+ $PROJ_DIR$\rt-thread\components\finsh
+ $PROJ_DIR$\rt-thread\components\libc\compilers\common\include
CCStdIncCheck
@@ -2714,31 +2714,31 @@
CPU
- $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\context_iar.S
+ $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\interrupt.c
- $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\stack.c
+ $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\trap.c
$PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\gicv3.c
- $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\cpuport.c
+ $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\stack.c
- $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\vector_iar.S
+ $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\cpuport.c
- $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\trap.c
+ $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\start_iar.S
- $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\start_iar.S
+ $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\backtrace.c
- $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\interrupt.c
+ $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\vector_iar.S
- $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\backtrace.c
+ $PROJ_DIR$\rt-thread\libcpu\arm\cortex-r52\context_iar.S
@@ -2792,16 +2792,16 @@
Finsh
- $PROJ_DIR$\rt-thread\components\finsh\shell.c
+ $PROJ_DIR$\rt-thread\components\finsh\cmd.c
$PROJ_DIR$\rt-thread\components\finsh\msh_parse.c
- $PROJ_DIR$\rt-thread\components\finsh\msh.c
+ $PROJ_DIR$\rt-thread\components\finsh\shell.c
- $PROJ_DIR$\rt-thread\components\finsh\cmd.c
+ $PROJ_DIR$\rt-thread\components\finsh\msh.c
diff --git a/projects/template_project/rtconfig.py b/projects/template_project/rtconfig.py
index 0bce8f8..73e92ef 100644
--- a/projects/template_project/rtconfig.py
+++ b/projects/template_project/rtconfig.py
@@ -45,7 +45,7 @@
DEVICE = ' -mcpu=cortex-r52 -marm -mfloat-abi=hard -mfpu=neon-fp-armv8 -fdiagnostics-parseable-fixits -Og -fmessage-length=0 -fsigned-char -fdata-sections -funwind-tables -ffunction-sections -fno-strict-aliasing -g -gdwarf-4'
CFLAGS = DEVICE + ' -Dgcc'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
- LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -lgcc -lrdimon -T script/fsp_xspi0_boot_cmake.ld -L script/'
+ LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -lgcc -lrdimon -T script/fsp_xspi0_boot.ld -L script/'
CPATH = ''
LPATH = ''
diff --git a/projects/template_project/script/fsp_xspi0_boot.icf b/projects/template_project/script/fsp_xspi0_boot.icf
index d3c13c7..b79dc07 100644
--- a/projects/template_project/script/fsp_xspi0_boot.icf
+++ b/projects/template_project/script/fsp_xspi0_boot.icf
@@ -1,4 +1,40 @@
-include "memory_regions.icf";
+/* generated memory regions file - do not edit */
+define symbol ATCM_START = 0x00000000;
+define symbol ATCM_LENGTH = 0x20000;
+define symbol BTCM_START = 0x00100000;
+define symbol BTCM_LENGTH = 0x20000;
+define symbol SYSTEM_RAM_START = 0x10000000;
+define symbol SYSTEM_RAM_LENGTH = 0x180000;
+define symbol SYSTEM_RAM_MIRROR_START = 0x30000000;
+define symbol SYSTEM_RAM_MIRROR_LENGTH = 0x180000;
+define symbol xSPI0_CS0_SPACE_MIRROR_START = 0x40000000;
+define symbol xSPI0_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
+define symbol xSPI0_CS1_SPACE_MIRROR_START = 0x44000000;
+define symbol xSPI0_CS1_SPACE_MIRROR_LENGTH = 0x4000000;
+define symbol xSPI1_CS0_SPACE_MIRROR_START = 0x48000000;
+define symbol xSPI1_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
+define symbol CS0_SPACE_MIRROR_START = 0x50000000;
+define symbol CS0_SPACE_MIRROR_LENGTH = 0x4000000;
+define symbol CS2_SPACE_MIRROR_START = 0x54000000;
+define symbol CS2_SPACE_MIRROR_LENGTH = 0x4000000;
+define symbol CS3_SPACE_MIRROR_START = 0x58000000;
+define symbol CS3_SPACE_MIRROR_LENGTH = 0x4000000;
+define symbol CS5_SPACE_MIRROR_START = 0x5C000000;
+define symbol CS5_SPACE_MIRROR_LENGTH = 0x4000000;
+define symbol xSPI0_CS0_SPACE_START = 0x60000000;
+define symbol xSPI0_CS0_SPACE_LENGTH = 0x4000000;
+define symbol xSPI0_CS1_SPACE_START = 0x64000000;
+define symbol xSPI0_CS1_SPACE_LENGTH = 0x4000000;
+define symbol xSPI1_CS0_SPACE_START = 0x68000000;
+define symbol xSPI1_CS0_SPACE_LENGTH = 0x4000000;
+define symbol CS0_SPACE_START = 0x70000000;
+define symbol CS0_SPACE_LENGTH = 0x4000000;
+define symbol CS2_SPACE_START = 0x74000000;
+define symbol CS2_SPACE_LENGTH = 0x4000000;
+define symbol CS3_SPACE_START = 0x78000000;
+define symbol CS3_SPACE_LENGTH = 0x4000000;
+define symbol CS5_SPACE_START = 0x7C000000;
+define symbol CS5_SPACE_LENGTH = 0x4000000;
/* The memory information for each device is done in memory regions file.
* The starting address and length of memory not defined in memory regions file are defined as 0. */
diff --git a/projects/template_project/script/fsp_xspi0_boot.ld b/projects/template_project/script/fsp_xspi0_boot.ld
index a3ff28c..ef2a35f 100644
--- a/projects/template_project/script/fsp_xspi0_boot.ld
+++ b/projects/template_project/script/fsp_xspi0_boot.ld
@@ -1,12 +1,47 @@
/*
Linker File for Renesas RZ/N2L FSP
*/
-
-INCLUDE memory_regions.ld
-
/* The memory information for each device is done in memory regions file.
* The starting address and length of memory not defined in memory regions file are defined as 0. */
+/* generated memory regions file - do not edit */
+ATCM_START = 0x00000000;
+ATCM_LENGTH = 0x20000;
+BTCM_START = 0x00100000;
+BTCM_LENGTH = 0x20000;
+SYSTEM_RAM_START = 0x10000000;
+SYSTEM_RAM_LENGTH = 0x180000;
+SYSTEM_RAM_MIRROR_START = 0x30000000;
+SYSTEM_RAM_MIRROR_LENGTH = 0x180000;
+xSPI0_CS0_SPACE_MIRROR_START = 0x40000000;
+xSPI0_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
+xSPI0_CS1_SPACE_MIRROR_START = 0x44000000;
+xSPI0_CS1_SPACE_MIRROR_LENGTH = 0x4000000;
+xSPI1_CS0_SPACE_MIRROR_START = 0x48000000;
+xSPI1_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
+CS0_SPACE_MIRROR_START = 0x50000000;
+CS0_SPACE_MIRROR_LENGTH = 0x4000000;
+CS2_SPACE_MIRROR_START = 0x54000000;
+CS2_SPACE_MIRROR_LENGTH = 0x4000000;
+CS3_SPACE_MIRROR_START = 0x58000000;
+CS3_SPACE_MIRROR_LENGTH = 0x4000000;
+CS5_SPACE_MIRROR_START = 0x5C000000;
+CS5_SPACE_MIRROR_LENGTH = 0x4000000;
+xSPI0_CS0_SPACE_START = 0x60000000;
+xSPI0_CS0_SPACE_LENGTH = 0x4000000;
+xSPI0_CS1_SPACE_START = 0x64000000;
+xSPI0_CS1_SPACE_LENGTH = 0x4000000;
+xSPI1_CS0_SPACE_START = 0x68000000;
+xSPI1_CS0_SPACE_LENGTH = 0x4000000;
+CS0_SPACE_START = 0x70000000;
+CS0_SPACE_LENGTH = 0x4000000;
+CS2_SPACE_START = 0x74000000;
+CS2_SPACE_LENGTH = 0x4000000;
+CS3_SPACE_START = 0x78000000;
+CS3_SPACE_LENGTH = 0x4000000;
+CS5_SPACE_START = 0x7C000000;
+CS5_SPACE_LENGTH = 0x4000000;
+
ATCM_PRV_START = DEFINED(ATCM_START) ? ATCM_START : 0;
ATCM_PRV_LENGTH = DEFINED(ATCM_LENGTH) ? ATCM_LENGTH : 0;
BTCM_PRV_START = DEFINED(BTCM_START) ? BTCM_START : 0;
@@ -48,21 +83,6 @@ CS3_SPACE_PRV_LENGTH = DEFINED(CS3_SPACE_LENGTH) ? CS3_SPACE_LENGTH : 0;
CS5_SPACE_PRV_START = DEFINED(CS5_SPACE_START) ? CS5_SPACE_START : 0;
CS5_SPACE_PRV_LENGTH = DEFINED(CS5_SPACE_LENGTH) ? CS5_SPACE_LENGTH : 0;
-/*
-LOADER_PARAM_ADDRESS = xSPI0_CS0_SPACE_PRV_START;
-FLASH_CONTENTS_ADDRESS = LOADER_PARAM_ADDRESS + 0x0000004C;
-LOADER_TEXT_ADDRESS = 0x00102000;
-INTVEC_ADDRESS = 0x00000000;
-TEXT_ADDRESS = 0x00000100;
-NONCACHE_BUFFER_OFFSET = 0x00020000;
-DMAC_LINK_MODE_OFFSET = 0x00044000;
-DATA_NONCACHE_OFFSET = 0x00048000;
-RAM_START = ATCM_PRV_START;
-RAM_LENGTH = ATCM_PRV_LENGTH;
-LOADER_START = BTCM_PRV_START;
-LOADER_LENGTH = BTCM_PRV_LENGTH;
-*/
-/* Change ADDRESS for EtherCAT Sample */
LOADER_PARAM_ADDRESS = xSPI0_CS0_SPACE_PRV_START;
FLASH_CONTENTS_ADDRESS = LOADER_PARAM_ADDRESS + 0x0000004C;
LOADER_TEXT_ADDRESS = 0x00102000;
@@ -75,7 +95,6 @@ RAM_START = SYSTEM_RAM_PRV_START;
RAM_LENGTH = SYSTEM_RAM_PRV_LENGTH;
LOADER_START = BTCM_PRV_START;
LOADER_LENGTH = BTCM_PRV_LENGTH;
-/**************************************/
/* Define starting addresses and length for data_noncache, DMAC link mode data, CPU-shared non-cache, and CPU-specific non-cache areas. */
DATA_NONCACHE_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - DATA_NONCACHE_OFFSET : 0;
@@ -146,16 +165,13 @@ SECTIONS
{
_loader_text_start = .;
*(.loader_text)
- build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/startup_core.o(.text*)
- build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/system_core.o(.text*)
- build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o(.text*)
- build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o(.text*)
- build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(.text*)
- build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(.text*)
- build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(.text*)
- build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.text*)
- build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(.text*)
- build/rzn/fsp/src/r_ioport/r_ioport.o(.text*)
+ */fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(.text*)
+ */fsp/src/bsp/mcu/all/*/bsp_irq_core.o(.text*)
+ */fsp/src/bsp/mcu/all/bsp_clocks.o(.text*)
+ */fsp/src/bsp/mcu/all/bsp_irq.o(.text*)
+ */fsp/src/bsp/mcu/all/bsp_register_protection.o(.text*)
+ */fsp/src/bsp/mcu/all/bsp_cache.o(.text*)
+ */fsp/src/r_ioport/r_ioport.o(.text*)
KEEP(*(.warm_start))
. = . + (512 - ((. - _loader_text_start) % 512));
_loader_text_end = .;
@@ -164,36 +180,31 @@ SECTIONS
{
_loader_data_start = .;
__loader_data_start = .;
- build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/startup_core.o(.data*)
- build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/system_core.o(.rodata*)
- build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o(.data*)
- build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o(.data*)
- build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(.data*)
- build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(.data*)
- build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(.data*)
- build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.data*)
- build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(.data*)
- build/rzn/fsp/src/r_ioport/r_ioport.o(.data*)
+ */fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(.data*)
+ */fsp/src/bsp/cmsis/Device/RENESAS/Source/*/system_core.o(.rodata*)
+ */fsp/src/bsp/mcu/all/*/bsp_irq_core.o(.data*)
+ */fsp/src/bsp/mcu/all/bsp_clocks.o(.data*)
+ */fsp/src/bsp/mcu/all/bsp_irq.o(.data*)
+ */fsp/src/bsp/mcu/all/bsp_register_protection.o(.data*)
+ */fsp/src/bsp/mcu/all/bsp_cache.o(.data*)
+ */fsp/src/r_ioport/r_ioport.o(.data*)
. = ALIGN(4);
__loader_data_end = .;
__loader_bss_start = .;
- build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/startup_core.o(.bss*)
- build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/cr/system_core.o(.bss*)
- build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o(.bss*)
- build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o(.bss*)
- build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(.bss*)
- build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(.bss*)
- build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(.bss*)
- build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.bss*)
- build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(.bss*)
- build/rzn/fsp/src/r_ioport/r_ioport.o(.bss*)
- build/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(COMMON)
- build/rzn/fsp/src/bsp/mcu/all/cr/bsp_irq_core.o(COMMON)
- build/rzn/fsp/src/bsp/mcu/all/bsp_clocks.o(COMMON)
- build/rzn/fsp/src/bsp/mcu/all/bsp_irq.o(COMMON)
- build/rzn/fsp/src/bsp/mcu/all/bsp_register_protection.o(.COMMON)
- build/rzn/fsp/src/bsp/mcu/all/bsp_cache.o(COMMON)
- build/rzn/fsp/src/r_ioport/r_ioport.o(.COMMON)
+ */fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(.bss*)
+ */fsp/src/bsp/mcu/all/*/bsp_irq_core.o(.bss*)
+ */fsp/src/bsp/mcu/all/bsp_clocks.o(.bss*)
+ */fsp/src/bsp/mcu/all/bsp_irq.o(.bss*)
+ */fsp/src/bsp/mcu/all/bsp_register_protection.o(.bss*)
+ */fsp/src/bsp/mcu/all/bsp_cache.o(.bss*)
+ */fsp/src/r_ioport/r_ioport.o(.bss*)
+ */fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(COMMON)
+ */fsp/src/bsp/mcu/all/*/bsp_irq_core.o(COMMON)
+ */fsp/src/bsp/mcu/all/bsp_clocks.o(COMMON)
+ */fsp/src/bsp/mcu/all/bsp_irq.o(COMMON)
+ */fsp/src/bsp/mcu/all/bsp_register_protection.o(.COMMON)
+ */fsp/src/bsp/mcu/all/bsp_cache.o(COMMON)
+ */fsp/src/r_ioport/r_ioport.o(.COMMON)
. = ALIGN(4);
__loader_bss_end = . ;
_loader_data_end = .;
diff --git a/projects/template_project/script/fsp_xspi0_boot_cmake.ld b/projects/template_project/script/fsp_xspi0_boot_cmake.ld
deleted file mode 100644
index ef2a35f..0000000
--- a/projects/template_project/script/fsp_xspi0_boot_cmake.ld
+++ /dev/null
@@ -1,448 +0,0 @@
-/*
- Linker File for Renesas RZ/N2L FSP
-*/
-/* The memory information for each device is done in memory regions file.
- * The starting address and length of memory not defined in memory regions file are defined as 0. */
-
-/* generated memory regions file - do not edit */
-ATCM_START = 0x00000000;
-ATCM_LENGTH = 0x20000;
-BTCM_START = 0x00100000;
-BTCM_LENGTH = 0x20000;
-SYSTEM_RAM_START = 0x10000000;
-SYSTEM_RAM_LENGTH = 0x180000;
-SYSTEM_RAM_MIRROR_START = 0x30000000;
-SYSTEM_RAM_MIRROR_LENGTH = 0x180000;
-xSPI0_CS0_SPACE_MIRROR_START = 0x40000000;
-xSPI0_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
-xSPI0_CS1_SPACE_MIRROR_START = 0x44000000;
-xSPI0_CS1_SPACE_MIRROR_LENGTH = 0x4000000;
-xSPI1_CS0_SPACE_MIRROR_START = 0x48000000;
-xSPI1_CS0_SPACE_MIRROR_LENGTH = 0x4000000;
-CS0_SPACE_MIRROR_START = 0x50000000;
-CS0_SPACE_MIRROR_LENGTH = 0x4000000;
-CS2_SPACE_MIRROR_START = 0x54000000;
-CS2_SPACE_MIRROR_LENGTH = 0x4000000;
-CS3_SPACE_MIRROR_START = 0x58000000;
-CS3_SPACE_MIRROR_LENGTH = 0x4000000;
-CS5_SPACE_MIRROR_START = 0x5C000000;
-CS5_SPACE_MIRROR_LENGTH = 0x4000000;
-xSPI0_CS0_SPACE_START = 0x60000000;
-xSPI0_CS0_SPACE_LENGTH = 0x4000000;
-xSPI0_CS1_SPACE_START = 0x64000000;
-xSPI0_CS1_SPACE_LENGTH = 0x4000000;
-xSPI1_CS0_SPACE_START = 0x68000000;
-xSPI1_CS0_SPACE_LENGTH = 0x4000000;
-CS0_SPACE_START = 0x70000000;
-CS0_SPACE_LENGTH = 0x4000000;
-CS2_SPACE_START = 0x74000000;
-CS2_SPACE_LENGTH = 0x4000000;
-CS3_SPACE_START = 0x78000000;
-CS3_SPACE_LENGTH = 0x4000000;
-CS5_SPACE_START = 0x7C000000;
-CS5_SPACE_LENGTH = 0x4000000;
-
-ATCM_PRV_START = DEFINED(ATCM_START) ? ATCM_START : 0;
-ATCM_PRV_LENGTH = DEFINED(ATCM_LENGTH) ? ATCM_LENGTH : 0;
-BTCM_PRV_START = DEFINED(BTCM_START) ? BTCM_START : 0;
-BTCM_PRV_LENGTH = DEFINED(BTCM_LENGTH) ? BTCM_LENGTH : 0;
-SYSTEM_RAM_PRV_START = DEFINED(SYSTEM_RAM_START) ? SYSTEM_RAM_START : 0;
-SYSTEM_RAM_PRV_LENGTH = DEFINED(SYSTEM_RAM_LENGTH) ? SYSTEM_RAM_LENGTH : 0;
-SYSTEM_RAM_MIRROR_PRV_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START : 0;
-SYSTEM_RAM_MIRROR_PRV_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? SYSTEM_RAM_MIRROR_LENGTH : 0;
-xSPI0_CS0_SPACE_MIRROR_PRV_START = DEFINED(xSPI0_CS0_SPACE_MIRROR_START) ? xSPI0_CS0_SPACE_MIRROR_START : 0;
-xSPI0_CS0_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI0_CS0_SPACE_MIRROR_LENGTH) ? xSPI0_CS0_SPACE_MIRROR_LENGTH : 0;
-xSPI0_CS1_SPACE_MIRROR_PRV_START = DEFINED(xSPI0_CS1_SPACE_MIRROR_START) ? xSPI0_CS1_SPACE_MIRROR_START : 0;
-xSPI0_CS1_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI0_CS1_SPACE_MIRROR_LENGTH) ? xSPI0_CS1_SPACE_MIRROR_LENGTH : 0;
-xSPI1_CS0_SPACE_MIRROR_PRV_START = DEFINED(xSPI1_CS0_SPACE_MIRROR_START) ? xSPI1_CS0_SPACE_MIRROR_START : 0;
-xSPI1_CS0_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI1_CS0_SPACE_MIRROR_LENGTH) ? xSPI1_CS0_SPACE_MIRROR_LENGTH : 0;
-xSPI1_CS1_SPACE_MIRROR_PRV_START = DEFINED(xSPI1_CS1_SPACE_MIRROR_START) ? xSPI1_CS1_SPACE_MIRROR_START : 0;
-xSPI1_CS1_SPACE_MIRROR_PRV_LENGTH = DEFINED(xSPI1_CS1_SPACE_MIRROR_LENGTH) ? xSPI1_CS1_SPACE_MIRROR_LENGTH : 0;
-CS0_SPACE_MIRROR_PRV_START = DEFINED(CS0_SPACE_MIRROR_START) ? CS0_SPACE_MIRROR_START : 0;
-CS0_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS0_SPACE_MIRROR_LENGTH) ? CS0_SPACE_MIRROR_LENGTH : 0;
-CS2_SPACE_MIRROR_PRV_START = DEFINED(CS2_SPACE_MIRROR_START) ? CS2_SPACE_MIRROR_START : 0;
-CS2_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS2_SPACE_MIRROR_LENGTH) ? CS2_SPACE_MIRROR_LENGTH : 0;
-CS3_SPACE_MIRROR_PRV_START = DEFINED(CS3_SPACE_MIRROR_START) ? CS3_SPACE_MIRROR_START : 0;
-CS3_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS3_SPACE_MIRROR_LENGTH) ? CS3_SPACE_MIRROR_LENGTH : 0;
-CS5_SPACE_MIRROR_PRV_START = DEFINED(CS5_SPACE_MIRROR_START) ? CS5_SPACE_MIRROR_START : 0;
-CS5_SPACE_MIRROR_PRV_LENGTH = DEFINED(CS5_SPACE_MIRROR_LENGTH) ? CS5_SPACE_MIRROR_LENGTH : 0;
-xSPI0_CS0_SPACE_PRV_START = DEFINED(xSPI0_CS0_SPACE_START) ? xSPI0_CS0_SPACE_START : 0;
-xSPI0_CS0_SPACE_PRV_LENGTH = DEFINED(xSPI0_CS0_SPACE_LENGTH) ? xSPI0_CS0_SPACE_LENGTH : 0;
-xSPI0_CS1_SPACE_PRV_START = DEFINED(xSPI0_CS1_SPACE_START) ? xSPI0_CS1_SPACE_START : 0;
-xSPI0_CS1_SPACE_PRV_LENGTH = DEFINED(xSPI0_CS1_SPACE_LENGTH) ? xSPI0_CS1_SPACE_LENGTH : 0;
-xSPI1_CS0_SPACE_PRV_START = DEFINED(xSPI1_CS0_SPACE_START) ? xSPI1_CS0_SPACE_START : 0;
-xSPI1_CS0_SPACE_PRV_LENGTH = DEFINED(xSPI1_CS0_SPACE_LENGTH) ? xSPI1_CS0_SPACE_LENGTH : 0;
-xSPI1_CS1_SPACE_PRV_START = DEFINED(xSPI1_CS1_SPACE_START) ? xSPI1_CS1_SPACE_START : 0;
-xSPI1_CS1_SPACE_PRV_LENGTH = DEFINED(xSPI1_CS1_SPACE_LENGTH) ? xSPI1_CS1_SPACE_LENGTH : 0;
-CS0_SPACE_PRV_START = DEFINED(CS0_SPACE_START) ? CS0_SPACE_START : 0;
-CS0_SPACE_PRV_LENGTH = DEFINED(CS0_SPACE_LENGTH) ? CS0_SPACE_LENGTH : 0;
-CS2_SPACE_PRV_START = DEFINED(CS2_SPACE_START) ? CS2_SPACE_START : 0;
-CS2_SPACE_PRV_LENGTH = DEFINED(CS2_SPACE_LENGTH) ? CS2_SPACE_LENGTH : 0;
-CS3_SPACE_PRV_START = DEFINED(CS3_SPACE_START) ? CS3_SPACE_START : 0;
-CS3_SPACE_PRV_LENGTH = DEFINED(CS3_SPACE_LENGTH) ? CS3_SPACE_LENGTH : 0;
-CS5_SPACE_PRV_START = DEFINED(CS5_SPACE_START) ? CS5_SPACE_START : 0;
-CS5_SPACE_PRV_LENGTH = DEFINED(CS5_SPACE_LENGTH) ? CS5_SPACE_LENGTH : 0;
-
-LOADER_PARAM_ADDRESS = xSPI0_CS0_SPACE_PRV_START;
-FLASH_CONTENTS_ADDRESS = LOADER_PARAM_ADDRESS + 0x0000004C;
-LOADER_TEXT_ADDRESS = 0x00102000;
-INTVEC_ADDRESS = 0x10000000;
-TEXT_ADDRESS = 0x10020000;
-NONCACHE_BUFFER_OFFSET = 0x00020000;
-DMAC_LINK_MODE_OFFSET = 0x00044000;
-DATA_NONCACHE_OFFSET = 0x00048000;
-RAM_START = SYSTEM_RAM_PRV_START;
-RAM_LENGTH = SYSTEM_RAM_PRV_LENGTH;
-LOADER_START = BTCM_PRV_START;
-LOADER_LENGTH = BTCM_PRV_LENGTH;
-
-/* Define starting addresses and length for data_noncache, DMAC link mode data, CPU-shared non-cache, and CPU-specific non-cache areas. */
-DATA_NONCACHE_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - DATA_NONCACHE_OFFSET : 0;
-DATA_NONCACHE_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00004000 : 0;
-DMAC_LINK_MODE_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - DMAC_LINK_MODE_OFFSET : 0;
-DMAC_LINK_MODE_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00004000 : 0;
-SHARED_NONCACHE_BUFFER_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - 0x00040000 : 0;
-SHARED_NONCACHE_BUFFER_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00020000 : 0;
-NONCACHE_BUFFER_START = DEFINED(SYSTEM_RAM_MIRROR_START) ? SYSTEM_RAM_MIRROR_START + SYSTEM_RAM_MIRROR_LENGTH - NONCACHE_BUFFER_OFFSET : 0;
-NONCACHE_BUFFER_LENGTH = DEFINED(SYSTEM_RAM_MIRROR_LENGTH) ? 0x00020000 : 0;
-
-MEMORY
-{
- ATCM : ORIGIN = ATCM_PRV_START, LENGTH = ATCM_PRV_LENGTH
- BTCM : ORIGIN = BTCM_PRV_START, LENGTH = BTCM_PRV_LENGTH
- SYSTEM_RAM : ORIGIN = SYSTEM_RAM_PRV_START, LENGTH = SYSTEM_RAM_PRV_LENGTH
- SYSTEM_RAM_MIRROR : ORIGIN = SYSTEM_RAM_MIRROR_PRV_START, LENGTH = SYSTEM_RAM_MIRROR_PRV_LENGTH
- xSPI0_CS0_SPACE_MIRROR : ORIGIN = xSPI0_CS0_SPACE_MIRROR_PRV_START, LENGTH = xSPI0_CS0_SPACE_MIRROR_PRV_LENGTH
- xSPI0_CS1_SPACE_MIRROR : ORIGIN = xSPI0_CS1_SPACE_MIRROR_PRV_START, LENGTH = xSPI0_CS1_SPACE_MIRROR_PRV_LENGTH
- xSPI1_CS0_SPACE_MIRROR : ORIGIN = xSPI1_CS0_SPACE_MIRROR_PRV_START, LENGTH = xSPI1_CS0_SPACE_MIRROR_PRV_LENGTH
- xSPI1_CS1_SPACE_MIRROR : ORIGIN = xSPI1_CS1_SPACE_MIRROR_PRV_START, LENGTH = xSPI1_CS1_SPACE_MIRROR_PRV_LENGTH
- CS0_SPACE_MIRROR : ORIGIN = CS0_SPACE_MIRROR_PRV_START, LENGTH = CS0_SPACE_MIRROR_PRV_LENGTH
- CS2_SPACE_MIRROR : ORIGIN = CS2_SPACE_MIRROR_PRV_START, LENGTH = CS2_SPACE_MIRROR_PRV_LENGTH
- CS3_SPACE_MIRROR : ORIGIN = CS3_SPACE_MIRROR_PRV_START, LENGTH = CS3_SPACE_MIRROR_PRV_LENGTH
- CS5_SPACE_MIRROR : ORIGIN = CS5_SPACE_MIRROR_PRV_START, LENGTH = CS5_SPACE_MIRROR_PRV_LENGTH
- xSPI0_CS0_SPACE : ORIGIN = xSPI0_CS0_SPACE_PRV_START, LENGTH = xSPI0_CS0_SPACE_PRV_LENGTH
- xSPI0_CS1_SPACE : ORIGIN = xSPI0_CS1_SPACE_PRV_START, LENGTH = xSPI0_CS1_SPACE_PRV_LENGTH
- xSPI1_CS0_SPACE : ORIGIN = xSPI1_CS0_SPACE_PRV_START, LENGTH = xSPI1_CS0_SPACE_PRV_LENGTH
- xSPI1_CS1_SPACE : ORIGIN = xSPI1_CS1_SPACE_PRV_START, LENGTH = xSPI1_CS1_SPACE_PRV_LENGTH
- CS0_SPACE : ORIGIN = CS0_SPACE_PRV_START, LENGTH = CS0_SPACE_PRV_LENGTH
- CS2_SPACE : ORIGIN = CS2_SPACE_PRV_START, LENGTH = CS2_SPACE_PRV_LENGTH
- CS3_SPACE : ORIGIN = CS3_SPACE_PRV_START, LENGTH = CS3_SPACE_PRV_LENGTH
- CS5_SPACE : ORIGIN = CS5_SPACE_PRV_START, LENGTH = CS5_SPACE_PRV_LENGTH
- RAM : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
- LOADER_STACK : ORIGIN = LOADER_START, LENGTH = LOADER_LENGTH
- DUMMY : ORIGIN = RAM_START, LENGTH = RAM_LENGTH
- DATA_NONCACHE : ORIGIN = DATA_NONCACHE_START, LENGTH = DATA_NONCACHE_LENGTH
- DMAC_LINK_MODE : ORIGIN = DMAC_LINK_MODE_START, LENGTH = DMAC_LINK_MODE_LENGTH
- SHARED_NONCACHE_BUFFER : ORIGIN = SHARED_NONCACHE_BUFFER_START, LENGTH = SHARED_NONCACHE_BUFFER_LENGTH
- NONCACHE_BUFFER : ORIGIN = NONCACHE_BUFFER_START, LENGTH = NONCACHE_BUFFER_LENGTH
-}
-
-SECTIONS
-{
- .loader_param LOADER_PARAM_ADDRESS : AT (LOADER_PARAM_ADDRESS)
- {
- KEEP(*(.loader_param))
- } > xSPI0_CS0_SPACE
- .flash_contents FLASH_CONTENTS_ADDRESS : AT (FLASH_CONTENTS_ADDRESS)
- {
- _mloader_text = .;
- . = . + (_loader_text_end - _loader_text_start);
- _mloader_data = .;
- . = . + (_loader_data_end - _loader_data_start);
- _mfvector = .;
- . = . + (_fvector_end - _fvector_start);
- _mtext = .;
- . = . + (_text_end - _text_start);
- _mdummy = .;
- . = . + (_dummy_end - _dummy_start);
- _mdata = .;
- . = . + (_data_end - _data_start);
- _mdata_noncache = .;
- . = . + (_data_noncache_end - _data_noncache_start);
- flash_contents_end = .;
- } > xSPI0_CS0_SPACE
- .loader_text LOADER_TEXT_ADDRESS : AT (_mloader_text)
- {
- _loader_text_start = .;
- *(.loader_text)
- */fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(.text*)
- */fsp/src/bsp/mcu/all/*/bsp_irq_core.o(.text*)
- */fsp/src/bsp/mcu/all/bsp_clocks.o(.text*)
- */fsp/src/bsp/mcu/all/bsp_irq.o(.text*)
- */fsp/src/bsp/mcu/all/bsp_register_protection.o(.text*)
- */fsp/src/bsp/mcu/all/bsp_cache.o(.text*)
- */fsp/src/r_ioport/r_ioport.o(.text*)
- KEEP(*(.warm_start))
- . = . + (512 - ((. - _loader_text_start) % 512));
- _loader_text_end = .;
- } > LOADER_STACK
- .loader_data : AT (_mloader_data)
- {
- _loader_data_start = .;
- __loader_data_start = .;
- */fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(.data*)
- */fsp/src/bsp/cmsis/Device/RENESAS/Source/*/system_core.o(.rodata*)
- */fsp/src/bsp/mcu/all/*/bsp_irq_core.o(.data*)
- */fsp/src/bsp/mcu/all/bsp_clocks.o(.data*)
- */fsp/src/bsp/mcu/all/bsp_irq.o(.data*)
- */fsp/src/bsp/mcu/all/bsp_register_protection.o(.data*)
- */fsp/src/bsp/mcu/all/bsp_cache.o(.data*)
- */fsp/src/r_ioport/r_ioport.o(.data*)
- . = ALIGN(4);
- __loader_data_end = .;
- __loader_bss_start = .;
- */fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(.bss*)
- */fsp/src/bsp/mcu/all/*/bsp_irq_core.o(.bss*)
- */fsp/src/bsp/mcu/all/bsp_clocks.o(.bss*)
- */fsp/src/bsp/mcu/all/bsp_irq.o(.bss*)
- */fsp/src/bsp/mcu/all/bsp_register_protection.o(.bss*)
- */fsp/src/bsp/mcu/all/bsp_cache.o(.bss*)
- */fsp/src/r_ioport/r_ioport.o(.bss*)
- */fsp/src/bsp/cmsis/Device/RENESAS/Source/*.o(COMMON)
- */fsp/src/bsp/mcu/all/*/bsp_irq_core.o(COMMON)
- */fsp/src/bsp/mcu/all/bsp_clocks.o(COMMON)
- */fsp/src/bsp/mcu/all/bsp_irq.o(COMMON)
- */fsp/src/bsp/mcu/all/bsp_register_protection.o(.COMMON)
- */fsp/src/bsp/mcu/all/bsp_cache.o(COMMON)
- */fsp/src/r_ioport/r_ioport.o(.COMMON)
- . = ALIGN(4);
- __loader_bss_end = . ;
- _loader_data_end = .;
- } > LOADER_STACK
- .intvec INTVEC_ADDRESS : AT (_mfvector)
- {
- _fvector_start = .;
- KEEP(*(.intvec))
- _fvector_end = .;
- } > RAM
- .text TEXT_ADDRESS : AT (_mtext)
- {
- _text_start = .;
- *(.text*)
-
- KEEP(*(.reset_handler))
- KEEP(*(.init))
- KEEP(*(.fini))
-
- /* .ctors */
- *crtbegin.o(.ctors)
- *crtbegin?.o(.ctors)
- *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
- *(SORT(.ctors.*))
- *(.ctors)
- _ctor_end = .;
-
- /* .dtors */
- *crtbegin.o(.dtors)
- *crtbegin?.o(.dtors)
- *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
- *(SORT(.dtors.*))
- *(.dtors)
- _dtor_end = .;
-
- /* section information for utest */
- . = ALIGN(4);
- __rt_utest_tc_tab_start = .;
- KEEP(*(UtestTcTab))
- __rt_utest_tc_tab_end = .;
-
- /* section information for finsh shell */
- . = ALIGN(4);
- __fsymtab_start = .;
- KEEP(*(FSymTab))
- __fsymtab_end = .;
-
- . = ALIGN(4);
- __vsymtab_start = .;
- KEEP(*(VSymTab))
- __vsymtab_end = .;
-
- /* section information for initial. */
- . = ALIGN(4);
- __rt_init_start = .;
- KEEP(*(SORT(.rti_fn*)))
- __rt_init_end = .;
-
- /* new GCC version uses .init_array */
- PROVIDE(__ctors_start__ = .);
- KEEP (*(SORT(.init_array.*)))
- KEEP (*(.init_array))
- PROVIDE(__ctors_end__ = .);
-
- . = ALIGN(4);
- KEEP(*(FalPartTable))
-
- KEEP(*(.eh_frame*))
- } > RAM
- .rvectors :
- {
- _rvectors_start = .;
- KEEP(*(.rvectors))
- _rvectors_end = .;
- } > RAM
- .ARM.extab :
- {
- *(.ARM.extab* .gnu.linkonce.armextab.*)
- } > RAM
- __exidx_start = .;
- .ARM.exidx :
- {
- *(.ARM.exidx* .gnu.linkonce.armexidx.*)
- } > RAM
- __exidx_end = .;
- .got :
- {
- *(.got)
- *(.got.plt)
- . = ALIGN(4);
- _text_end = .;
- } > RAM
- .dummy _fvector_end : AT (_mdummy)
- {
- _dummy_start = .;
- KEEP(*(.dummy));
- _dummy_end = .;
- } > DUMMY
- .data : AT (_mdata)
- {
- _data_start = .;
-
- *(vtable)
- *(.data.*)
- *(.data)
-
- *(.rodata*)
- _erodata = .;
-
- . = ALIGN(4);
- /* preinit data */
- PROVIDE_HIDDEN (__preinit_array_start = .);
- KEEP(*(.preinit_array))
- PROVIDE_HIDDEN (__preinit_array_end = .);
-
- . = ALIGN(4);
- /* init data */
- PROVIDE_HIDDEN (__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE_HIDDEN (__init_array_end = .);
-
- . = ALIGN(4);
- /* finit data */
- PROVIDE_HIDDEN (__fini_array_start = .);
- KEEP(*(SORT(.fini_array.*)))
- KEEP(*(.fini_array))
- PROVIDE_HIDDEN (__fini_array_end = .);
-
- KEEP(*(.jcr*))
-
- . = ALIGN(4);
-
- /* All data end */
- _data_end = .;
- } > RAM
- .bss :
- {
- . = ALIGN(4);
- __bss_start__ = .;
- _bss = .;
- *(.bss*)
- *(COMMON)
- . = ALIGN(4);
- __bss_end__ = .;
- _ebss = .;
- _end = .;
- } > RAM
- .heap (NOLOAD) :
- {
- . = ALIGN(8);
- __HeapBase = .;
- /* Place the STD heap here. */
- KEEP(*(.heap))
- __HeapLimit = .;
- } > RAM
- .thread_stack (NOLOAD):
- {
- . = ALIGN(8);
- __ThreadStackBase = .;
- /* Place the Thread stacks here. */
- KEEP(*(.stack*))
- __ThreadStackLimit = .;
- } > RAM
- .sys_stack (NOLOAD) :
- {
- . = ALIGN(8);
- __SysStackBase = .;
- /* Place the sys_stack here. */
- KEEP(*(.sys_stack))
- __SysStackLimit = .;
- } > LOADER_STACK
- .svc_stack (NOLOAD) :
- {
- . = ALIGN(8);
- __SvcStackBase = .;
- /* Place the svc_stack here. */
- KEEP(*(.svc_stack))
- __SvcStackLimit = .;
- } > LOADER_STACK
- .irq_stack (NOLOAD) :
- {
- . = ALIGN(8);
- __IrqStackBase = .;
- /* Place the irq_stack here. */
- KEEP(*(.irq_stack))
- __IrqStackLimit = .;
- } > LOADER_STACK
- .fiq_stack (NOLOAD) :
- {
- . = ALIGN(8);
- __FiqStackBase = .;
- /* Place the fiq_stack here. */
- KEEP(*(.fiq_stack))
- __FiqStackLimit = .;
- } > LOADER_STACK
- .und_stack (NOLOAD) :
- {
- . = ALIGN(8);
- __UndStackBase = .;
- /* Place the und_stack here. */
- KEEP(*(.und_stack))
- __UndStackLimit = .;
- } > LOADER_STACK
- .abt_stack (NOLOAD) :
- {
- . = ALIGN(8);
- __AbtStackBase = .;
- /* Place the abt_stack here. */
- KEEP(*(.abt_stack))
- __AbtStackLimit = .;
- } > LOADER_STACK
- .data_noncache DATA_NONCACHE_START : AT (_mdata_noncache)
- {
- . = ALIGN(4);
- _data_noncache_start = .;
- KEEP(*(.data_noncache*))
- _data_noncache_end = .;
- } > DATA_NONCACHE
- .dmac_link_mode DMAC_LINK_MODE_START : AT (DMAC_LINK_MODE_START)
- {
- . = ALIGN(4);
- _DmacLinkMode_start = .;
- KEEP(*(.dmac_link_mode*))
- _DmacLinkMode_end = .;
- } > DMAC_LINK_MODE
- .shared_noncache_buffer SHARED_NONCACHE_BUFFER_START (NOLOAD) : AT (SHARED_NONCACHE_BUFFER_START)
- {
- . = ALIGN(32);
- _sncbuffer_start = .;
- KEEP(*(.shared_noncache_buffer*))
- _sncbuffer_end = .;
- } > SHARED_NONCACHE_BUFFER
- .noncache_buffer NONCACHE_BUFFER_START (NOLOAD) : AT (NONCACHE_BUFFER_START)
- {
- . = ALIGN(32);
- _ncbuffer_start = .;
- KEEP(*(.noncache_buffer*))
- _ncbuffer_end = .;
- } > NONCACHE_BUFFER
-}
diff --git a/rt-thread/components/drivers/rtc/alarm.c b/rt-thread/components/drivers/rtc/alarm.c
index b78528a..dece455 100644
--- a/rt-thread/components/drivers/rtc/alarm.c
+++ b/rt-thread/components/drivers/rtc/alarm.c
@@ -42,7 +42,11 @@ static rt_err_t alarm_set(struct rt_alarm *alarm)
struct rt_rtc_wkalarm wkalarm;
rt_err_t ret;
+#ifdef RT_USING_SOFT_RTC
+ device = rt_device_find("sw_rtc");
+#else
device = rt_device_find("rtc");
+#endif
if (device == RT_NULL)
{
diff --git a/rt-thread/components/drivers/rtc/soft_rtc.c b/rt-thread/components/drivers/rtc/soft_rtc.c
index 0eab72e..dcd4721 100644
--- a/rt-thread/components/drivers/rtc/soft_rtc.c
+++ b/rt-thread/components/drivers/rtc/soft_rtc.c
@@ -226,8 +226,8 @@ static int rt_soft_rtc_init(void)
{
return 0;
}
- /* make sure only one 'rtc' device */
- RT_ASSERT(!rt_device_find("rtc"));
+ /* make sure only one 'sw_rtc' device */
+ RT_ASSERT(!rt_device_find("sw_rtc"));
#ifdef RT_USING_ALARM
rt_timer_init(&alarm_time,
@@ -258,7 +258,9 @@ static int rt_soft_rtc_init(void)
/* no private */
soft_rtc_dev.user_data = RT_NULL;
- rt_device_register(&soft_rtc_dev, "rtc", RT_DEVICE_FLAG_RDWR);
+ rt_device_register(&soft_rtc_dev, "sw_rtc", RT_DEVICE_FLAG_RDWR);
+
+ source_device = &soft_rtc_dev;
init_ok = RT_TRUE;
@@ -317,7 +319,7 @@ static void cmd_rtc_sync(int argc, char **argv)
rt_kprintf("local time: %.*s", 25, ctime(&now));
rt_kprintf("timestamps: %ld\n", (long)tv.tv_sec);
}
-MSH_CMD_EXPORT_ALIAS(cmd_rtc_sync, rtc_sync, Update time by real rtc);
+MSH_CMD_EXPORT_ALIAS(cmd_rtc_sync, rtc_sync, Update time by soft rtc);
#endif
#endif /* RT_USING_SYSTEM_WORKQUEUE */
diff --git a/rt-thread/libcpu/arm/cortex-r52/context_gcc.S b/rt-thread/libcpu/arm/cortex-r52/context_gcc.S
index e95c631..1bd581e 100644
--- a/rt-thread/libcpu/arm/cortex-r52/context_gcc.S
+++ b/rt-thread/libcpu/arm/cortex-r52/context_gcc.S
@@ -8,7 +8,6 @@
* 2024-03-01 Wangyuqiang first version
*/
-#include "rtconfig.h"
.syntax unified
.text
diff --git a/rt-thread/libcpu/arm/cortex-r52/start_gcc.S b/rt-thread/libcpu/arm/cortex-r52/start_gcc.S
index 787d3e4..73d70a6 100644
--- a/rt-thread/libcpu/arm/cortex-r52/start_gcc.S
+++ b/rt-thread/libcpu/arm/cortex-r52/start_gcc.S
@@ -12,8 +12,6 @@
@ (c) Texas Instruments 2009-2013, All rights reserved.
@
-//#include
-
.equ Mode_USR, 0x10
.equ Mode_FIQ, 0x11
.equ Mode_IRQ, 0x12
@@ -47,7 +45,7 @@ stack_top:
.text
.arm
- .globl _c_int00
+ .globl entry
.globl _reset
_reset:
@@ -122,7 +120,7 @@ next2:
next3:
bl next4
next4:
- ldr lr, =_c_int00
+ ldr lr, =entry
bx lr
.globl data_init
@@ -479,26 +477,38 @@ turnon_VFP:
str lr, [r0, #14*4] @/* Save calling PC */
.endm
- .globl vector_svc
-vector_svc:
- push_svc_reg
- bl rt_hw_trap_svc
- b .
-
- .globl vector_pabort
-vector_pabort:
- push_svc_reg
- bl rt_hw_trap_pabt
- b .
-
- .globl vector_dabort
-vector_dabort:
- push_svc_reg
- bl rt_hw_trap_dabt
- b .
-
- .globl vector_resv
-vector_resv:
- push_svc_reg
- bl rt_hw_trap_resv
- b .
+.globl SWI_Handler
+SWI_Handler:
+ push_svc_reg
+ bl rt_hw_trap_swi
+ b .
+
+.globl Undefined_Handler
+Undefined_Handler:
+ push_svc_reg
+ bl rt_hw_trap_undef
+ b .
+
+.globl SVC_Handler
+SVC_Handler:
+ push_svc_reg
+ b rt_hw_trap_svc
+ b .
+
+.globl Prefetch_Handler
+Prefetch_Handler:
+ push_svc_reg
+ b rt_hw_trap_pabt
+ b .
+
+.globl Abort_Handler
+Abort_Handler:
+ push_svc_reg
+ b rt_hw_trap_dabt
+ b .
+
+.globl Reserved_Handler
+Reserved_Handler:
+ push_svc_reg
+ b rt_hw_trap_resv
+ b .
diff --git a/rt-thread/libcpu/arm/cortex-r52/start_iar.S b/rt-thread/libcpu/arm/cortex-r52/start_iar.S
index 9e110dd..ec096d5 100644
--- a/rt-thread/libcpu/arm/cortex-r52/start_iar.S
+++ b/rt-thread/libcpu/arm/cortex-r52/start_iar.S
@@ -31,11 +31,13 @@ ABT_Stack_Size EQU 0x00000000
FIQ_Stack_Size EQU 0x00001000
IRQ_Stack_Size EQU 0x00001000
- IMPORT _c_int00
+ IMPORT entry
IMPORT rt_hw_trap_svc
IMPORT rt_hw_trap_pabt
IMPORT rt_hw_trap_dabt
IMPORT rt_hw_trap_resv
+ IMPORT rt_hw_trap_swi
+ IMPORT rt_hw_trap_undef
IMPORT system_init
IMPORT __iar_program_start
@@ -308,6 +310,18 @@ turnon_VFP:
str lr, [r0, #14*4] ;@/* Save calling PC */
endm
+ EXPORT SWI_Handler
+SWI_Handler:
+ push_svc_reg
+ bl rt_hw_trap_swi
+ b .
+
+ EXPORT Undefined_Handler
+Undefined_Handler:
+ push_svc_reg
+ bl rt_hw_trap_undef
+ b .
+
EXPORT SVC_Handler
SVC_Handler:
push_svc_reg
diff --git a/rt-thread/libcpu/arm/cortex-r52/vector_gcc.S b/rt-thread/libcpu/arm/cortex-r52/vector_gcc.S
index a0421d5..85686ed 100644
--- a/rt-thread/libcpu/arm/cortex-r52/vector_gcc.S
+++ b/rt-thread/libcpu/arm/cortex-r52/vector_gcc.S
@@ -19,7 +19,8 @@
@ import reference for interrupt routines
.globl Reset_Handler
- .globl turnon_VFP
+ .globl Undefined_Handler
+ .globl SWI_Handler
.globl SVC_Handler
.globl Prefetch_Handler
.globl Abort_Handler
@@ -28,10 +29,11 @@
.globl FIQ_Handler
-.globl system_vectors
-system_vectors:
+.globl system_vector
+system_vector:
b Reset_Handler
- b turnon_VFP
+ b Undefined_Handler
+ b SWI_Handler
b SVC_Handler
b Prefetch_Handler
b Abort_Handler
diff --git a/rt-thread/libcpu/arm/cortex-r52/vector_iar.S b/rt-thread/libcpu/arm/cortex-r52/vector_iar.S
index 916e44d..57de4e8 100644
--- a/rt-thread/libcpu/arm/cortex-r52/vector_iar.S
+++ b/rt-thread/libcpu/arm/cortex-r52/vector_iar.S
@@ -20,6 +20,7 @@
IMPORT Reset_Handler
IMPORT Undefined_Handler
+ IMPORT SWI_Handler
IMPORT SVC_Handler
IMPORT Prefetch_Handler
IMPORT Abort_Handler
@@ -35,6 +36,7 @@
system_vectors:
b Reset_Handler
b Undefined_Handler
+ b SWI_Handler
b SVC_Handler
b Prefetch_Handler
b Abort_Handler
diff --git a/rt-thread/src/components.c b/rt-thread/src/components.c
index c958cfe..df123c1 100644
--- a/rt-thread/src/components.c
+++ b/rt-thread/src/components.c
@@ -242,18 +242,9 @@ int rtthread_startup(void)
#ifdef RT_USING_SMP
rt_hw_spin_lock_init(&_cpus_lock);
#endif
-// __asm volatile("B .");
rt_hw_local_irq_disable();
- // __asm volatile (
- // "MRS r0, cpsr\n" // 将 CPSR 寄存器的值读入 r0
- // "CPSID IF\n" // 禁用中断
- // );
-
- /* board level initialization
- * NOTE: please initialize heap inside board initialization.
- */
rt_hw_board_init();
/* show RT-Thread version */