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Microcontroller optimizations. #55
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Thus far we've generally focused on pure Rust implementations (cc @newpavlov) however some precedent for ASM can be found in https://github.com/RustCrypto/asm-hashes, which we then conditionally pull into the otherwise pure Rust hash implementation gated under an https://github.com/RustCrypto/hashes/blob/master/sha2/Cargo.toml#L37 To get the ball rolling, I'd suggest adding the ASM directly to the I'm curious how @newpavlov feels about including some inline assembly directly into the same crate if it's gated under an |
If it will be implemented using the new P.S.: I also would like to keep licensing simple, so it would be nice if the assembly code will be re-licensed under MIT/Apache as part of the PR. |
I have a rather fast implementation of the base field for Cortex-M4/M33 microcontrollers,
wrappingstealing the assembly routines in https://github.com/Emill/P256-cortex-ecdh/blob/master/P256-cortex-m4-ecdh-speedopt-gcc.s. Would there be interest to include platform-specific arithmetic implementations in this crate, or should I focus on a "lean and mean" MCU fork?Some complications are:
[u32; 8]
for base fieldbuild.rs
, possibly overridableqemu-tests
sub-libraryproptest
indev-dependencies
breaks the build forno_std
due Cargo feature additivity (byteorder
with default features, as so often), not sure how to fix this :/hex
isstd
This relates to other decisions as well, such as in #54 whether to enforce correct but slow constant-time scalar inversion, or open the door to non-constant time implementations which might be abused.
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