CPU Shadow Registers for UPDI Debugging

[MX682X]

While tinkkering on something I discovered that the UPDI debugger is accessing the memory between 0xF80 and 0xFC0. This is in an undocumented Peripheral Memory area between SYSCFG and NVMCTRL:
0xF80 - HW breakpoint A (in bytes, thus no bit 0) [4 bytes, 2/3 writable]
0xF84 - HW breakpoint B (in bytes, thus no bit 0) [4 bytes, 2/3 writable]
0xF88 - Halt Status? [1 byte, 0x07 Mask]
0xF89 - Unknown. 0x20 on reset [1 byte, 0xF0 Mask]
0xF8C - 0x84 on reset, otherwise 0x04, unwritable [1 byte] ( bitmask Haltstate?)
0xF8D - Halt Source? (0x02 - Breakpoint B, 0x01 - Step)

0xF90 - Unknown, unwritable [4 bytes]
0xF94 - Shadow PC (in words, but always plus one) [4 bytes, 2/3 writable]
0xF98 - Shadow SP [4 bytes, 2 writable]
0xF9C - Shadow SREG [4 bytes, 1 writable]
0xFA0 - CPU Shadow Register [32 bytes]

Run and step were chosen according to how they were used by Microchip studio. I've only checked it with Attiny1614 though.
I was not able to confirm that HW Breakpoint A works, as Microchip studios writes both on pressing Run