From f5a8af3489adbffb3dcba0b3fccc2171d3696187 Mon Sep 17 00:00:00 2001
From: Uri Shaked <uri@urishaked.com>
Date: Mon, 1 Apr 2024 17:15:27 +0300
Subject: [PATCH] docs(test): add `-B` flag to make

This ensures we're always rebuilding the simulation before running the tests.
---
 test/README.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/test/README.md b/test/README.md
index 1a5abbf..a91cd20 100644
--- a/test/README.md
+++ b/test/README.md
@@ -12,7 +12,7 @@ This is a sample testbench for a Tiny Tapeout project. It uses [cocotb](https://
 To run the RTL simulation:
 
 ```sh
-make
+make -B
 ```
 
 To run gatelevel simulation, first harden your project and copy `../runs/wokwi/results/final/verilog/gl/{your_module_name}.v` to `gate_level_netlist.v`.
@@ -20,7 +20,7 @@ To run gatelevel simulation, first harden your project and copy `../runs/wokwi/r
 Then run:
 
 ```sh
-make GATES=yes
+make -B GATES=yes
 ```
 
 ## How to view the VCD file