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Sorry to bother but I couldn't find code or doc for multi-core usage. Anyone knows how to run.
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I think not because core1‘s reset signal is hard linked to zero .
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It is used in this dual core development kit, so there should be a way to do a multicore configuration:
https://linuxgizmos.com/dev-kit-debuts-risc-v-xuantie-c910-soc-with-a-3d-gpu-and-android-and-linux-support/
I have no idea how though.
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Sorry to bother but I couldn't find code or doc for multi-core usage. Anyone knows how to run.
The text was updated successfully, but these errors were encountered: