From 48f1471512288a93f8b32dd7554b0df5f30e219d Mon Sep 17 00:00:00 2001 From: Andrew Leech Date: Mon, 15 Aug 2022 14:21:47 +1000 Subject: [PATCH] stm32/boards: Enable RAM_ISR feature on uart repl boards. mpconfigboard.mk: MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 Fixes file transfer on the stlink usb / uart repl port. Signed-off-by: Andrew Leech --- ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.mk | 1 + .../stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.mk | 1 + ports/stm32/boards/B_L072Z_LRWAN1/mpconfigboard.mk | 1 + ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk | 2 ++ ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.mk | 1 + ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.mk | 2 ++ ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.mk | 2 ++ ports/stm32/boards/NUCLEO_F412ZG/mpconfigboard.mk | 2 ++ ports/stm32/boards/NUCLEO_F413ZH/mpconfigboard.mk | 2 ++ ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.mk | 1 + ports/stm32/boards/NUCLEO_F439ZI/mpconfigboard.mk | 1 + ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.mk | 2 ++ ports/stm32/boards/NUCLEO_F722ZE/mpconfigboard.mk | 2 ++ ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.mk | 1 + ports/stm32/boards/NUCLEO_F756ZG/mpconfigboard.mk | 1 + ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk | 1 + ports/stm32/boards/NUCLEO_G0B1RE/mpconfigboard.mk | 2 ++ ports/stm32/boards/NUCLEO_G474RE/mpconfigboard.mk | 2 ++ ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.mk | 1 + ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.mk | 1 + ports/stm32/boards/NUCLEO_L073RZ/mpconfigboard.mk | 1 + ports/stm32/boards/NUCLEO_L152RE/mpconfigboard.mk | 2 ++ ports/stm32/boards/NUCLEO_L432KC/mpconfigboard.mk | 1 + ports/stm32/boards/NUCLEO_L452RE/mpconfigboard.mk | 2 ++ ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk | 2 ++ ports/stm32/boards/NUCLEO_L4A6ZG/mpconfigboard.mk | 2 ++ ports/stm32/boards/NUCLEO_WB55/mpconfigboard.mk | 1 + ports/stm32/boards/NUCLEO_WL55/mpconfigboard.mk | 1 + ports/stm32/boards/OLIMEX_H407/mpconfigboard.mk | 2 ++ ports/stm32/boards/STM32F429DISC/mpconfigboard.mk | 2 ++ ports/stm32/boards/STM32F769DISC/f769_qspi.ld | 11 ++++++++++- ports/stm32/boards/STM32F769DISC/mpconfigboard.mk | 1 + ports/stm32/boards/STM32F7DISC/mpconfigboard.mk | 1 + ports/stm32/boards/STM32H573I_DK/mpconfigboard.mk | 2 ++ ports/stm32/boards/STM32H7B3I_DK/mpconfigboard.mk | 2 ++ ports/stm32/boards/STM32L476DISC/mpconfigboard.mk | 2 ++ ports/stm32/boards/STM32L496GDISC/mpconfigboard.mk | 2 ++ 37 files changed, 65 insertions(+), 1 deletion(-) diff --git a/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.mk b/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.mk index b927388c5577..b0535dd52fbd 100644 --- a/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.mk +++ b/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.mk @@ -23,6 +23,7 @@ MICROPY_PY_LWIP = 1 MICROPY_PY_NETWORK_CYW43 = 1 MICROPY_PY_SSL = 1 MICROPY_SSL_MBEDTLS = 1 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py MBEDTLS_CONFIG_FILE = '"$(BOARD_DIR)/mbedtls_config_board.h"' diff --git a/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.mk b/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.mk index cf4d40e5fe9b..3c71ffca095b 100644 --- a/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.mk +++ b/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.mk @@ -23,6 +23,7 @@ MICROPY_PY_LWIP = 1 MICROPY_PY_NETWORK_CYW43 = 1 MICROPY_PY_SSL = 1 MICROPY_SSL_MBEDTLS = 1 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py MBEDTLS_CONFIG_FILE = '"$(BOARD_DIR)/mbedtls_config_board.h"' diff --git a/ports/stm32/boards/B_L072Z_LRWAN1/mpconfigboard.mk b/ports/stm32/boards/B_L072Z_LRWAN1/mpconfigboard.mk index 708c3cf1336c..81601b412a1a 100644 --- a/ports/stm32/boards/B_L072Z_LRWAN1/mpconfigboard.mk +++ b/ports/stm32/boards/B_L072Z_LRWAN1/mpconfigboard.mk @@ -6,6 +6,7 @@ LD_FILES = boards/stm32l072xz.ld boards/common_basic.ld # MicroPython settings MICROPY_VFS_FAT = 0 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 # Don't include default frozen modules because MCU is tight on flash space FROZEN_MANIFEST ?= diff --git a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk b/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk index 137b6be23d01..173cc5dd8020 100644 --- a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk +++ b/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.mk @@ -5,3 +5,5 @@ CMSIS_MCU = STM32L475xx AF_FILE = boards/stm32l476_af.csv LD_FILES = boards/stm32l476xg.ld boards/common_basic.ld OPENOCD_CONFIG = boards/openocd_stm32l4.cfg + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.mk index bb7142d1b3e2..7d1f03dba480 100644 --- a/ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.mk @@ -6,6 +6,7 @@ LD_FILES = boards/stm32f091xc.ld boards/common_basic.ld # MicroPython settings MICROPY_VFS_FAT = 0 MICROPY_VFS_LFS1 ?= 1 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 # Don't include default frozen modules because MCU is tight on flash space FROZEN_MANIFEST ?= diff --git a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.mk index 4c3022f54435..a54ad89a9744 100644 --- a/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_F401RE/mpconfigboard.mk @@ -4,3 +4,5 @@ AF_FILE = boards/stm32f401_af.csv LD_FILES = boards/stm32f401xe.ld boards/common_ifs.ld TEXT0_ADDR = 0x08000000 TEXT1_ADDR = 0x08020000 + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.mk index df9506522574..f74475887495 100644 --- a/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_F411RE/mpconfigboard.mk @@ -4,3 +4,5 @@ AF_FILE = boards/stm32f411_af.csv LD_FILES = boards/stm32f411.ld boards/common_ifs.ld TEXT0_ADDR = 0x08000000 TEXT1_ADDR = 0x08020000 + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/NUCLEO_F412ZG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F412ZG/mpconfigboard.mk index dd671a9f9014..2c690baa4c9e 100644 --- a/ports/stm32/boards/NUCLEO_F412ZG/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_F412ZG/mpconfigboard.mk @@ -4,3 +4,5 @@ AF_FILE = boards/stm32f412_af.csv LD_FILES = boards/stm32f412zx.ld boards/common_ifs.ld TEXT0_ADDR = 0x08000000 TEXT1_ADDR = 0x08020000 + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/NUCLEO_F413ZH/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F413ZH/mpconfigboard.mk index 7d8ea6bf6bbb..6e6d76f17357 100644 --- a/ports/stm32/boards/NUCLEO_F413ZH/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_F413ZH/mpconfigboard.mk @@ -4,3 +4,5 @@ AF_FILE = boards/stm32f413_af.csv LD_FILES = boards/stm32f413xh.ld boards/common_ifs.ld TEXT0_ADDR = 0x08000000 TEXT1_ADDR = 0x08060000 + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.mk index e5fc89ab47aa..6d58b6046133 100644 --- a/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.mk @@ -9,5 +9,6 @@ TEXT1_ADDR = 0x08020000 MICROPY_PY_LWIP = 1 MICROPY_PY_SSL = 1 MICROPY_SSL_MBEDTLS = 1 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py diff --git a/ports/stm32/boards/NUCLEO_F439ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F439ZI/mpconfigboard.mk index b8666755b034..eda8399d53c3 100644 --- a/ports/stm32/boards/NUCLEO_F439ZI/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_F439ZI/mpconfigboard.mk @@ -9,5 +9,6 @@ TEXT1_ADDR = 0x08020000 MICROPY_PY_LWIP = 1 MICROPY_PY_SSL = 1 MICROPY_SSL_MBEDTLS = 1 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py diff --git a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.mk index 3a922acebfbd..e98224807496 100644 --- a/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_F446RE/mpconfigboard.mk @@ -4,3 +4,5 @@ AF_FILE = boards/stm32f446_af.csv LD_FILES = boards/stm32f411.ld boards/common_ifs.ld TEXT0_ADDR = 0x08000000 TEXT1_ADDR = 0x08020000 + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/NUCLEO_F722ZE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F722ZE/mpconfigboard.mk index 667c8e55da98..615fab888095 100644 --- a/ports/stm32/boards/NUCLEO_F722ZE/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_F722ZE/mpconfigboard.mk @@ -4,3 +4,5 @@ AF_FILE = boards/stm32f722_af.csv LD_FILES = boards/stm32f722.ld boards/common_ifs.ld TEXT0_ADDR = 0x08000000 TEXT1_ADDR = 0x08020000 + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.mk index 20acc63f160e..a32d553597d8 100644 --- a/ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_F746ZG/mpconfigboard.mk @@ -9,5 +9,6 @@ TEXT1_ADDR = 0x08020000 MICROPY_PY_LWIP = 1 MICROPY_PY_SSL = 1 MICROPY_SSL_MBEDTLS = 1 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py diff --git a/ports/stm32/boards/NUCLEO_F756ZG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F756ZG/mpconfigboard.mk index ab3eada5b067..0e5ae898ea46 100644 --- a/ports/stm32/boards/NUCLEO_F756ZG/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_F756ZG/mpconfigboard.mk @@ -9,5 +9,6 @@ TEXT1_ADDR = 0x08020000 MICROPY_PY_LWIP = 1 MICROPY_PY_SSL = 1 MICROPY_SSL_MBEDTLS = 1 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py diff --git a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk index 22c40981591c..fc295bcd9429 100644 --- a/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_F767ZI/mpconfigboard.mk @@ -10,5 +10,6 @@ TEXT1_ADDR = 0x08020000 MICROPY_PY_LWIP = 1 MICROPY_PY_SSL = 1 MICROPY_SSL_MBEDTLS = 1 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py diff --git a/ports/stm32/boards/NUCLEO_G0B1RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_G0B1RE/mpconfigboard.mk index abc9b43ef036..c4d14abbfc08 100644 --- a/ports/stm32/boards/NUCLEO_G0B1RE/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_G0B1RE/mpconfigboard.mk @@ -11,3 +11,5 @@ endif # LTO reduces final binary size, may be slower to build depending on gcc version and hardware LTO ?= 1 + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/NUCLEO_G474RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_G474RE/mpconfigboard.mk index 24a06e08ec43..1a388a6c147c 100644 --- a/ports/stm32/boards/NUCLEO_G474RE/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_G474RE/mpconfigboard.mk @@ -4,3 +4,5 @@ CMSIS_MCU = STM32G474xx MICROPY_FLOAT_IMPL = single AF_FILE = boards/stm32g474_af.csv LD_FILES = boards/stm32g474.ld boards/common_basic.ld + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.mk index 6d512ec0eda2..43304ee70eae 100644 --- a/ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.mk @@ -21,5 +21,6 @@ MICROPY_PY_LWIP = 1 MICROPY_PY_SSL = 1 MICROPY_SSL_MBEDTLS = 1 MICROPY_VFS_LFS2 = 1 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 FROZEN_MANIFEST ?= $(BOARD_DIR)/manifest.py diff --git a/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.mk index cbdf48c52a86..7b97aa69da88 100644 --- a/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.mk @@ -21,5 +21,6 @@ MICROPY_PY_LWIP = 1 MICROPY_PY_SSL = 1 MICROPY_SSL_MBEDTLS = 1 MICROPY_VFS_LFS2 = 1 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 FROZEN_MANIFEST ?= $(BOARD_DIR)/manifest.py diff --git a/ports/stm32/boards/NUCLEO_L073RZ/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_L073RZ/mpconfigboard.mk index 72b13a70b215..0be13bb09a7d 100644 --- a/ports/stm32/boards/NUCLEO_L073RZ/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_L073RZ/mpconfigboard.mk @@ -5,6 +5,7 @@ LD_FILES = boards/stm32l072xz.ld boards/common_basic.ld # MicroPython settings MICROPY_VFS_FAT = 0 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 # Don't include default frozen modules because MCU is tight on flash space FROZEN_MANIFEST ?= diff --git a/ports/stm32/boards/NUCLEO_L152RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_L152RE/mpconfigboard.mk index a62a775ac8dd..c44c01d7bede 100644 --- a/ports/stm32/boards/NUCLEO_L152RE/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_L152RE/mpconfigboard.mk @@ -2,3 +2,5 @@ MCU_SERIES = l1 CMSIS_MCU = STM32L152xE AF_FILE = boards/stm32l152_af.csv LD_FILES = boards/stm32l152xe.ld boards/common_basic.ld + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/NUCLEO_L432KC/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_L432KC/mpconfigboard.mk index c3fff8100251..49c7c0487544 100644 --- a/ports/stm32/boards/NUCLEO_L432KC/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_L432KC/mpconfigboard.mk @@ -7,6 +7,7 @@ OPENOCD_CONFIG = boards/openocd_stm32l4.cfg # MicroPython settings MICROPY_VFS_FAT = 0 MICROPY_VFS_LFS1 ?= 1 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 # Don't include default frozen modules because MCU is tight on flash space FROZEN_MANIFEST ?= diff --git a/ports/stm32/boards/NUCLEO_L452RE/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_L452RE/mpconfigboard.mk index 25ccb45a9427..81eea096b618 100644 --- a/ports/stm32/boards/NUCLEO_L452RE/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_L452RE/mpconfigboard.mk @@ -3,3 +3,5 @@ CMSIS_MCU = STM32L452xx AF_FILE = boards/stm32l452_af.csv LD_FILES = boards/stm32l452xe.ld boards/common_basic.ld OPENOCD_CONFIG = boards/openocd_stm32l4.cfg + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk index 10c69461c930..fe22965b0b1b 100644 --- a/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.mk @@ -3,3 +3,5 @@ CMSIS_MCU = STM32L476xx AF_FILE = boards/stm32l476_af.csv LD_FILES = boards/stm32l476xg.ld boards/common_basic.ld OPENOCD_CONFIG = boards/openocd_stm32l4.cfg + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/NUCLEO_L4A6ZG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_L4A6ZG/mpconfigboard.mk index 51caeaa3a1f9..7358826a2d33 100644 --- a/ports/stm32/boards/NUCLEO_L4A6ZG/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_L4A6ZG/mpconfigboard.mk @@ -3,3 +3,5 @@ CMSIS_MCU = STM32L4A6xx AF_FILE = boards/stm32l496_af.csv LD_FILES = boards/stm32l496xg.ld boards/common_basic.ld OPENOCD_CONFIG = boards/openocd_stm32l4.cfg + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/NUCLEO_WB55/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_WB55/mpconfigboard.mk index 2e6ce1fe8f77..dcc294e75ed2 100644 --- a/ports/stm32/boards/NUCLEO_WB55/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_WB55/mpconfigboard.mk @@ -17,3 +17,4 @@ endif MICROPY_PY_BLUETOOTH = 1 MICROPY_BLUETOOTH_NIMBLE = 1 MICROPY_VFS_LFS2 = 1 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/NUCLEO_WL55/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_WL55/mpconfigboard.mk index 210f3058c1be..6eefe81cfc63 100644 --- a/ports/stm32/boards/NUCLEO_WL55/mpconfigboard.mk +++ b/ports/stm32/boards/NUCLEO_WL55/mpconfigboard.mk @@ -8,6 +8,7 @@ TEXT0_ADDR = 0x08000000 # MicroPython settings MICROPY_VFS_FAT = 0 MICROPY_VFS_LFS2 = 1 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 # Don't include default frozen modules because MCU is tight on flash space FROZEN_MANIFEST ?= diff --git a/ports/stm32/boards/OLIMEX_H407/mpconfigboard.mk b/ports/stm32/boards/OLIMEX_H407/mpconfigboard.mk index b154dcfbacdc..840d4f772f38 100644 --- a/ports/stm32/boards/OLIMEX_H407/mpconfigboard.mk +++ b/ports/stm32/boards/OLIMEX_H407/mpconfigboard.mk @@ -4,3 +4,5 @@ AF_FILE = boards/stm32f405_af.csv LD_FILES = boards/stm32f405.ld boards/common_ifs.ld TEXT0_ADDR = 0x08000000 TEXT1_ADDR = 0x08020000 + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/STM32F429DISC/mpconfigboard.mk b/ports/stm32/boards/STM32F429DISC/mpconfigboard.mk index d19a35c31629..fb5bc22fd809 100644 --- a/ports/stm32/boards/STM32F429DISC/mpconfigboard.mk +++ b/ports/stm32/boards/STM32F429DISC/mpconfigboard.mk @@ -4,3 +4,5 @@ AF_FILE = boards/stm32f429_af.csv LD_FILES = boards/stm32f429.ld boards/common_ifs.ld TEXT0_ADDR = 0x08000000 TEXT1_ADDR = 0x08020000 + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/STM32F769DISC/f769_qspi.ld b/ports/stm32/boards/STM32F769DISC/f769_qspi.ld index b6515b066691..118bd580a03f 100644 --- a/ports/stm32/boards/STM32F769DISC/f769_qspi.ld +++ b/ports/stm32/boards/STM32F769DISC/f769_qspi.ld @@ -17,6 +17,7 @@ MEMORY { + FLASH_FS (r) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1, 2, 3 (32K each) */ FLASH_APP (rx) : ORIGIN = 0x08020000, LENGTH = 1920K /* sectors 4-11 1*128K 7*256K */ FLASH_QSPI (rx) : ORIGIN = 0x90000000, LENGTH = 64M /* external QSPI flash in XIP mode */ DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K /* Used for storage cache */ @@ -38,8 +39,16 @@ _ram_end = ORIGIN(RAM) + LENGTH(RAM); _heap_start = _ebss; /* heap starts just after statically allocated memory */ _heap_end = _sstack; +/* Filesystem cache in RAM, and storage in flash */ +_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(DTCM); +_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(DTCM) + LENGTH(DTCM); +_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS); +_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS); + + ENTRY(Reset_Handler) +REGION_ALIAS("FLASH_ISR", FLASH_APP); REGION_ALIAS("FLASH_COMMON", FLASH_APP); SECTIONS @@ -52,7 +61,7 @@ SECTIONS . = ALIGN(4); } >FLASH_QSPI - INCLUDE common_isr.ld + INCLUDE common_isr_gen.ld INCLUDE common_text.ld INCLUDE common_extratext_data_in_flash.ld INCLUDE common_bss_heap_stack.ld diff --git a/ports/stm32/boards/STM32F769DISC/mpconfigboard.mk b/ports/stm32/boards/STM32F769DISC/mpconfigboard.mk index 712906747ccd..745d4518d495 100644 --- a/ports/stm32/boards/STM32F769DISC/mpconfigboard.mk +++ b/ports/stm32/boards/STM32F769DISC/mpconfigboard.mk @@ -44,5 +44,6 @@ endif MICROPY_PY_LWIP = 1 MICROPY_PY_SSL = 1 MICROPY_SSL_MBEDTLS = 1 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py diff --git a/ports/stm32/boards/STM32F7DISC/mpconfigboard.mk b/ports/stm32/boards/STM32F7DISC/mpconfigboard.mk index 20acc63f160e..a32d553597d8 100644 --- a/ports/stm32/boards/STM32F7DISC/mpconfigboard.mk +++ b/ports/stm32/boards/STM32F7DISC/mpconfigboard.mk @@ -9,5 +9,6 @@ TEXT1_ADDR = 0x08020000 MICROPY_PY_LWIP = 1 MICROPY_PY_SSL = 1 MICROPY_SSL_MBEDTLS = 1 +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py diff --git a/ports/stm32/boards/STM32H573I_DK/mpconfigboard.mk b/ports/stm32/boards/STM32H573I_DK/mpconfigboard.mk index 99d3923f203c..3bb288aa2516 100644 --- a/ports/stm32/boards/STM32H573I_DK/mpconfigboard.mk +++ b/ports/stm32/boards/STM32H573I_DK/mpconfigboard.mk @@ -13,3 +13,5 @@ else LD_FILES = boards/stm32h573xi.ld boards/common_basic.ld TEXT0_ADDR = 0x08000000 endif + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/STM32H7B3I_DK/mpconfigboard.mk b/ports/stm32/boards/STM32H7B3I_DK/mpconfigboard.mk index 380ade8d025a..866c0ce34e4d 100644 --- a/ports/stm32/boards/STM32H7B3I_DK/mpconfigboard.mk +++ b/ports/stm32/boards/STM32H7B3I_DK/mpconfigboard.mk @@ -16,3 +16,5 @@ LD_FILES = boards/stm32h7b3.ld boards/common_ifs.ld TEXT0_ADDR = 0x08000000 TEXT1_ADDR = 0x08040000 endif + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/STM32L476DISC/mpconfigboard.mk b/ports/stm32/boards/STM32L476DISC/mpconfigboard.mk index 10c69461c930..fe22965b0b1b 100644 --- a/ports/stm32/boards/STM32L476DISC/mpconfigboard.mk +++ b/ports/stm32/boards/STM32L476DISC/mpconfigboard.mk @@ -3,3 +3,5 @@ CMSIS_MCU = STM32L476xx AF_FILE = boards/stm32l476_af.csv LD_FILES = boards/stm32l476xg.ld boards/common_basic.ld OPENOCD_CONFIG = boards/openocd_stm32l4.cfg + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1 diff --git a/ports/stm32/boards/STM32L496GDISC/mpconfigboard.mk b/ports/stm32/boards/STM32L496GDISC/mpconfigboard.mk index a85635e306d9..9d2bb319ddad 100644 --- a/ports/stm32/boards/STM32L496GDISC/mpconfigboard.mk +++ b/ports/stm32/boards/STM32L496GDISC/mpconfigboard.mk @@ -3,3 +3,5 @@ CMSIS_MCU = STM32L496xx AF_FILE = boards/stm32l496_af.csv LD_FILES = boards/stm32l496xg.ld boards/common_basic.ld OPENOCD_CONFIG = boards/openocd_stm32l4.cfg + +MICROPY_USE_RAM_ISR_UART_FLASH_FN = 1