diff --git a/ports/esp32/adc.c b/ports/esp32/adc.c
index 584439fbdf52..09cc2572e950 100644
--- a/ports/esp32/adc.c
+++ b/ports/esp32/adc.c
@@ -33,31 +33,29 @@
 #define DEFAULT_VREF 1100
 
 void madcblock_bits_helper(machine_adc_block_obj_t *self, mp_int_t bits) {
-    switch (bits) {
-        #if CONFIG_IDF_TARGET_ESP32
-        case 9:
-            self->width = ADC_WIDTH_BIT_9;
-            break;
-        case 10:
-            self->width = ADC_WIDTH_BIT_10;
-            break;
-        case 11:
-            self->width = ADC_WIDTH_BIT_11;
-            break;
-        #endif
-        #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6
-        case 12:
-            self->width = ADC_WIDTH_BIT_12;
-            break;
-        #endif
-        #if CONFIG_IDF_TARGET_ESP32S2
-        case 13:
-            self->width = ADC_WIDTH_BIT_13;
-            break;
-        #endif
-        default:
-            mp_raise_ValueError(MP_ERROR_TEXT("invalid bits"));
+    if (bits >= SOC_ADC_RTC_MIN_BITWIDTH && bits <= SOC_ADC_RTC_MIN_BITWIDTH) {
+        switch (bits) {
+            case 9:
+                self->width = ADC_BITWIDTH_9;
+                break;
+            case 10:
+                self->width = ADC_BITWIDTH_10;
+                break;
+            case 11:
+                self->width = ADC_BITWIDTH_11;
+                break;
+            case 12:
+                self->width = ADC_BITWIDTH_12;
+                break;
+            case 13:
+                self->width = ADC_BITWIDTH_13;
+                break;
+            default:
+        }
+    } else {
+        mp_raise_ValueError(MP_ERROR_TEXT("invalid bits"));
     }
+
     self->bits = bits;
 
     if (self->unit_id == ADC_UNIT_1) {
diff --git a/ports/esp32/machine_adc.c b/ports/esp32/machine_adc.c
index 11f7f3b07084..69a550bd09d2 100644
--- a/ports/esp32/machine_adc.c
+++ b/ports/esp32/machine_adc.c
@@ -35,7 +35,7 @@
 #define ADCBLOCK1 (&madcblock_obj[0])
 #define ADCBLOCK2 (&madcblock_obj[1])
 
-#if CONFIG_IDF_TARGET_ESP32
+#if SOC_ADC_RTC_MIN_BITWIDTH <= 9 && SOC_ADC_RTC_MAX_BITWIDTH >= 11
 #define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_9_10_11 \
     { MP_ROM_QSTR(MP_QSTR_WIDTH_9BIT), MP_ROM_INT(9) }, \
     { MP_ROM_QSTR(MP_QSTR_WIDTH_10BIT), MP_ROM_INT(10) }, \
@@ -44,14 +44,14 @@
 #define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_9_10_11
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3
+#if SOC_ADC_RTC_MIN_BITWIDTH <= 12 && SOC_ADC_RTC_MAX_BITWIDTH >= 12
 #define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_12 \
     { MP_ROM_QSTR(MP_QSTR_WIDTH_12BIT), MP_ROM_INT(12) },
 #else
 #define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_12
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32S2
+#if SOC_ADC_RTC_MIN_BITWIDTH <= 13 && SOC_ADC_RTC_MAX_BITWIDTH >= 13
 #define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_13 \
     { MP_ROM_QSTR(MP_QSTR_WIDTH_13BIT), MP_ROM_INT(13) },
 #else
@@ -87,13 +87,21 @@ static const machine_adc_obj_t madc_obj[] = {
     {{&machine_adc_type}, ADCBLOCK2, ADC_CHANNEL_7, GPIO_NUM_27},
     {{&machine_adc_type}, ADCBLOCK2, ADC_CHANNEL_8, GPIO_NUM_25},
     {{&machine_adc_type}, ADCBLOCK2, ADC_CHANNEL_9, GPIO_NUM_26},
-    #elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
+    #elif CONFIG_IDF_TARGET_ESP32C3
     {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_0, GPIO_NUM_0},
     {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_1, GPIO_NUM_1},
     {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_2, GPIO_NUM_2},
     {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_3, GPIO_NUM_3},
     {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_4, GPIO_NUM_4},
     {{&machine_adc_type}, ADCBLOCK2, ADC_CHANNEL_0, GPIO_NUM_5},
+    #elif CONFIG_IDF_TARGET_ESP32C6
+    {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_0, GPIO_NUM_0},
+    {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_1, GPIO_NUM_1},
+    {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_2, GPIO_NUM_2},
+    {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_3, GPIO_NUM_3},
+    {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_4, GPIO_NUM_4},
+    {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_5, GPIO_NUM_5},
+    {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_6, GPIO_NUM_6},
     #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
     {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_0, GPIO_NUM_1},
     {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_1, GPIO_NUM_2},
diff --git a/ports/esp32/machine_adc_block.c b/ports/esp32/machine_adc_block.c
index f0141d91a3bc..f345a9d49251 100644
--- a/ports/esp32/machine_adc_block.c
+++ b/ports/esp32/machine_adc_block.c
@@ -32,13 +32,8 @@
 #include "driver/adc.h"
 
 machine_adc_block_obj_t madcblock_obj[] = {
-    #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6
-    {{&machine_adc_block_type}, ADC_UNIT_1, 12, -1, {0}},
-    {{&machine_adc_block_type}, ADC_UNIT_2, 12, -1, {0}},
-    #elif CONFIG_IDF_TARGET_ESP32S2
-    {{&machine_adc_block_type}, ADC_UNIT_1, 13, -1, {0}},
-    {{&machine_adc_block_type}, ADC_UNIT_2, 13, -1, {0}},
-    #endif
+    {{&machine_adc_block_type}, ADC_UNIT_1, SOC_ADC_RTC_MAX_BITWIDTH, -1, {0}},
+    {{&machine_adc_block_type}, ADC_UNIT_2, SOC_ADC_RTC_MAX_BITWIDTH, -1, {0}},
 };
 
 static void mp_machine_adc_block_print(const mp_print_t *print, machine_adc_block_obj_t *self) {
diff --git a/ports/esp32/machine_bitstream.c b/ports/esp32/machine_bitstream.c
index b4e58c51f4d1..6296ff06708c 100644
--- a/ports/esp32/machine_bitstream.c
+++ b/ports/esp32/machine_bitstream.c
@@ -42,7 +42,7 @@
 // This is a translation of the cycle counter implementation in ports/stm32/machine_bitstream.c.
 static void IRAM_ATTR machine_bitstream_high_low_bitbang(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const uint8_t *buf, size_t len) {
     uint32_t pin_mask, gpio_reg_set, gpio_reg_clear;
-    #if !CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
+    #if SOC_GPIO_PIN_COUNT > 32
     if (pin >= 32) {
         pin_mask = 1 << (pin - 32);
         gpio_reg_set = GPIO_OUT1_W1TS_REG;
diff --git a/ports/esp32/machine_i2c.c b/ports/esp32/machine_i2c.c
index e1e1850da57c..732a62f47f19 100644
--- a/ports/esp32/machine_i2c.c
+++ b/ports/esp32/machine_i2c.c
@@ -49,9 +49,9 @@
 #endif
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3
+#if SOC_I2C_SUPPORT_XTAL
 #define I2C_SCLK_FREQ XTAL_CLK_FREQ
-#elif CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
+#elif SOC_I2C_SUPPORT_APB
 #define I2C_SCLK_FREQ APB_CLK_FREQ
 #else
 #error "unsupported I2C for ESP32 SoC variant"
diff --git a/ports/esp32/machine_pin.c b/ports/esp32/machine_pin.c
index cb54151cf4e5..162af9682a91 100644
--- a/ports/esp32/machine_pin.c
+++ b/ports/esp32/machine_pin.c
@@ -44,7 +44,7 @@
 #include "modesp32.h"
 #include "genhdr/pins.h"
 
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
+#if SOC_USB_SERIAL_JTAG_SUPPORTED
 #include "soc/usb_serial_jtag_reg.h"
 #endif
 
diff --git a/ports/esp32/machine_pwm.c b/ports/esp32/machine_pwm.c
index b823e3f08fc3..c7b876025040 100644
--- a/ports/esp32/machine_pwm.c
+++ b/ports/esp32/machine_pwm.c
@@ -241,11 +241,12 @@ static void set_freq(machine_pwm_obj_t *self, unsigned int freq, ledc_timer_conf
         // Configure the new resolution and frequency
         timer->duty_resolution = res;
         timer->freq_hz = freq;
-        #if CONFIG_IDF_TARGET_ESP32C6
-        // TODO don't know if this is appropriate, compiler error suggested it
-        timer->clk_cfg = LEDC_USE_XTAL_CLK;
-        #else
+        #if SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
+        timer->clk_cfg = LEDC_USE_PLL_DIV_CLK;
+        #elif SOC_LEDC_SUPPORT_APB_CLOCK
         timer->clk_cfg = LEDC_USE_APB_CLK;
+        #elif SOC_LEDC_SUPPORT_XTAL_CLOCK
+        timer->clk_cfg = LEDC_USE_XTAL_CLK;
         #endif
         #if SOC_LEDC_SUPPORT_REF_TICK
         if (freq < EMPIRIC_FREQ) {
diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c
index 30bc41ed671d..e75cc42fc58b 100644
--- a/ports/esp32/modmachine.c
+++ b/ports/esp32/modmachine.c
@@ -45,7 +45,7 @@
 #define MICROPY_PY_MACHINE_SDCARD_ENTRY
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+#if SOC_TOUCH_SENSOR_SUPPORTED
 #define MICROPY_PY_MACHINE_TOUCH_PAD_ENTRY { MP_ROM_QSTR(MP_QSTR_TouchPad), MP_ROM_PTR(&machine_touchpad_type) },
 #else
 #define MICROPY_PY_MACHINE_TOUCH_PAD_ENTRY
@@ -147,30 +147,34 @@ static void machine_sleep_helper(wake_type_t wake_type, size_t n_args, const mp_
         esp_sleep_enable_timer_wakeup(((uint64_t)expiry) * 1000);
     }
 
-    #if !(CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6)
-
+    #if SOC_PM_SUPPORT_EXT0_WAKEUP
     if (machine_rtc_config.ext0_pin != -1 && (machine_rtc_config.ext0_wake_types & wake_type)) {
         esp_sleep_enable_ext0_wakeup(machine_rtc_config.ext0_pin, machine_rtc_config.ext0_level ? 1 : 0);
     }
+    #endif
 
+    #if SOC_PM_SUPPORT_EXT1_WAKEUP
     if (machine_rtc_config.ext1_pins != 0) {
         esp_sleep_enable_ext1_wakeup(
             machine_rtc_config.ext1_pins,
             machine_rtc_config.ext1_level ? ESP_EXT1_WAKEUP_ANY_HIGH : ESP_EXT1_WAKEUP_ALL_LOW);
     }
+    #endif
 
+    #if SOC_TOUCH_SENSOR_SUPPORTED
     if (machine_rtc_config.wake_on_touch) {
         if (esp_sleep_enable_touchpad_wakeup() != ESP_OK) {
             mp_raise_msg(&mp_type_RuntimeError, MP_ERROR_TEXT("esp_sleep_enable_touchpad_wakeup() failed"));
         }
     }
+    #endif
 
+    #if SOC_ULP_SUPPORTED
     if (machine_rtc_config.wake_on_ulp) {
         if (esp_sleep_enable_ulp_wakeup() != ESP_OK) {
             mp_raise_msg(&mp_type_RuntimeError, MP_ERROR_TEXT("esp_sleep_enable_ulp_wakeup() failed"));
         }
     }
-
     #endif
 
     switch (wake_type) {
diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h
index 6a8fd95fb79a..ab4f3e66eb62 100644
--- a/ports/esp32/mpconfigport.h
+++ b/ports/esp32/mpconfigport.h
@@ -41,7 +41,7 @@
 
 // emitters
 #define MICROPY_PERSISTENT_CODE_LOAD        (1)
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
+#if CONFIG_IDF_TARGET_ARCH_RISCV
 #define MICROPY_EMIT_RV32                   (1)
 #else
 #define MICROPY_EMIT_XTENSAWIN              (1)