Building for Orin Nano Missing .dtbo file

[mstanisz0]

Hi,

I'm currently trying to build the nvidia-jetson-orin-baseboard-demo for the jetson-orin-nano-devkit machine type using the README. I've run through the following steps (summarized from the guide):

sudo docker build -t yoctobuilder .
docker run --rm -v ./docker:/data -u $(id -u):$(id -u) -it yoctobuilder
cd data
git config --global user.email "[email protected]"
git config --global user.name "Your Name"
repo init -u https://github.com/antmicro/meta-antmicro.git -m system-releases/nvidia-jetson-orin-baseboard-demo/manifest.xml
repo sync -j`nproc`
source sources/poky/oe-init-build-env
PARALLEL_MAKE="-j $(nproc)" BB_NUMBER_THREADS="$(nproc)" MACHINE="jetson-orin-nano-devkit" bitbake nvidia-jetson-orin-baseboard-demo

I nearly reach the end of the bitbake before getting an error stating that build/tmp/deploy/images/jetson-orin-nano-devkit/tegra234-p3767-overlay.dtbo is missing.

I see that there's a L4TConfiguration.dtbo in that directory, so I tried linking that as the file above, and it seemed to finish.

Is this the correct dtbo file to use or is there another dtbo file I need?

Thanks!
Matt

[mstanisz0]

I've gotten a little farther; I've modified both the nvidia-jetson-orin-baseboard-demo and darknet-edgeai-demo to compile for the jetson-orin-nano-devkit type. Both seem to complete compile now, though I still seem to have a lot less dtbo files than when I compile the demos using the default README instructions.

Both fail in a similar way, perhaps someone could point me to what might be missing.

Here's the tegraflash boot:

Welcome to Tegra Flash
version 1.0.0
Type ? or help for help and q or quit to exit
Use ! to execute system commands
 
[   0.0143 ] tegrasign_v3.py --key None --getmode mode.txt
[   0.0144 ] Assuming zero filled SBK key
[   0.0110 ] Parsing partition layout
[   0.0115 ] tegraparser_v2 --pt flash.xml.tmp
[   0.0146 ] Change tegra234-bpmp-3767-0003-3509-a02.dtb to tegra234-bpmp-3767-0003-3509-a02_with_odm.dtb
[   0.0146 ] Change tegra234-bpmp-3767-0003-3509-a02.dtb to tegra234-bpmp-3767-0003-3509-a02_with_odm.dtb
[   0.0260 ] /usr/bin/python3 dtbcheck.py -c t234 -o tegra234-bpmp-3767-0003-3509-a02_with_odm.dtb tegra234-bpmp-3767-0003-3509-a02_with_odm_tmp.dtb
[   0.2348 ] Concatenating L4TConfiguration.dtbo to tegra234-p3767-0000-antmicro-job_with_odm_overlay.dtb
[   0.2369 ] Concatenating bl dtb to cpubl binary
[   0.2449 ] MB2 binary: mb2_t234.bin
[   0.2449 ] Pre-processing mb2bct config: tegra234-mb2-bct-misc-p3767-0000-antmicro-job.dts
[   0.2720 ] Pre-processing mb2bct config: tegra234-mb2-bct-scr-p3767-0000.dts
[   0.4957 ] Generating coldboot mb2-bct
[   0.4957 ] tegrabct_v2 --chip 0x23 0 --mb2bct mb2_cold_boot_bct.cfg --mb2bctcfg tegra234-mb2-bct-misc-p3767-0000-antmicro-job_cpp.dtb --scr tegra234-mb2-bct-scr-p3767-0000_cpp.dtb
[   0.4961 ] WARNING: unknown property 'tfc_version'
[   0.5033 ] WARNING: unknown property 'addr_header_version'
[   0.5094 ] Updating mb2-bct with storage information
[   0.5099 ] tegrabct_v2 --chip 0x23 0 --mb2bct mb2_cold_boot_bct_MB2.bct --updatestorageinfo flash.xml.bin
[   0.5129 ] Concatenating mb2-bct to mb2 binary
[   0.5129 ] mb2_bin_file = mb2_t234.bin
[   0.5129 ] mb2_bct_file = mb2_cold_boot_bct_MB2.bct
[   0.5176 ] DCE binary: display-t234-dce.bin
[   0.5176 ] Kernel DTB used: kernel_tegra234-p3767-0000-antmicro-job.dtb
[   0.5176 ] Concatenating kernel-dtb to dce-fw binary
[   0.5176 ] dce_bin = display-t234-dce.bin
[   0.5176 ] kernel_dtb = kernel_tegra234-p3767-0000-antmicro-job.dtb
[   0.5176 ] dce_with_dtb = display-t234-dce_with_kernel_tegra234-p3767-0000-antmicro-job.bin
[   0.5230 ] Update display-t234-dce_with_kernel_tegra234-p3767-0000-antmicro-job.bin to dce_fw partitions
[   0.5244 ] Parsing partition layout
[   0.5250 ] tegraparser_v2 --pt flash.xml.tmp
[   0.5262 ] Creating list of images to be signed
[   0.5270 ] Generating ratchet blob
[   0.5271 ] Pre-processing config: tegra234-mb1-bct-reset-p3767-0000.dts
[   0.5419 ] Pre-processing config: tegra234-mb1-bct-device-p3767-0000.dts
[   0.5511 ] Pre-processing config: tegra234-mb1-bct-cprod-p3767-0000.dts
[   0.5586 ] Pre-processing config: tegra234-mb1-bct-gpioint-p3767-0000.dts
[   0.5662 ] Pre-processing config: tegra234-mb1-bct-misc-p3767-0000.dts
[   0.5774 ] Pre-processing config: tegra234-mb1-bct-pinmux-p3767-hdmi-a03.dtsi
[   0.5888 ] Pre-processing config: tegra234-mb1-bct-padvoltage-p3767-hdmi-a03.dtsi
[   0.5962 ] Pre-processing config: tegra234-mb1-bct-pmic-p3767-0000-a02.dts
[   0.6035 ] Pre-processing config: tegra234-mb1-bct-prod-p3767-0000.dts
[   0.6110 ] Pre-processing config: tegra234-p3767-0000-sdram-l4t.dts
[   1.5789 ] Pre-processing config: tegra234-mb1-bct-uphylane-si.dtsi
[   1.5881 ] Pre-processing config: tegra234-p3767-0001-wb0sdram-l4t.dts
[   2.1057 ] Pre-processing config: tegra234-mb1-bct-ratchet-p3767-0000.dts
[   2.1133 ] Generating coldboot mb1-bct
[   2.1137 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_cold_boot_bct.cfg --misc tegra234-mb1-bct-misc-p3767-0000_cpp.dtb --wb0sdram tegra234-p3767-0001-wb0sdram-l4t_cpp.dtb --pinmux tegra234-mb1-bct-pinmux-p3767-hdmi-a03_cpp.dtb --pmc tegra234-mb1-bct-padvoltage-p3767-hdmi-a03_cpp.dtb --pmic tegra234-mb1-bct-pmic-p3767-0000-a02_cpp.dtb --brcommand tegra234-mb1-bct-reset-p3767-0000_cpp.dtb --prod tegra234-mb1-bct-prod-p3767-0000_cpp.dtb --gpioint tegra234-mb1-bct-gpioint-p3767-0000_cpp.dtb --uphy tegra234-mb1-bct-uphylane-si_cpp.dtb --device tegra234-mb1-bct-device-p3767-0000_cpp.dtb --deviceprod tegra234-mb1-bct-cprod-p3767-0000_cpp.dtb --minratchet tegra234-mb1-bct-ratchet-p3767-0000_cpp.dtb --ratchet_blob ratchet_blob.bin
[   2.1142 ] MB1-BCT version: 0.10
[   2.1145 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED5/ is not supported
[   2.1152 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED5/ is not supported
[   2.1156 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED5/ is not supported
[   2.1157 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_MCE_COVERAGE/ is not supported
[   2.1158 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_MCE_COVERAGE/ is not supported
[   2.1159 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_MCE_COVERAGE/ is not supported
[   2.1160 ] ERROR: /misc/tsc_controls/tsc_locking_config is not supported
[   2.1160 ] ERROR: /misc/tsc_controls/tsc_locking_diff_configuration is not supported
[   2.1161 ] ERROR: /misc/tsc_controls/tsc_locking_ref_frequency_configuration is not supported
[   2.1162 ] ERROR: /misc/tsc_controls/tsc_locking_control is not supported
[   2.1163 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_configuration is not supported
[   2.1164 ] ERROR: /misc/tsc_controls/tsc_locking_fast_adjust_configuration is not supported
[   2.1165 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_delta_control is not supported
[   2.1166 ] ERROR: /misc/tsc_controls/tsc_capture_control_ptx is not supported
[   2.1167 ] ERROR: /misc/tsc_controls/tsc_capture_config_ptx is not supported
[   2.1168 ] ERROR: /misc/tsc_controls/tsc_stscrsr is not supported
[   2.1168 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_num_control is not supported

[   2.1169 ] Parsing config file :tegra234-mb1-bct-pinmux-p3767-hdmi-a03_cpp.dtb 
[   2.1170 ] Added Platform Config 0 data with size :- 2424

[   2.1206 ] Parsing config file :tegra234-mb1-bct-padvoltage-p3767-hdmi-a03_cpp.dtb 
[   2.1226 ] WARNING: unknown node 'g2'
[   2.1227 ] WARNING: unknown node 'g2'
[   2.1228 ] WARNING: unknown node 'g9'
[   2.1228 ] WARNING: unknown node 'g9'
[   2.1229 ] Added Platform Config 2 data with size :- 24
[   2.1236 ] 
[   2.1236 ] Parsing config file :tegra234-mb1-bct-pmic-p3767-0000-a02_cpp.dtb 
[   2.1236 ] Added Platform Config 4 data with size :- 288
[   2.1236 ] 
[   2.1236 ] Parsing config file :tegra234-mb1-bct-reset-p3767-0000_cpp.dtb 
[   2.1236 ] Added Platform Config 3 data with size :- 52
[   2.1236 ] 
[   2.1236 ] Parsing config file :tegra234-mb1-bct-prod-p3767-0000_cpp.dtb 
[   2.1236 ] WARNING: unknown property 'major'
[   2.1236 ] WARNING: unknown property 'minor'
[   2.1236 ] Added Platform Config 5 data with size :- 500
[   2.1236 ] 
[   2.1236 ] Parsing config file :tegra234-mb1-bct-gpioint-p3767-0000_cpp.dtb 
[   2.1237 ] WARNING: unknown property 'major'
[   2.1237 ] WARNING: unknown property 'minor'
[   2.1237 ] Added Platform Config 7 data with size :- 380
[   2.1237 ] 
[   2.1237 ] Parsing config file :tegra234-mb1-bct-uphylane-si_cpp.dtb 
[   2.1237 ] Added Platform Config 8 data with size :- 24
[   2.1237 ] 
[   2.1237 ] Parsing config file :tegra234-mb1-bct-device-p3767-0000_cpp.dtb 
[   2.1237 ] Added Platform Config 9 data with size :- 100
[   2.1237 ] 
[   2.1237 ] Parsing config file :tegra234-mb1-bct-cprod-p3767-0000_cpp.dtb 
[   2.1237 ] ModuleCount 0 NumProdNames 0
[   2.1237 ] Added Platform Config 6 data with size :- 16
[   2.1237 ] 
[   2.1237 ] Parsing config file :tegra234-mb1-bct-ratchet-p3767-0000_cpp.dtb 
[   2.1237 ] 
[   2.1237 ] Updating mb1-bct with firmware information
[   2.1300 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_cold_boot_bct_MB1.bct --updatefwinfo flash.xml.bin
[   2.1323 ] tegrahost_v2 --chip 0x23 0 --align mb1_cold_boot_bct_MB1_aligned.bct
[   2.1424 ] tegrahost_v2 --chip 0x23 0 --magicid MBCT --ratchet_blob ratchet_blob.bin --appendsigheader mb1_cold_boot_bct_MB1_aligned.bct zerosbk
[   2.1431 ] adding BCH for mb1_cold_boot_bct_MB1_aligned.bct
[   2.1474 ] tegrasign_v3.py --key None --list mb1_cold_boot_bct_MB1_aligned_sigheader.bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   2.1476 ] Assuming zero filled SBK key
[   2.1510 ] Warning: pub_key.key is not found
[   2.1479 ] tegrahost_v2 --chip 0x23 0 --updatesigheader mb1_cold_boot_bct_MB1_aligned_sigheader.bct.encrypt mb1_cold_boot_bct_MB1_aligned_sigheader.bct.hash zerosbk
[   2.1493 ] tegrahost_v2 --chip 0x23 0 --partitionlayout flash.xml.bin --ratchet_blob ratchet_blob.bin --list images_list.xml zerosbk
[   2.1496 ] MB1: Nvheader already present is mb1_t234_prod_aligned.bin
[   2.1514 ] Header already present for mb1_t234_prod_aligned_sigheader.bin
[   2.1518 ] MB1: Nvheader already present is psc_bl1_t234_prod_aligned.bin
[   2.1544 ] Header already present for psc_bl1_t234_prod_aligned_sigheader.bin
[   2.1549 ] Header already present for nvdec_t234_prod_aligned.fw
[   2.1567 ] adding BCH for mb2_t234_with_mb2_cold_boot_bct_MB2_aligned.bin
[   2.1604 ] adding BCH for xusb_t234_prod_aligned.bin
[   2.1670 ] Header already present for bpmp_t234-TE950M-A1_prod_aligned.bin
[   2.1730 ] adding BCH for tegra234-bpmp-3767-0003-3509-a02_with_odm_aligned.dtb
[   2.1805 ] Header already present for pscfw_t234_prod_aligned.bin
[   2.1843 ] Header already present for mce_flash_o10_cr_prod_aligned.bin
[   2.1878 ] Header already present for sc7_t234_prod.bin
[   2.1894 ] Header already present for psc_rf_t234_prod_aligned.bin
[   2.1910 ] adding BCH for mb2rf_t234_aligned.bin
[   2.1926 ] adding BCH for uefi_jetson_with_dtb_aligned.bin
[   2.1987 ] adding BCH for tos-optee_t234_aligned.img
[   2.2461 ] adding BCH for eks_aligned.img
[   2.2636 ] INFO: compressing display-t234-dce_with_kernel_tegra234-p3767-0000-antmicro-job_aligned.bin
[   2.3398 ] INFO: complete compression, display-t234-dce_with_kernel_tegra234-p3767-0000-antmicro-job_aligned.bin, ratio = 7%
[   2.3478 ] adding BCH for display-t234-dce_with_kernel_tegra234-p3767-0000-antmicro-job_aligned_blob_w_bin_aligned.bin
[   2.3572 ] adding BCH for spe_t234_aligned.bin
[   2.3657 ] adding BCH for camera-rtcpu-t234-rce_aligned.img
[   2.3712 ] adding BCH for adsp-fw_aligned.bin
[   2.3800 ] MB1: Nvheader already present is mb1_t234_prod_aligned.bin
[   2.3865 ] Header already present for mb1_t234_prod_aligned_sigheader.bin
[   2.3870 ] MB1: Nvheader already present is psc_bl1_t234_prod_aligned.bin
[   2.3896 ] Header already present for psc_bl1_t234_prod_aligned_sigheader.bin
[   2.3907 ] Header already present for nvdec_t234_prod_aligned.fw
[   2.3926 ] adding BCH for mb2_t234_with_mb2_cold_boot_bct_MB2_aligned.bin
[   2.3966 ] adding BCH for xusb_t234_prod_aligned.bin
[   2.4035 ] Header already present for bpmp_t234-TE950M-A1_prod_aligned.bin
[   2.4085 ] adding BCH for tegra234-bpmp-3767-0003-3509-a02_with_odm_aligned.dtb
[   2.4169 ] Header already present for pscfw_t234_prod_aligned.bin
[   2.4199 ] Header already present for mce_flash_o10_cr_prod_aligned.bin
[   2.4233 ] Header already present for sc7_t234_prod.bin
[   2.4249 ] Header already present for psc_rf_t234_prod_aligned.bin
[   2.4270 ] adding BCH for mb2rf_t234_aligned.bin
[   2.4287 ] adding BCH for uefi_jetson_with_dtb_aligned.bin
[   2.4492 ] adding BCH for tos-optee_t234_aligned.img
[   2.4907 ] adding BCH for eks_aligned.img
[   2.5100 ] INFO: compressing display-t234-dce_with_kernel_tegra234-p3767-0000-antmicro-job_aligned.bin
[   2.5940 ] INFO: complete compression, display-t234-dce_with_kernel_tegra234-p3767-0000-antmicro-job_aligned.bin, ratio = 7%
[   2.6023 ] adding BCH for display-t234-dce_with_kernel_tegra234-p3767-0000-antmicro-job_aligned_blob_w_bin_aligned.bin
[   2.6185 ] adding BCH for spe_t234_aligned.bin
[   2.6197 ] adding BCH for camera-rtcpu-t234-rce_aligned.img
[   2.6260 ] adding BCH for adsp-fw_aligned.bin
[   2.6465 ] Filling MB1 storage info
[   2.6466 ] Parsing dev params for multi chains
[   2.6557 ] Generating br-bct
[   2.6561 ] Updating dev and MSS params in BR BCT
[   2.6561 ] tegrabct_v2 --dev_param tegra234-br-bct-p3767-0000-l4t_cpp.dtb --sdram tegra234-p3767-0000-sdram-l4t_cpp.dtb --brbct br_bct.cfg --chip 0x23 0
[   2.7061 ] Updating bl info
[   2.7067 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updateblinfo flash.xml.bin
[   2.7194 ] Generating br-bct
[   2.7199 ] Updating dev and MSS params in BR BCT
[   2.7199 ] tegrabct_v2 --dev_param tegra234-br-bct_b-p3767-0000-l4t_cpp.dtb --sdram tegra234-p3767-0000-sdram-l4t_cpp.dtb --brbct br_bct.cfg --chip 0x23 0
[   2.7716 ] Updating bl info
[   2.7721 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updateblinfo flash.xml.bin
[   2.7760 ] Generating BCT backup image
[   2.7761 ] dd if=/dev/zero of=bct_backup.img bs=1 count=32768
[   2.7766 ] 32768+0 records in
[   2.7948 ] 32768+0 records out
[   2.7948 ] 32768 bytes (33 kB, 32 KiB) copied, 0.0136916 s, 2.4 MB/s
[   2.7948 ] 
[   2.7948 ] Concatenating BCT for chain A to bct_backup.img

[   2.7948 ] dd if=br_bct_BR.bct of=bct_backup.img bs=1 seek=0 conv=notrunc
[   2.7952 ] 8192+0 records in
[   2.8001 ] 8192+0 records out
[   2.8001 ] 8192 bytes (8.2 kB, 8.0 KiB) copied, 0.00383005 s, 2.1 MB/s
[   2.8001 ] 
[   2.8001 ] Concatenating BCT for chain B to bct_backup.img

[   2.8001 ] dd if=br_bct_b_BR.bct of=bct_backup.img bs=1 seek=16384 conv=notrunc
[   2.8004 ] 8192+0 records in
[   2.8099 ] 8192+0 records out
[   2.8099 ] 8192 bytes (8.2 kB, 8.0 KiB) copied, 0.00368417 s, 2.2 MB/s
[   2.8099 ] 
[   2.8100 ] Generating signatures
[   2.8135 ] tegrasign_v3.py --key None --list images_list.xml --pubkeyhash pub_key.key --sha sha512
[   2.8136 ] Assuming zero filled SBK key
[   2.8945 ] Warning: pub_key.key is not found
[   2.8928 ] Parsing dev params for multi chains
[   2.8929 ] Generating br-bct
[   2.8937 ] Updating dev and MSS params in BR BCT
[   2.8937 ] tegrabct_v2 --dev_param tegra234-br-bct-p3767-0000-l4t_cpp.dtb --sdram tegra234-p3767-0000-sdram-l4t_cpp.dtb --brbct br_bct.cfg --chip 0x23 0
[   2.9509 ] Updating customer data section
[   2.9517 ] tegrabct_v2 --chip 0x23 0 --brbct br_bct_BR.bct --update_custinfo custinfo_out.bin
[   2.9560 ] Updating bl info
[   2.9623 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updateblinfo flash.xml.bin --updatesig images_list_signed.xml
[   2.9703 ] Get Signed section of bct
[   2.9707 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --listbct bct_list.xml
[   2.9718 ] Signing BCT
[   2.9754 ] tegrasign_v3.py --key None --list bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   2.9755 ] Assuming zero filled SBK key
[   2.9779 ] Sha saved in br_bct_BR.sha
[   2.9782 ] Warning: pub_key.key is not found
[   2.9747 ] Updating BCT with signature
[   2.9751 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updatesig bct_list_signed.xml
[   2.9755 ] Offset :4608 Len :3584
[   2.9788 ] Generating SHA2 Hash
[   2.9824 ] tegrasign_v3.py --key None --list bct_list.xml --sha sha512
[   2.9824 ] Assuming zero filled SBK key
[   2.9824 ] Assuming zero filled SBK key
[   2.9855 ] Sha saved in br_bct_BR.sha
[   2.9826 ] Updating BCT with SHA2 Hash
[   2.9831 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updatesha bct_list_signed.xml
[   2.9836 ] Offset :4608 Len :3584
[   2.9848 ] Offset :68 Len :8124
[   2.9856 ] 
[   2.9856 ] Generating br-bct
[   2.9875 ] Updating dev and MSS params in BR BCT
[   2.9875 ] tegrabct_v2 --dev_param tegra234-br-bct_b-p3767-0000-l4t_cpp.dtb --sdram tegra234-p3767-0000-sdram-l4t_cpp.dtb --brbct br_bct.cfg --chip 0x23 0
[   3.0390 ] Updating customer data section
[   3.0397 ] tegrabct_v2 --chip 0x23 0 --brbct br_bct_BR.bct --update_custinfo custinfo_out.bin
[   3.0413 ] Updating bl info
[   3.0419 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updateblinfo flash.xml.bin --updatesig images_list_signed.xml
[   3.0539 ] Get Signed section of bct
[   3.0546 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --listbct bct_list.xml
[   3.0558 ] Signing BCT
[   3.0594 ] tegrasign_v3.py --key None --list bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   3.0594 ] Assuming zero filled SBK key
[   3.0622 ] Sha saved in br_bct_BR.sha
[   3.0625 ] Warning: pub_key.key is not found
[   3.0590 ] Updating BCT with signature
[   3.0595 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updatesig bct_list_signed.xml
[   3.0603 ] Offset :4608 Len :3584
[   3.0617 ] Generating SHA2 Hash
[   3.0652 ] tegrasign_v3.py --key None --list bct_list.xml --sha sha512
[   3.0653 ] Assuming zero filled SBK key
[   3.0653 ] Assuming zero filled SBK key
[   3.0682 ] Sha saved in br_bct_BR.sha
[   3.0649 ] Updating BCT with SHA2 Hash
[   3.0653 ] tegrabct_v2 --brbct br_bct_BR.bct --chip 0x23 0 --updatesha bct_list_signed.xml
[   3.0658 ] Offset :4608 Len :3584
[   3.0687 ] Offset :68 Len :8124
[   3.0690 ] Generating BCT backup image
[   3.0691 ] dd if=/dev/zero of=bct_backup.img bs=1 count=32768
[   3.0702 ] 32768+0 records in
[   3.0860 ] 32768+0 records out
[   3.0860 ] 32768 bytes (33 kB, 32 KiB) copied, 0.0146407 s, 2.2 MB/s
[   3.0860 ] 
[   3.0860 ] Concatenating BCT for chain A to bct_backup.img

[   3.0860 ] dd if=br_bct_BR.bct of=bct_backup.img bs=1 seek=0 conv=notrunc
[   3.0865 ] 8192+0 records in
[   3.0930 ] 8192+0 records out
[   3.0930 ] 8192 bytes (8.2 kB, 8.0 KiB) copied, 0.00351013 s, 2.3 MB/s
[   3.0930 ] 
[   3.0930 ] Concatenating BCT for chain B to bct_backup.img

[   3.0930 ] dd if=br_bct_b_BR.bct of=bct_backup.img bs=1 seek=16384 conv=notrunc
[   3.0933 ] 8192+0 records in
[   3.0983 ] 8192+0 records out
[   3.0983 ] 8192 bytes (8.2 kB, 8.0 KiB) copied, 0.00370379 s, 2.2 MB/s
[   3.0983 ] 
[   3.0983 ] Generating coldboot mb1-bct
[   3.0986 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_cold_boot_bct.cfg --misc tegra234-mb1-bct-misc-p3767-0000_cpp.dtb --wb0sdram tegra234-p3767-0001-wb0sdram-l4t_cpp.dtb --pinmux tegra234-mb1-bct-pinmux-p3767-hdmi-a03_cpp.dtb --pmc tegra234-mb1-bct-padvoltage-p3767-hdmi-a03_cpp.dtb --pmic tegra234-mb1-bct-pmic-p3767-0000-a02_cpp.dtb --brcommand tegra234-mb1-bct-reset-p3767-0000_cpp.dtb --prod tegra234-mb1-bct-prod-p3767-0000_cpp.dtb --gpioint tegra234-mb1-bct-gpioint-p3767-0000_cpp.dtb --uphy tegra234-mb1-bct-uphylane-si_cpp.dtb --device tegra234-mb1-bct-device-p3767-0000_cpp.dtb --deviceprod tegra234-mb1-bct-cprod-p3767-0000_cpp.dtb --minratchet tegra234-mb1-bct-ratchet-p3767-0000_cpp.dtb --ratchet_blob ratchet_blob.bin
[   3.0991 ] MB1-BCT version: 0.10
[   3.0994 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED5/ is not supported
[   3.1001 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED5/ is not supported
[   3.1007 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED5/ is not supported
[   3.1011 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_MCE_COVERAGE/ is not supported
[   3.1015 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_MCE_COVERAGE/ is not supported
[   3.1016 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_MCE_COVERAGE/ is not supported
[   3.1017 ] ERROR: /misc/tsc_controls/tsc_locking_config is not supported
[   3.1018 ] ERROR: /misc/tsc_controls/tsc_locking_diff_configuration is not supported
[   3.1019 ] ERROR: /misc/tsc_controls/tsc_locking_ref_frequency_configuration is not supported
[   3.1020 ] ERROR: /misc/tsc_controls/tsc_locking_control is not supported
[   3.1021 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_configuration is not supported
[   3.1022 ] ERROR: /misc/tsc_controls/tsc_locking_fast_adjust_configuration is not supported
[   3.1023 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_delta_control is not supported
[   3.1023 ] ERROR: /misc/tsc_controls/tsc_capture_control_ptx is not supported
[   3.1024 ] ERROR: /misc/tsc_controls/tsc_capture_config_ptx is not supported
[   3.1025 ] ERROR: /misc/tsc_controls/tsc_stscrsr is not supported
[   3.1026 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_num_control is not supported

[   3.1027 ] Parsing config file :tegra234-mb1-bct-pinmux-p3767-hdmi-a03_cpp.dtb 
[   3.1027 ] Added Platform Config 0 data with size :- 2424

[   3.1040 ] Parsing config file :tegra234-mb1-bct-padvoltage-p3767-hdmi-a03_cpp.dtb 
[   3.1041 ] WARNING: unknown node 'g2'
[   3.1042 ] WARNING: unknown node 'g2'
[   3.1042 ] WARNING: unknown node 'g9'
[   3.1042 ] WARNING: unknown node 'g9'
[   3.1043 ] Added Platform Config 2 data with size :- 24

[   3.1043 ] Parsing config file :tegra234-mb1-bct-pmic-p3767-0000-a02_cpp.dtb 
[   3.1044 ] Added Platform Config 4 data with size :- 288

[   3.1048 ] Parsing config file :tegra234-mb1-bct-reset-p3767-0000_cpp.dtb 
[   3.1050 ] Added Platform Config 3 data with size :- 52

[   3.1051 ] Parsing config file :tegra234-mb1-bct-prod-p3767-0000_cpp.dtb 
[   3.1053 ] WARNING: unknown property 'major'
[   3.1057 ] WARNING: unknown property 'minor'
[   3.1058 ] Added Platform Config 5 data with size :- 500

[   3.1059 ] Parsing config file :tegra234-mb1-bct-gpioint-p3767-0000_cpp.dtb 
[   3.1063 ] WARNING: unknown property 'major'
[   3.1071 ] WARNING: unknown property 'minor'
[   3.1071 ] Added Platform Config 7 data with size :- 380
[   3.1072 ] 
[   3.1072 ] Parsing config file :tegra234-mb1-bct-uphylane-si_cpp.dtb 
[   3.1072 ] Added Platform Config 8 data with size :- 24
[   3.1072 ] 
[   3.1072 ] Parsing config file :tegra234-mb1-bct-device-p3767-0000_cpp.dtb 
[   3.1072 ] Added Platform Config 9 data with size :- 100
[   3.1072 ] 
[   3.1072 ] Parsing config file :tegra234-mb1-bct-cprod-p3767-0000_cpp.dtb 
[   3.1072 ] ModuleCount 0 NumProdNames 0
[   3.1072 ] Added Platform Config 6 data with size :- 16
[   3.1072 ] 
[   3.1072 ] Parsing config file :tegra234-mb1-bct-ratchet-p3767-0000_cpp.dtb 
[   3.1072 ] 
[   3.1073 ] Updating mb1-bct with firmware information
[   3.1080 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_cold_boot_bct_MB1.bct --updatefwinfo flash.xml.bin
[   3.1103 ] tegrahost_v2 --chip 0x23 0 --align mb1_cold_boot_bct_MB1_aligned.bct
[   3.1199 ] tegrahost_v2 --chip 0x23 0 --magicid MBCT --ratchet_blob ratchet_blob.bin --appendsigheader mb1_cold_boot_bct_MB1_aligned.bct zerosbk
[   3.1204 ] adding BCH for mb1_cold_boot_bct_MB1_aligned.bct
[   3.1257 ] tegrasign_v3.py --key None --list mb1_cold_boot_bct_MB1_aligned_sigheader.bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   3.1258 ] Assuming zero filled SBK key
[   3.1272 ] Warning: pub_key.key is not found
[   3.1258 ] tegrahost_v2 --chip 0x23 0 --updatesigheader mb1_cold_boot_bct_MB1_aligned_sigheader.bct.encrypt mb1_cold_boot_bct_MB1_aligned_sigheader.bct.hash zerosbk
[   3.1284 ] Generating recovery mb1-bct
[   3.1290 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_bct.cfg --misc tegra234-mb1-bct-misc-p3767-0000_cpp.dtb --wb0sdram tegra234-p3767-0001-wb0sdram-l4t_cpp.dtb --pinmux tegra234-mb1-bct-pinmux-p3767-hdmi-a03_cpp.dtb --pmc tegra234-mb1-bct-padvoltage-p3767-hdmi-a03_cpp.dtb --pmic tegra234-mb1-bct-pmic-p3767-0000-a02_cpp.dtb --brcommand tegra234-mb1-bct-reset-p3767-0000_cpp.dtb --prod tegra234-mb1-bct-prod-p3767-0000_cpp.dtb --gpioint tegra234-mb1-bct-gpioint-p3767-0000_cpp.dtb --uphy tegra234-mb1-bct-uphylane-si_cpp.dtb --device tegra234-mb1-bct-device-p3767-0000_cpp.dtb --deviceprod tegra234-mb1-bct-cprod-p3767-0000_cpp.dtb --minratchet tegra234-mb1-bct-ratchet-p3767-0000_cpp.dtb --ratchet_blob ratchet_blob.bin
[   3.1298 ] MB1-BCT version: 0.10
[   3.1302 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED5/ is not supported
[   3.1308 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED5/ is not supported
[   3.1309 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_UNUSED5/ is not supported
[   3.1310 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_MCE_COVERAGE/ is not supported
[   3.1311 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_MCE_COVERAGE/ is not supported
[   3.1312 ] ERROR: carveout /misc/carveout/aux_info@CARVEOUT_MCE_COVERAGE/ is not supported
[   3.1313 ] ERROR: /misc/tsc_controls/tsc_locking_config is not supported
[   3.1314 ] ERROR: /misc/tsc_controls/tsc_locking_diff_configuration is not supported
[   3.1314 ] ERROR: /misc/tsc_controls/tsc_locking_ref_frequency_configuration is not supported
[   3.1315 ] ERROR: /misc/tsc_controls/tsc_locking_control is not supported
[   3.1316 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_configuration is not supported
[   3.1317 ] ERROR: /misc/tsc_controls/tsc_locking_fast_adjust_configuration is not supported
[   3.1318 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_delta_control is not supported
[   3.1319 ] ERROR: /misc/tsc_controls/tsc_capture_control_ptx is not supported
[   3.1320 ] ERROR: /misc/tsc_controls/tsc_capture_config_ptx is not supported
[   3.1321 ] ERROR: /misc/tsc_controls/tsc_stscrsr is not supported
[   3.1321 ] ERROR: /misc/tsc_controls/tsc_locking_adjust_num_control is not supported

[   3.1322 ] Parsing config file :tegra234-mb1-bct-pinmux-p3767-hdmi-a03_cpp.dtb 
[   3.1323 ] Added Platform Config 0 data with size :- 2424

[   3.1352 ] Parsing config file :tegra234-mb1-bct-padvoltage-p3767-hdmi-a03_cpp.dtb 
[   3.1353 ] WARNING: unknown node 'g2'
[   3.1353 ] WARNING: unknown node 'g2'
[   3.1354 ] WARNING: unknown node 'g9'
[   3.1354 ] WARNING: unknown node 'g9'
[   3.1354 ] Added Platform Config 2 data with size :- 24

[   3.1355 ] Parsing config file :tegra234-mb1-bct-pmic-p3767-0000-a02_cpp.dtb 
[   3.1356 ] Added Platform Config 4 data with size :- 288

[   3.1360 ] Parsing config file :tegra234-mb1-bct-reset-p3767-0000_cpp.dtb 
[   3.1362 ] Added Platform Config 3 data with size :- 52

[   3.1364 ] Parsing config file :tegra234-mb1-bct-prod-p3767-0000_cpp.dtb 
[   3.1371 ] WARNING: unknown property 'major'
[   3.1372 ] WARNING: unknown property 'minor'
[   3.1374 ] Added Platform Config 5 data with size :- 500

[   3.1377 ] Parsing config file :tegra234-mb1-bct-gpioint-p3767-0000_cpp.dtb 
[   3.1380 ] WARNING: unknown property 'major'
[   3.1381 ] WARNING: unknown property 'minor'
[   3.1382 ] Added Platform Config 7 data with size :- 380
[   3.1382 ] 
[   3.1382 ] Parsing config file :tegra234-mb1-bct-uphylane-si_cpp.dtb 
[   3.1382 ] Added Platform Config 8 data with size :- 24
[   3.1382 ] 
[   3.1382 ] Parsing config file :tegra234-mb1-bct-device-p3767-0000_cpp.dtb 
[   3.1382 ] Added Platform Config 9 data with size :- 100
[   3.1382 ] 
[   3.1383 ] Parsing config file :tegra234-mb1-bct-cprod-p3767-0000_cpp.dtb 
[   3.1383 ] ModuleCount 0 NumProdNames 0
[   3.1383 ] Added Platform Config 6 data with size :- 16
[   3.1383 ] 
[   3.1383 ] Parsing config file :tegra234-mb1-bct-ratchet-p3767-0000_cpp.dtb 
[   3.1383 ] 
[   3.1383 ] Updating mb1-bct with firmware information
[   3.1388 ] tegrabct_v2 --chip 0x23 0 --mb1bct mb1_bct_MB1.bct --recov --updatefwinfo flash.xml.bin
[   3.1410 ] tegrahost_v2 --chip 0x23 0 --align mb1_bct_MB1_aligned.bct
[   3.1431 ] tegrahost_v2 --chip 0x23 0 --magicid MBCT --ratchet_blob ratchet_blob.bin --appendsigheader mb1_bct_MB1_aligned.bct zerosbk
[   3.1440 ] adding BCH for mb1_bct_MB1_aligned.bct
[   3.1548 ] tegrasign_v3.py --key None --list mb1_bct_MB1_aligned_sigheader.bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   3.1548 ] Assuming zero filled SBK key
[   3.1597 ] Warning: pub_key.key is not found
[   3.1570 ] tegrahost_v2 --chip 0x23 0 --updatesigheader mb1_bct_MB1_aligned_sigheader.bct.encrypt mb1_bct_MB1_aligned_sigheader.bct.hash zerosbk
[   3.1608 ] Generating coldboot mem-bct
[   3.1637 ] tegrabct_v2 --chip 0x23 0 --sdram tegra234-p3767-0000-sdram-l4t_cpp.dtb --wb0sdram tegra234-p3767-0001-wb0sdram-l4t_cpp.dtb --membct tegra234-p3767-0000-sdram-l4t_cpp_1.bct tegra234-p3767-0000-sdram-l4t_cpp_2.bct tegra234-p3767-0000-sdram-l4t_cpp_3.bct tegra234-p3767-0000-sdram-l4t_cpp_4.bct
[   3.1642 ]  packing sdram params with Wb0 file tegra234-p3767-0001-wb0sdram-l4t_cpp.dtb
[   3.2173 ] Packing sdram param for instance[0]
[   3.2179 ] Packing sdram param for instance[1]
[   3.2182 ] Packing sdram param for instance[2]
[   3.2185 ] Packing sdram param for instance[3]
[   3.2188 ] Packing sdram param for instance[4]
[   3.2191 ] Packing sdram param for instance[5]
[   3.2193 ] Packing sdram param for instance[6]
[   3.2194 ] Packing sdram param for instance[7]
[   3.2194 ] Packing sdram param for instance[8]
[   3.2195 ] Packing sdram param for instance[9]
[   3.2195 ] Packing sdram param for instance[10]
[   3.2196 ] Packing sdram param for instance[11]
[   3.2196 ] Packing sdram param for instance[12]
[   3.2197 ] Packing sdram param for instance[13]
[   3.2197 ] Packing sdram param for instance[14]
[   3.2197 ] Packing sdram param for instance[15]
[   3.2704 ] Getting sector size from pt
[   3.2712 ] tegraparser_v2 --getsectorsize flash.xml.bin sector_info.bin
[   3.2721 ] BlockSize read from layout is 0x200

[   3.2726 ] tegrahost_v2 --chip 0x23 0 --blocksize 512 --magicid MEMB --addsigheader_multi tegra234-p3767-0000-sdram-l4t_cpp_1.bct tegra234-p3767-0000-sdram-l4t_cpp_2.bct tegra234-p3767-0000-sdram-l4t_cpp_3.bct tegra234-p3767-0000-sdram-l4t_cpp_4.bct
[   3.2730 ] Binary 0 length is 58752
[   3.2738 ] Binary 0 align length is 58880
[   3.2740 ] Binary 1 length is 58752
[   3.2742 ] Binary 1 align length is 58880
[   3.2748 ] Binary 2 length is 58752
[   3.2751 ] Binary 2 align length is 58880
[   3.2753 ] Binary 3 length is 58752
[   3.2759 ] Binary 3 align length is 58880
[   3.2761 ] Buffer length is 235520
[   3.2761 ] adding BCH for tegra234-p3767-0000-sdram-l4t_cpp_1.bct
[   3.2761 ] new length is 243712
[   3.2762 ] 
[   3.2768 ] tegrahost_v2 --chip 0x23 0 --align mem_coldboot_aligned.bct
[   3.2831 ] tegrahost_v2 --chip 0x23 0 --magicid MEMB --ratchet_blob ratchet_blob.bin --appendsigheader mem_coldboot_aligned.bct zerosbk
[   3.2857 ] Header already present for mem_coldboot_aligned.bct
[   3.2915 ] tegrasign_v3.py --key None --list mem_coldboot_aligned_sigheader.bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   3.2915 ] Assuming zero filled SBK key
[   3.2937 ] Warning: pub_key.key is not found
[   3.2908 ] tegrahost_v2 --chip 0x23 0 --updatesigheader mem_coldboot_aligned_sigheader.bct.encrypt mem_coldboot_aligned_sigheader.bct.hash zerosbk
[   3.2926 ] Generating recovery mem-bct
[   3.2932 ] tegrabct_v2 --chip 0x23 0 --sdram tegra234-p3767-0000-sdram-l4t_cpp.dtb --wb0sdram tegra234-p3767-0001-wb0sdram-l4t_cpp.dtb --membct tegra234-p3767-0000-sdram-l4t_cpp_1.bct tegra234-p3767-0000-sdram-l4t_cpp_2.bct tegra234-p3767-0000-sdram-l4t_cpp_3.bct tegra234-p3767-0000-sdram-l4t_cpp_4.bct
[   3.2937 ]  packing sdram params with Wb0 file tegra234-p3767-0001-wb0sdram-l4t_cpp.dtb
[   3.3461 ] Packing sdram param for instance[0]
[   3.3461 ] Packing sdram param for instance[1]
[   3.3462 ] Packing sdram param for instance[2]
[   3.3462 ] Packing sdram param for instance[3]
[   3.3462 ] Packing sdram param for instance[4]
[   3.3463 ] Packing sdram param for instance[5]
[   3.3463 ] Packing sdram param for instance[6]
[   3.3464 ] Packing sdram param for instance[7]
[   3.3464 ] Packing sdram param for instance[8]
[   3.3465 ] Packing sdram param for instance[9]
[   3.3466 ] Packing sdram param for instance[10]
[   3.3467 ] Packing sdram param for instance[11]
[   3.3468 ] Packing sdram param for instance[12]
[   3.3468 ] Packing sdram param for instance[13]
[   3.3468 ] Packing sdram param for instance[14]
[   3.3469 ] Packing sdram param for instance[15]
[   3.3973 ] Reading ramcode from backup chip_info.bin file
[   3.3986 ] RAMCODE Read from Device: 2

[   3.3987 ] Using ramcode 0
[   3.3987 ] Disabled BPMP dtb trim, using default dtb
[   3.3988 ] 
[   3.3994 ] tegrahost_v2 --chip 0x23 0 --align mem_rcm_aligned.bct
[   3.4005 ] tegrahost_v2 --chip 0x23 0 --magicid MEM0 --ratchet_blob ratchet_blob.bin --appendsigheader mem_rcm_aligned.bct zerosbk
[   3.4010 ] adding BCH for mem_rcm_aligned.bct
[   3.4060 ] tegrasign_v3.py --key None --list mem_rcm_aligned_sigheader.bct_list.xml --pubkeyhash pub_key.key --sha sha512
[   3.4061 ] Assuming zero filled SBK key
[   3.4077 ] Warning: pub_key.key is not found
[   3.4045 ] tegrahost_v2 --chip 0x23 0 --updatesigheader mem_rcm_aligned_sigheader.bct.encrypt mem_rcm_aligned_sigheader.bct.hash zerosbk
[   3.4056 ] Copying signatures
[   3.4059 ] tegrahost_v2 --chip 0x23 0 --partitionlayout flash.xml.bin --updatesig images_list_signed.xml
[   3.4704 ] mb1_t234_prod_aligned_sigheader.bin.encrypt filename is from images_list
[   3.4709 ] psc_bl1_t234_prod_aligned_sigheader.bin.encrypt filename is from images_list
[   3.4710 ] Boot Rom communication
[   3.4714 ] tegrarcm_v2 --new_session --chip 0x23 0 --uid --download bct_br br_bct_BR.bct --download mb1 mb1_t234_prod_aligned_sigheader.bin.encrypt --download psc_bl1 psc_bl1_t234_prod_aligned_sigheader.bin.encrypt --download bct_mb1 mb1_bct_MB1_sigheader.bct.encrypt
Error: Return value 8
Command tegrarcm_v2 --new_session --chip 0x23 0 --uid --download bct_br br_bct_BR.bct --download mb1 mb1_t234_prod_aligned_sigheader.bin.encrypt --download psc_bl1 psc_bl1_t234_prod_aligned_sigheader.bin.encrypt --download bct_mb1 mb1_bct_MB1_sigheader.bct.encrypt

And the output from the debug console:

[0000.064] I> MB1 (version: 1.4.0.1-t234-54845784-08e631ca)
[0000.070] I> t234-A01-1-Silicon (0x12347) Prod
[0000.074] I> Boot-mode : Coldboot
[0000.077] I> Entry timestamp: 0x00000000
[0000.081] I> last_boot_error: 0x0
[0000.084] I> BR-BCT: preprod_dev_sign: 0
[0000.088] I> rst_source: 0x0, rst_level: 0x0
[0000.092] I> Task: SE error check
[0000.095] I> Task: Bootchain select WAR set
[0000.099] I> Task: Enable SLCG
[0000.102] I> Task: CRC check
[0000.105] I> Task: Initialize MB2 params
[0000.109] I> MB2-params @ 0x40060000
[0000.113] I> Task: Crypto init
[0000.115] I> Task: Perform MB1 KAT tests
[0000.119] I> Task: NVRNG health check
[0000.123] I> NVRNG: Health check success
[0000.127] I> Task: MSS Bandwidth limiter settings for iGPU clients
[0000.133] I> Task: Enabling and initialization of Bandwidth limiter
[0000.139] I> No request to configure MBWT settings for any PC!
[0000.144] I> Task: Secure debug controls
[0000.148] I> Task: strap war set
[0000.151] I> Task: Initialize SOC Therm
[0000.155] I> Task: Program NV master stream id
[0000.159] I> Task: Verify boot mode
[0000.165] I> Task: Alias fuses
[0000.168] W> FUSE_ALIAS: Fuse alias on production fused part is not supported.
[0000.176] I> Task: Print SKU type
[0000.179] I> FUSE_OPT_CCPLEX_CLUSTER_DISABLE = 0x000001c8
[0000.184] I> FUSE_OPT_GPC_DISABLE = 0x00000002
[0000.188] I> FUSE_OPT_TPC_DISABLE = 0x000000f0
[0000.192] I> FUSE_OPT_DLA_DISABLE = 0x00000003
[0000.197] I> FUSE_OPT_PVA_DISABLE = 0x00000001
[0000.201] I> FUSE_OPT_NVENC_DISABLE = 0x00000001
[0000.205] I> FUSE_OPT_NVDEC_DISABLE = 0x00000000
[0000.210] I> FUSE_OPT_FSI_DISABLE = 0x00000001
[0000.214] I> FUSE_OPT_EMC_DISABLE = 0x0000000c
[0000.218] I> FUSE_BOOTROM_PATCH_VERSION = 0x7
[0000.223] I> FUSE_PSCROM_PATCH_VERSION = 0x7
[0000.227] I> FUSE_OPT_ADC_CAL_FUSE_REV = 0x2
[0000.231] I> FUSE_SKU_INFO_0 = 0xd5
[0000.234] I> FUSE_OPT_SAMPLE_TYPE_0 = 0x3 PS
[0000.238] I> FUSE_PACKAGE_INFO_0 = 0x2
[0000.242] I> SKU: Prod
[0000.244] I> Task: Boost clocks
[0000.247] I> Initializing PLLC2 for AXI_CBB.
[0000.251] I> AXI_CBB : src = 35, divisor = 0
[0000.255] I> Task: Voltage monitor
[0000.259] I> VMON: Vmon re-calibration and fine tuning done
[0000.264] I> Task: UPHY init
[0000.269] I> HSIO UPHY init done
[0000.272] W> Skipping GBE UPHY config
[0000.276] I> Task: Boot device init
[0000.279] I> Boot_device: QSPI_FLASH instance: 0
[0000.284] I> Qspi clock source : pllc_out0
[0000.288] I> QSPI Flash: Macronix 64MB
[0000.291] I> QSPI-0l initialized successfully
[0000.296] I> Task: TSC init
[0000.298] I> Task: Load membct
[0000.301] I> RAM_CODE 0x4000421
[0000.304] I> Loading MEMBCT
[0000.307] I> Slot: 0
[0000.309] I> Binary[0] block-3840 (partition size: 0x40000)
[0000.315] I> Binary name: MEM-BCT-0
[0000.318] I> Size of crypto header is 8192
[0000.322] I> Size of crypto header is 8192
[0000.326] I> strt_pg_num(3840) num_of_pgs(16) read_buf(0x40050000)
[0000.332] I> BCH of MEM-BCT-0 read from storage
[0000.336] I> BCH address is : 0x40050000
[0000.340] I> MEM-BCT-0 header integrity check is success
[0000.345] I> Binary magic in BCH component 0 is MEM0
[0000.350] I> component binary type is 0
[0000.354] I> strt_pg_num(3856) num_of_pgs(115) read_buf(0x40040000)
[0000.361] I> MEM-BCT-0 binary is read from storage
[0000.366] I> MEM-BCT-0 binary integrity check is success
[0000.371] I> Binary MEM-BCT-0 loaded successfully at 0x40040000 (0xe580)
[0000.377] I> RAM_CODE 0x4000421
[0000.383] I> RAM_CODE 0x4000421
[0000.387] I> Task: Load Page retirement list
[0000.391] I> Task: SDRAM params override
[0000.394] I> Task: Save mem-bct info
[0000.398] I> Task: Carveout allocate
[0000.401] I> RCM blob carveout will not be allocated
[0000.406] I> Update CCPLEX IST carveout from MB1-BCT
[0000.411] I> ECC region[0]: Start:0x0, End:0x0
[0000.415] I> ECC region[1]: Start:0x0, End:0x0
[0000.420] I> ECC region[2]: Start:0x0, End:0x0
[0000.424] I> ECC region[3]: Start:0x0, End:0x0
[0000.428] I> ECC region[4]: Start:0x0, End:0x0
[0000.432] I> Non-ECC region[0]: Start:0x80000000, End:0x280000000
[0000.438] I> Non-ECC region[1]: Start:0x0, End:0x0
[0000.443] I> Non-ECC region[2]: Start:0x0, End:0x0
[0000.448] I> Non-ECC region[3]: Start:0x0, End:0x0
[0000.452] I> Non-ECC region[4]: Start:0x0, End:0x0
[0000.463] I> allocated(CO:43) base:0x27c000000 size:0x4000000 align: 0x200000
[0000.470] I> allocated(CO:39) base:0x279e00000 size:0x2200000 align: 0x10000
[0000.477] I> allocated(CO:20) base:0x276000000 size:0x2000000 align: 0x2000000
[0000.484] I> allocated(CO:24) base:0x274000000 size:0x2000000 align: 0x2000000
[0000.491] I> allocated(CO:28) base:0x272000000 size:0x2000000 align: 0x2000000
[0000.498] I> allocated(CO:22) base:0x278000000 size:0x1000000 align: 0x1000000
[0000.505] I> allocated(CO:35) base:0x279000000 size:0xe00000 align: 0x10000
[0000.512] I> allocated(CO:02) base:0x271800000 size:0x800000 align: 0x800000
[0000.519] I> allocated(CO:03) base:0x271000000 size:0x800000 align: 0x800000
[0000.526] I> allocated(CO:06) base:0x270800000 size:0x800000 align: 0x800000
[0000.533] I> allocated(CO:56) base:0x270000000 size:0x800000 align: 0x200000
[0000.540] I> allocated(CO:07) base:0x26fc00000 size:0x400000 align: 0x400000
[0000.547] I> allocated(CO:33) base:0x26f800000 size:0x400000 align: 0x200000
[0000.554] I> allocated(CO:23) base:0x26f600000 size:0x200000 align: 0x200000
[0000.561] I> allocated(CO:01) base:0x26f500000 size:0x100000 align: 0x100000
[0000.568] I> allocated(CO:05) base:0x26f400000 size:0x100000 align: 0x100000
[0000.575] I> allocated(CO:08) base:0x26f300000 size:0x100000 align: 0x100000
[0000.582] I> allocated(CO:09) base:0x26f200000 size:0x100000 align: 0x100000
[0000.589] I> allocated(CO:15) base:0x26f100000 size:0x100000 align: 0x100000
[0000.595] I> allocated(CO:17) base:0x26f000000 size:0x100000 align: 0x100000
[0000.602] I> allocated(CO:27) base:0x26ef00000 size:0x100000 align: 0x100000
[0000.609] I> allocated(CO:42) base:0x26ee00000 size:0x100000 align: 0x100000
[0000.616] I> allocated(CO:54) base:0x26ed80000 size:0x80000 align: 0x80000
[0000.623] I> allocated(CO:34) base:0x26ed70000 size:0x10000 align: 0x10000
[0000.630] I> allocated(CO:72) base:0x26eb70000 size:0x200000 align: 0x10000
[0000.637] I> allocated(CO:47) base:0x26e600000 size:0x400000 align: 0x200000
[0000.644] I> allocated(CO:48) base:0x26eb50000 size:0x20000 align: 0x10000
[0000.650] I> allocated(CO:69) base:0x26eb30000 size:0x20000 align: 0x10000
[0000.657] I> allocated(CO:49) base:0x26eb20000 size:0x10000 align: 0x10000
[0000.664] I> allocated(CO:50) base:0x26eb10000 size:0x10000 align: 0x10000
[0000.671] I> NSDRAM base: 0x80000000, end: 0x26eb70000, size: 0x1eeb70000
[0000.677] I> Task: Thermal check
[0000.680] I> max_chip_limit = 105
[0000.684] I> min_chip_limit = -28
[0000.687] I> max temp read = 29
[0000.690] I> min temp read = 27
[0000.693] I> Task: Update FSI SCR with thermal fuse data
[0000.698] I> Task: Enable WDT 5th expiry
[0000.702] I> Task: I2C register
[0000.705] I> Task: Set I2C bus freq
[0000.708] I> Task: Reset FSI
[0000.711] I> Task: Pinmux init
[0000.714] I> skipped mmio_addr = 0x9240008
[0000.718] I> skipped mmio_addr = 0x9240000
[0000.722] I> skipped mmio_addr = 0x9240010
[0000.726] I> skipped mmio_addr = 0x9240018
[0000.730] I> skipped mmio_addr = 0x9240020
[0000.734] I> skipped mmio_addr = 0x9240030
[0000.737] I> skipped mmio_addr = 0x9240028
[0000.741] I> skipped mmio_addr = 0x9240038
[0000.745] I> skipped mmio_addr = 0x9240040
[0000.749] I> skipped mmio_addr = 0x9240048
[0000.753] I> skipped mmio_addr = 0x9241000
[0000.757] I> skipped mmio_addr = 0x9241008
[0000.761] I> skipped mmio_addr = 0x9241010
[0000.765] I> skipped mmio_addr = 0x9241018
[0000.769] I> skipped mmio_addr = 0x9241020
[0000.773] I> skipped mmio_addr = 0x9241028
[0000.777] I> skipped mmio_addr = 0x9241030
[0000.781] I> skipped mmio_addr = 0x9241038
[0000.785] I> skipped mmio_addr = 0x9241040
[0000.789] I> skipped mmio_addr = 0x9242000
[0000.793] I> skipped mmio_addr = 0x9242008
[0000.797] I> Task: Prod config init
[0000.800] I> Task: Pad voltage init
[0000.803] I> Task: Prod init
[0000.806] I> Task: Program rst req config reg
[0000.810] I> Task: Common rail init
[0000.814] I> DONE: Thermal config
[0000.817] W> DEVICE_PROD: module = 13, instance = 4 not found in device prod.
[0000.826] I> DONE: SOC rail config
[0000.829] W> PMIC_CONFIG: Rail: MEMIO rail config not found in MB1 BCT.
[0000.836] I> DONE: MEMIO rail config
[0000.840] W> PMIC_CONFIG: Rail: GPU rail info not found in MB1 BCT.
[0000.846] I> DONE: GPU rail info
[0000.849] W> PMIC_CONFIG: Rail: CV rail info not found in MB1 BCT.
[0000.855] I> DONE: CV rail info
[0000.858] I> Task: Mem clock src
[0000.861] I> Task: Misc. board config
[0000.865] I> PMIC_CONFIG: Platform config not found in MB1 BCT.
[0000.870] I> Task: SDRAM init
[0000.873] I> MemoryType: 4 MemBctRevision: 1
[0000.880] I> MSS CAR: PLLM/HUB programming for MemoryType: 4 and MemBctRevision: 1
[0000.887] I> MSS CAR: Init PLLM
[0000.890] I> MSS CAR: Init PLLHUB
[0000.895] I> Encryption:   MTS: en, TX: en, VPR: en, GSC: en
[0000.906] I> SDRAM initialized!
[0000.909] I> SDRAM Size in Total 0x200000000
[0000.913] I> Task: Dram Ecc scrub
[0000.917] I> Task: DRAM alias check
[0000.923] I> Task: Program NSDRAM carveout
[0000.927] I> NSDRAM carveout encryption is enabled
[0000.932] I> Program NSDRAM carveout
[0000.935] I> Task: Register checker
[0000.939] I> Task: Enable clock-mon
[0000.943] I> FMON: Fmon re-programming done
[0000.947] I> Task: Mapper init
[0000.950] I> Task: SC7 Context Init
[0000.953] I> Task: CCPLEX IST init
[0000.956] I> Task: CPU WP0
[0000.959] I> Loading MCE
[0000.961] I> Slot: 0
[0000.964] I> Binary[8] block-22784 (partition size: 0x80000)
[0000.969] I> Binary name: MCE
[0000.972] I> Size of crypto header is 8192
[0000.976] I> Size of crypto header is 8192
[0000.980] I> strt_pg_num(22784) num_of_pgs(16) read_buf(0x4003e000)
[0000.986] I> BCH of MCE read from storage
[0000.990] I> BCH address is : 0x4003e000
[0000.994] I> MCE header integrity check is success
[0000.998] I> Binary magic in BCH component 0 is MTSM
[0001.003] I> component binary type is 8
[0001.007] I> Size of crypto header is 8192
[0001.011] I> strt_pg_num(22800) num_of_pgs(357) read_buf(0x40000000)
[0001.019] I> MCE binary is read from storage
[0001.024] I> MCE binary integrity check is success
[0001.028] I> Binary MCE loaded successfully at 0x40000000 (0x2c880)
[0001.034] I> Size of crypto header is 8192
[0001.045] I> Size of crypto header is 8192
[0001.049] I> Sending WP0 mailbox command to PSC
[0001.059] I> Task: XUSB Powergate
[0001.062] I> Skipping powergate XUSB.
[0001.065] I> Task: MB1 fixed firewalls
[0001.072] W> Firewall readback mismatch
[0001.077] I> Task: Load bpmp-fw
[0001.080] I> Slot: 0
[0001.082] I> Binary[15] block-9984 (partition size: 0x180000)
[0001.087] I> Binary name: BPMP_FW
[0001.090] I> Size of crypto header is 8192
[0001.094] I> Size of crypto header is 8192
[0001.098] I> strt_pg_num(9984) num_of_pgs(16) read_buf(0x807fe000)
[0001.104] I> BCH of BPMP_FW read from storage
[0001.109] I> BCH address is : 0x807fe000
[0001.112] I> BPMP_FW header integrity check is success
[0001.117] I> Binary magic in BCH component 0 is BPMF
[0001.122] I> component binary type is 15
[0001.126] I> Size of crypto header is 8192
[0001.130] I> strt_pg_num(10000) num_of_pgs(1990) read_buf(0x80000000)
[0001.147] I> BPMP_FW binary is read from storage
[0001.154] I> BPMP_FW binary integrity check is success
[0001.159] I> Binary BPMP_FW loaded successfully at 0x80000000 (0xf8bc0)
[0001.165] I> Slot: 0
[0001.167] I> Binary[16] block-13056 (partition size: 0x400000)
[0001.173] I> Binary name: BPMP_FW_DTB
[0001.176] I> Size of crypto header is 8192
[0001.180] I> Size of crypto header is 8192
[0001.184] I> strt_pg_num(13056) num_of_pgs(16) read_buf(0x807fc000)
[0001.191] I> BCH of BPMP_FW_DTB read from storage
[0001.195] I> BCH address is : 0x807fc000
[0001.199] I> BPMP_FW_DTB header integrity check is success
[0001.204] I> Binary magic in BCH component 0 is BPMD
[0001.209] I> component binary type is 16
[0001.213] I> Size of crypto header is 8192
[0001.217] I> strt_pg_num(13072) num_of_pgs(375) read_buf(0x807cd1f0)
[0001.225] I> BPMP_FW_DTB binary is read from storage
[0001.230] I> BPMP_FW_DTB binary integrity check is success
[0001.236] I> Binary BPMP_FW_DTB loaded successfully at 0x807cd1f0 (0x2ed00)
[0001.243] I> Task: BPMP fw ast config
[0001.246] I> Task: Load psc-fw
[0001.249] I> Slot: 0
[0001.251] I> Binary[17] block-21248 (partition size: 0xc0000)
[0001.257] I> Binary name: PSC_FW
[0001.260] I> Size of crypto header is 8192
[0001.264] I> Size of crypto header is 8192
[0001.267] I> strt_pg_num(21248) num_of_pgs(16) read_buf(0x80ffe000)
[0001.274] I> BCH of PSC_FW read from storage
[0001.278] I> BCH address is : 0x80ffe000
[0001.282] I> PSC_FW header integrity check is success
[0001.287] I> Binary magic in BCH component 0 is PFWP
[0001.291] I> component binary type is 17
[0001.295] I> Size of crypto header is 8192
[0001.299] I> strt_pg_num(21264) num_of_pgs(717) read_buf(0x80fa4600)
[0001.309] I> PSC_FW binary is read from storage
[0001.314] I> PSC_FW binary integrity check is success
[0001.319] I> Binary PSC_FW loaded successfully at 0x80fa4600 (0x59980)
[0001.326] I> Task: Load nvdec-fw
[0001.329] I> Slot: 0
[0001.331] I> Binary[7] block-6400 (partition size: 0x100000)
[0001.336] I> Binary name: NVDEC
[0001.339] I> Size of crypto header is 8192
[0001.343] I> Size of crypto header is 8192
[0001.347] I> strt_pg_num(6400) num_of_pgs(16) read_buf(0x800fe000)
[0001.353] I> BCH of NVDEC read from storage
[0001.357] I> BCH address is : 0x800fe000
[0001.361] I> NVDEC header integrity check is success
[0001.366] I> Binary magic in BCH component 0 is NDEC
[0001.371] I> component binary type is 7
[0001.374] I> Size of crypto header is 8192
[0001.378] I> strt_pg_num(6416) num_of_pgs(560) read_buf(0x80000000)
[0001.388] I> NVDEC binary is read from storage
[0001.393] I> NVDEC binary integrity check is success
[0001.397] I> Binary NVDEC loaded successfully at 0x80000000 (0x46000)
[0001.404] I> Size of crypto header is 8192
[0001.415] I> Task: Load tsec-fw
[0001.418] I> TSEC-FW load support not enabled
[0001.422] I> Task: GPIO interrupt map
[0001.426] I> Task: SC7 context save
[0001.429] I> Slot: 0
[0001.431] I> Binary[27] block-0 (partition size: 0x100000)
[0001.437] I> Binary name: BR_BCT
[0001.440] I> Size of crypto header is 8192
[0001.444] I> Size of crypto header is 8192
[0001.448] I> Size of crypto header is 8192
[0001.451] I> strt_pg_num(0) num_of_pgs(16) read_buf(0xa0000000)
[0001.457] I> BR_BCT binary is read from storage
[0001.462] I> BR_BCT binary integrity check is success
[0001.467] I> Binary BR_BCT loaded successfully at 0xa0000000 (0x2000)
[0001.473] I> Slot: 0
[0001.475] I> Binary[13] block-23808 (partition size: 0x30000)
[0001.481] I> Binary name: SC7-FW
[0001.484] I> Size of crypto header is 8192
[0001.488] I> Size of crypto header is 8192
[0001.492] I> Size of crypto header is 8192
[0001.496] I> Size of crypto header is 8192
[0001.499] I> strt_pg_num(23808) num_of_pgs(16) read_buf(0xa0002000)
[0001.506] I> BCH of SC7-FW read from storage
[0001.510] I> BCH address is : 0xa0002000
[0001.514] I> SC7-FW header integrity check is success
[0001.519] I> Binary magic in BCH component 0 is WB0B
[0001.523] I> component binary type is 13
[0001.527] I> Size of crypto header is 8192
[0001.531] I> strt_pg_num(23824) num_of_pgs(347) read_buf(0xa0004000)
[0001.539] I> SC7-FW binary is read from storage
[0001.544] I> SC7-FW binary integrity check is success
[0001.549] I> Binary SC7-FW loaded successfully at 0xa0004000 (0x2b440)
[0001.555] I> Slot: 0
[0001.557] I> Binary[22] block-24192 (partition size: 0x30000)
[0001.563] I> Binary name: PSC_RF
[0001.566] I> Size of crypto header is 8192
[0001.570] I> Size of crypto header is 8192
[0001.574] I> Size of crypto header is 8192
[0001.578] I> Size of crypto header is 8192
[0001.582] I> strt_pg_num(24192) num_of_pgs(16) read_buf(0xa002f440)
[0001.588] I> BCH of PSC_RF read from storage
[0001.592] I> BCH address is : 0xa002f440
[0001.596] I> PSC_RF header integrity check is success
[0001.601] I> Binary magic in BCH component 0 is PSCR
[0001.606] I> component binary type is 22
[0001.609] I> Size of crypto header is 8192
[0001.613] I> strt_pg_num(24208) num_of_pgs(224) read_buf(0xa0031440)
[0001.621] I> PSC_RF binary is read from storage
[0001.625] I> PSC_RF binary integrity check is success
[0001.630] I> Binary PSC_RF loaded successfully at 0xa0031440 (0x1be60)
[0001.640] I> Task: Save WP0 payload to SC7 ctx
[0001.644] I> Task: Load MB2rf binary to SC7 ctx
[0001.648] I> Slot: 0
[0001.650] I> Binary[14] block-24576 (partition size: 0x20000)
[0001.656] I> Binary name: MB2_RF
[0001.659] I> Size of crypto header is 8192
[0001.663] I> Size of crypto header is 8192
[0001.667] I> Size of crypto header is 8192
[0001.671] I> Size of crypto header is 8192
[0001.675] I> strt_pg_num(24576) num_of_pgs(16) read_buf(0xa00d6aa0)
[0001.681] I> BCH of MB2_RF read from storage
[0001.685] I> BCH address is : 0xa00d6aa0
[0001.689] I> MB2_RF header integrity check is success
[0001.694] I> Binary magic in BCH component 0 is MB2R
[0001.699] I> component binary type is 14
[0001.702] I> Size of crypto header is 8192
[0001.706] I> strt_pg_num(24592) num_of_pgs(224) read_buf(0xa00d8aa0)
[0001.714] I> MB2_RF binary is read from storage
[0001.718] I> MB2_RF binary integrity check is success
[0001.723] I> Binary MB2_RF loaded successfully at 0xa00d8aa0 (0x1bfc0)
[0001.730] I> Task: Save fuse alias data to SC7 ctx
[0001.734] I> Task: Save PMIC data to SC7 ctx
[0001.738] I> Task: Save Pinmux data to SC7 ctx
[0001.743] I> Task: Save Pad Voltage data to SC7 ctx
[0001.748] I> Task: Save controller prod data to SC7 ctx
[0001.753] I> Task: Save prod cfg data to SC7 ctx
[0001.757] I> Task: Save I2C bus freq data to SC7 ctx
[0001.762] I> Task: Save SOCTherm data to SC7 ctx
[0001.766] I> Task: Save FMON data to SC7 ctx
[0001.770] I> Task: Save VMON data to SC7 ctx
[0001.774] I> Task: Save TZDRAM data to SC7 ctx
[0001.779] I> Task: Save GPIO int data to SC7 ctx
[0001.783] I> Task: Save clock data to SC7 ctx
[0001.787] I> Task: Save debug data to SC7 ctx
[0001.792] I> Task: Save MBWT data to SC7 ctx
[0001.800] I> SC7 context save done
[0001.803] I> Task: Load MB2/Applet/FSKP
[0001.807] I> Loading MB2
[0001.809] I> Slot: 0
[0001.811] I> Binary[6] block-8448 (partition size: 0x80000)
[0001.816] I> Binary name: MB2
[0001.819] I> Size of crypto header is 8192
[0001.823] I> Size of crypto header is 8192
[0001.827] I> strt_pg_num(8448) num_of_pgs(16) read_buf(0x8007e000)
[0001.833] I> BCH of MB2 read from storage
[0001.837] I> BCH address is : 0x8007e000
[0001.841] I> MB2 header integrity check is success
[0001.846] I> Binary magic in BCH component 0 is MB2B
[0001.850] I> component binary type is 6
[0001.854] I> Size of crypto header is 8192
[0001.858] I> strt_pg_num(8464) num_of_pgs(838) read_buf(0x80000000)
[0001.869] I> MB2 binary is read from storage
[0001.874] I> MB2 binary integrity check is success
[0001.878] I> Binary MB2 loaded successfully at 0x80000000 (0x68b10)
[0001.885] I> Task: Map CCPLEX SHARED carveout
[0001.889] I> Task: Prepare MB2 params
[0001.893] I> Task: Dram ecc test
[0001.896] I> Task: Misc NV security settings
[0001.900] I> NVDEC sticky bits programming done
[0001.904] I> Successfully powergated NVDEC
[0001.908] I> Task: Disable/Reload WDT
[0001.912] I> Task: Program misc carveouts
[0001.916] I> Program IPC carveouts
[0001.919] I> Task: Disable SCPM/POD reset
[0001.923] I> SLCG Global override status := 0x0
[0001.927] I> MB1: MSS reconfig completed
I> MB2 (version: 0.0.0.0-t234-54845784-934581f8)
I> t234-A01-1-Silicon (0x12347)
I> Boot-mode : Coldboot
I> Emulation:
I> Entry timestamp: 0x001ddda1
I> Regular heap: [base:0x40040000, size:0x10000]
I> DMA heap: [base:0x270000000, size:0x800000]
I> Task: ARI update carveout TZDRAM (0x50002050)
I> Task: Check MC errors (0x5000204c)
I> Task: Enable hot-plug capability (0x500290f8)
I> Task: TZDRAM heap init (0x5001a0fc)
I> Task: PSC mailbox init (0x50018864)
I> Task: Crypto init (0x50006874)
I> Task: Enable GP-SE clock (0x500021b4)
I> Task: Measured Boot init (0x5001c04c)
I> Task: fTPM silicon identity init (0x5001c1f8)
I> fTPM is not enabled.
I> Task: OEM SC7 context save init (0x5001b598)
I> Task: I2C register (0x50002010)
I> Task: Map CCPLEX_INTERWORLD_SHMEM carveout (0x50001ff8)
I> Task: Program CBB PCIE AMAP regions (0x5001bcf8)
I> Task: Boot device init (0x50001f40)
I> Boot_device: QSPI_FLASH instance: 0
I> Qspi clock source : pllc_out0
I> QSPI-0l initialized successfully
I> Task: Partition Manager Init (0x50001f20)
I> Active chain: 0
I> Found 57 partitions in QSPI_FLASH (instance 0)
I> Task: Load and authenticate registered FWs (0x5001f064)
I> Task: Load AUXP FWs (0x50028c7c)
I> Successfully register SPE FW load task with MB2 loader
I> Skipping SCE FW load
I> Successfully register RCE FW load task with MB2 loader
I> Successfully register DCE FW load task with MB2 loader
I> Unpowergating APE
I> Unpowergate done
I> Successfully register APE FW load task with MB2 loader
I> Skipping FSI FW load
I> Successfully register XUSB FW load task with MB2 loader
I> Active chain: 0
I> Partition name: A_spe-fw
I> Size of partition: 589824
I> Binary@ device:3/0 block-55040 (partition size: 0x90000), name: A_spe-fw
I> Active chain: 0
I> Partition name: A_rce-fw
I> Size of partition: 1048576
I> Binary@ device:3/0 block-56192 (partition size: 0x100000), name: A_rce-fw
I> spe: Authentication Finalize Done
I> Binary spe loaded successfully at 0x26f300000
I> Active chain: 0
I> Partition name: A_dce-fw
I> Size of partition: 5242880
I> Binary@ device:3/0 block-44800 (partition size: 0x500000), name: A_dce-fw
I> rce: Authentication Finalize Done
I> Binary rce loaded successfully at 0x26f000000
I> Successfully register RCE FW context save task with MB2 loader
I> dce : oem authentication of header done
I> dce : meta-blob integrity check is success.
I> dce : will be decompressed at 0x276000000
I> version 1 Bin 1 BCheckSum 0 content_size 0 Content ChkSum 1 reserved_00  0
I> Reserved10 0 BlockMaxSize 5 Reserved11 0
I> dce : decompressed to 9449600 bytes
I> dce: plain binary integrity check is success
I> Active chain: 0
I> Partition name: A_adsp-fw
I> Size of partition: 2097152
I> Binary@ device:3/0 block-58240 (partition size: 0x200000), name: A_adsp-fw
I> dce: Authentication Finalize Done
I> Binary dce loaded successfully at 0x276000000
I> Active chain: 0
I> Partition name: A_xusb-fw
I> Size of partition: 262144
I> Binary@ device:3/0 block-9472 (partition size: 0x40000), name: A_xusb-fw
I> ape: Authentication Finalize Done
I> Binary ape loaded successfully at 0x26fc00000
I> Successfully register APE FW context save task with MB2 loader
I> xusb: Authentication Finalize Done
I> Binary xusb loaded successfully at 0x26f400000
I> Successfully register XUSB FW context save task with MB2 loader
I> Task: Check MC errors (0x5000204c)
I> Task: Carveout setup (0x500217e4)
I> Program remaining OEM carveouts
I> Task: Enable FSITHERM (0x50018738)
I> Task: Enable FSI VMON (0x50018234)
I> Task: Validate FSI Therm readings (0x50018318)
I> Task: Restore XUSB sec (0x50001ef4)
I> Task: Enable FSI SE clock (0x50018cc0)
I> Task: Initialize SBSA UART CAR (0x50002118)
I> Task: Initialize CPUBL Params (0x50019cac)
I> CPUBL-params @ 0x272000000
I> Task: Ratchet update (0x5002a194)
W> Skip ratchet update - OPTIN fuse not set
I> Task: Prepare eeprom data (0x50019a78)
E> I2C: slave not found in slaves.
E> I2C: Could not write 0 bytes to slave: 0x00ae with repeat start true.
E> I2C_DEV: Failed to send register address 0x00000000.
E> I2C_DEV: Could not read 256 registers of size 1 from slave 0xae at 0x00000000 via instance 0.
E> eeprom: Failed to read I2C slave device
C> Task 0x0 failed (err: 0x1f1e050d)
E> Top caller module: I2C_DEV, error module: I2C, reason: 0x0d, aux_info: 0x05
I> Busy Spin

Any help would be appreciated!
Matt