From ac208d4776c67b7b1e49dcc71219f8161ad94172 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Miko=C5=82aj=20Sza=C5=82kowski?= Date: Thu, 26 Sep 2024 14:34:10 +0000 Subject: [PATCH] Disallow Tuple[str] signal variant in an IP core description --- tests/data/data_parse/axi_axil_adapter.yaml | 76 +++++++-------------- tests/data/data_parse/ip_core_invalid.yaml | 2 + tests/data/data_parse/ip_core_valid.yaml | 2 +- tests/tests_parse/test_ip_desc.py | 31 +++++---- topwrap/ip_desc.py | 4 +- 5 files changed, 48 insertions(+), 67 deletions(-) diff --git a/tests/data/data_parse/axi_axil_adapter.yaml b/tests/data/data_parse/axi_axil_adapter.yaml index 97110740..994e6df0 100644 --- a/tests/data/data_parse/axi_axil_adapter.yaml +++ b/tests/data/data_parse/axi_axil_adapter.yaml @@ -10,8 +10,8 @@ parameters: CONVERT_NARROW_BURST: 0 signals: in: - - - clk - - - rst + - clk + - rst interfaces: s_axi: signals: @@ -28,14 +28,12 @@ interfaces: - s_axi_awburst - 1 - 0 - ARVALID: - - s_axi_arvalid + ARVALID: s_axi_arvalid AWCACHE: - s_axi_awcache - 3 - 0 - AWVALID: - - s_axi_awvalid + AWVALID: s_axi_awvalid ARPROT: - s_axi_arprot - 2 @@ -44,12 +42,9 @@ interfaces: - s_axi_awprot - 2 - 0 - BREADY: - - s_axi_bready - ARLOCK: - - s_axi_arlock - RREADY: - - s_axi_rready + BREADY: s_axi_bready + ARLOCK: s_axi_arlock + RREADY: s_axi_rready ARSIZE: - s_axi_arsize - 2 @@ -66,10 +61,8 @@ interfaces: - s_axi_awaddr - (ADDR_WIDTH-1) - 0 - WVALID: - - s_axi_wvalid - AWLOCK: - - s_axi_awlock + WVALID: s_axi_wvalid + AWLOCK: s_axi_awlock AWLEN: - s_axi_awlen - 7 @@ -78,8 +71,7 @@ interfaces: - s_axi_wdata - (AXI_DATA_WIDTH-1) - 0 - WLAST: - - s_axi_wlast + WLAST: s_axi_wlast WSTRB: - s_axi_wstrb - (AXI_STRB_WIDTH-1) @@ -97,18 +89,12 @@ interfaces: - (AXI_ID_WIDTH-1) - 0 out: - ARREADY: - - s_axi_arready - AWREADY: - - s_axi_awready - WREADY: - - s_axi_wready - RVALID: - - s_axi_rvalid - BVALID: - - s_axi_bvalid - RLAST: - - s_axi_rlast + ARREADY: s_axi_arready + AWREADY: s_axi_awready + WREADY: s_axi_wready + RVALID: s_axi_rvalid + BVALID: s_axi_bvalid + RLAST: s_axi_rlast RDATA: - s_axi_rdata - (AXI_DATA_WIDTH-1) @@ -134,16 +120,11 @@ interfaces: m_axil: signals: in: - ARREADY: - - m_axil_arready - AWREADY: - - m_axil_awready - WREADY: - - m_axil_wready - RVALID: - - m_axil_rvalid - BVALID: - - m_axil_bvalid + ARREADY: m_axil_arready + AWREADY: m_axil_awready + WREADY: m_axil_wready + RVALID: m_axil_rvalid + BVALID: m_axil_bvalid RDATA: - m_axil_rdata - (AXIL_DATA_WIDTH-1) @@ -157,18 +138,14 @@ interfaces: - 1 - 0 out: - ARVALID: - - m_axil_arvalid - AWVALID: - - m_axil_awvalid + ARVALID: m_axil_arvalid + AWVALID: m_axil_awvalid AWPROT: - m_axil_awprot - 2 - 0 - BREADY: - - m_axil_bready - WVALID: - - m_axil_wvalid + BREADY: m_axil_bready + WVALID: m_axil_wvalid ARADDR: - m_axil_araddr - (ADDR_WIDTH-1) @@ -177,8 +154,7 @@ interfaces: - m_axil_awaddr - (ADDR_WIDTH-1) - 0 - RREADY: - - m_axil_rready + RREADY: m_axil_rready ARPROT: - m_axil_arprot - 2 diff --git a/tests/data/data_parse/ip_core_invalid.yaml b/tests/data/data_parse/ip_core_invalid.yaml index c6927aa4..3e42fe08 100644 --- a/tests/data/data_parse/ip_core_invalid.yaml +++ b/tests/data/data_parse/ip_core_invalid.yaml @@ -28,6 +28,8 @@ interfaces: signals: out: ABC: [] + non: + - nested foobar: {} barfoo: diff --git a/tests/data/data_parse/ip_core_valid.yaml b/tests/data/data_parse/ip_core_valid.yaml index 13af04b7..9d1d5c90 100644 --- a/tests/data/data_parse/ip_core_valid.yaml +++ b/tests/data/data_parse/ip_core_valid.yaml @@ -27,7 +27,7 @@ interfaces: signals: in: - clk - - [rst] + - rst - [leds, 10, 0] - - btns - 32 diff --git a/tests/tests_parse/test_ip_desc.py b/tests/tests_parse/test_ip_desc.py index efd2e61c..8dad6ad5 100644 --- a/tests/tests_parse/test_ip_desc.py +++ b/tests/tests_parse/test_ip_desc.py @@ -45,11 +45,11 @@ def invalid_interface_compliance_core(self): type: AXI4Stream signals: out: - TDATA: [p1] - TVALID: [p2] - TBUBU: [p3] + TDATA: p1 + TVALID: p2 + TBUBU: p3 in: - TREADY: [p4]""" + TREADY: p4""" ) @pytest.fixture @@ -63,11 +63,11 @@ def optional_missing_interface_compliance_core(self): type: AXI4Stream signals: out: - TDATA: [p1] - TVALID: [p2] - TLAST: [p3] + TDATA: p1 + TVALID: p2 + TLAST: p3 in: - TREADY: [p4]""" + TREADY: p4""" ) @pytest.fixture @@ -159,13 +159,11 @@ def test_invalid_syntax(self, completely_invalid_core): "in": { 1: [ {"_schema": ["Not a valid string."]}, - {"_schema": ["Length must be 1."]}, {"_schema": ["Length must be 3."]}, {"_schema": ["Length must be 5."]}, ], 2: [ {"_schema": ["Not a valid string."]}, - {"_schema": ["Length must be 1."]}, {"_schema": ["Length must be 3."]}, {"_schema": ["Length must be 5."]}, ], @@ -173,7 +171,6 @@ def test_invalid_syntax(self, completely_invalid_core): {"_schema": ["Not a valid string."]}, {"_schema": ["Not a valid tuple."]}, {"_schema": ["Not a valid tuple."]}, - {"_schema": ["Not a valid tuple."]}, ], }, "inout": ["Field may not be null."], @@ -221,11 +218,17 @@ def test_invalid_syntax(self, completely_invalid_core): "ABC": { "value": [ {"_schema": ["Not a valid string."]}, - {"_schema": ["Length must be 1."]}, {"_schema": ["Length must be 3."]}, {"_schema": ["Length must be 5."]}, ] - } + }, + "non": { + "value": [ + {"_schema": ["Not a valid string."]}, + {"_schema": ["Length must be 3."]}, + {"_schema": ["Length must be 5."]}, + ] + }, }, "barfoo": ["Unknown field."], "foobar": ["Unknown field."], @@ -265,7 +268,7 @@ def test_valid_syntax(self, completely_valid_core, force_compliance): "clk", ("btns", 32, 0, 15, 10), ("leds", 10, 0), - ("rst",), + "rst", ("useless", 22, 10), }, output=set(), diff --git a/topwrap/ip_desc.py b/topwrap/ip_desc.py index bb218c26..1f30fb0f 100644 --- a/topwrap/ip_desc.py +++ b/topwrap/ip_desc.py @@ -30,7 +30,7 @@ _T = Union[str, int] -Signal = Union[str, Tuple[str], Tuple[str, _T, _T], Tuple[str, _T, _T, _T, _T]] +Signal = Union[str, Tuple[str, _T, _T], Tuple[str, _T, _T, _T, _T]] @marshmallow_dataclass.dataclass(frozen=True) @@ -50,7 +50,7 @@ def bounds(self) -> Tuple[_T, _T, _T, _T]: def raw(self) -> Signal: out = self.bounds if out == (0, 0, 0, 0): - out = (self.name,) + out = self.name elif out[:2] == out[2:]: out = (self.name, *out[:2]) else: