From 443a4044f383840a4cfce2a4ac89267e62f0723b Mon Sep 17 00:00:00 2001
From: Hsubtnarg <101956419+Hsubtnarg@users.noreply.github.com>
Date: Wed, 29 May 2024 09:00:58 +1200
Subject: [PATCH 1/2] Serial: split uart events TX_COMPLETE from TX_DATA_EMPTY

  Use UART_EVEN_TX_COMPLETE to determine when flush() should return
---
 cores/arduino/Serial.cpp | 26 +++++++++++++++-----------
 cores/arduino/Serial.h   |  3 ++-
 2 files changed, 17 insertions(+), 12 deletions(-)

diff --git a/cores/arduino/Serial.cpp b/cores/arduino/Serial.cpp
index d905edd9..755ef801 100644
--- a/cores/arduino/Serial.cpp
+++ b/cores/arduino/Serial.cpp
@@ -58,12 +58,14 @@ void UART::WrapperCallback(uart_callback_args_t *p_args) {
       {
           break;
       }
-      case UART_EVENT_TX_COMPLETE:
-      case UART_EVENT_TX_DATA_EMPTY:
+      case UART_EVENT_TX_COMPLETE: // This is call when the transmission is complete
       {
-        //uint8_t to_enqueue = uart_ptr->txBuffer.available() < uart_ptr->uart_ctrl.fifo_depth ? uart_ptr->txBuffer.available() : uart_ptr->uart_ctrl.fifo_depth;
-        //while (to_enqueue) {
-        uart_ptr->tx_done = true;
+        uart_ptr->tx_complete = true;
+        break;
+      }
+      case UART_EVENT_TX_DATA_EMPTY: // This is called when the buffer is empty
+      {                              // Last byte is transmitting, but ready for more data
+        uart_ptr->tx_empty = true;
         break;
       }
       case UART_EVENT_RX_CHAR:
@@ -109,9 +111,10 @@ bool UART::setUpUartIrqs(uart_cfg_t &cfg) {
 size_t UART::write(uint8_t c) {
 /* -------------------------------------------------------------------------- */  
   if(init_ok) {
-    tx_done = false;
+    tx_empty = false;
+    tx_complete = false;
     R_SCI_UART_Write(&uart_ctrl, &c, 1);
-    while (!tx_done) {}
+    while (!tx_empty) {}
     return 1;
   }
   else {
@@ -121,9 +124,10 @@ size_t UART::write(uint8_t c) {
 
 size_t  UART::write(uint8_t* c, size_t len) {
   if(init_ok) {
-    tx_done = false;
+    tx_empty = false;
+    tx_complete = false;
     R_SCI_UART_Write(&uart_ctrl, c, len);
-    while (!tx_done) {}
+    while (!tx_empty) {}
     return len;
   }
   else {
@@ -322,7 +326,7 @@ int UART::read() {
 /* -------------------------------------------------------------------------- */
 void UART::flush() {
 /* -------------------------------------------------------------------------- */  
-  while(txBuffer.available());
+  while(!tx_complete);
 }
 
 /* -------------------------------------------------------------------------- */
@@ -335,4 +339,4 @@ size_t UART::write_raw(uint8_t* c, size_t len) {
     i++;
   }
   return len;
-}
\ No newline at end of file
+}
diff --git a/cores/arduino/Serial.h b/cores/arduino/Serial.h
index cc818d46..29a41d2c 100644
--- a/cores/arduino/Serial.h
+++ b/cores/arduino/Serial.h
@@ -78,7 +78,8 @@ class UART : public arduino::HardwareSerial {
     arduino::SafeRingBufferN<SERIAL_BUFFER_SIZE> rxBuffer;
     arduino::SafeRingBufferN<SERIAL_BUFFER_SIZE> txBuffer;
 
-    volatile bool tx_done;
+    volatile bool tx_empty;
+    volatile bool tx_complete;
 
     sci_uart_instance_ctrl_t  uart_ctrl;
     uart_cfg_t                uart_cfg;

From 51e2905a93b4bde2daf97622d7d8a8593b9f8f62 Mon Sep 17 00:00:00 2001
From: pennam <m.pennasilico@arduino.cc>
Date: Fri, 29 Nov 2024 12:17:11 +0100
Subject: [PATCH 2/2] Serial: initialize tx flags to avoid locks

---
 cores/arduino/Serial.cpp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/cores/arduino/Serial.cpp b/cores/arduino/Serial.cpp
index 755ef801..e82d7679 100644
--- a/cores/arduino/Serial.cpp
+++ b/cores/arduino/Serial.cpp
@@ -89,6 +89,8 @@ UART::UART(int _pin_tx, int _pin_rx, int _pin_rts, int _pin_cts):
   rx_pin(_pin_rx),
   rts_pin(_pin_rts),
   cts_pin(_pin_cts),
+  tx_empty(true),
+  tx_complete(true),
   init_ok(false) {
 /* -------------------------------------------------------------------------- */    
   uart_cfg.txi_irq = FSP_INVALID_VECTOR;