Simulation of the Tomasulo algorithm using python and verilog. Python code has been included to simulate dynamic instruction scheduling. This project was done as the part of Computer Architecture course.
Instruction format is given in instructions.txt.
- Install Icarus Verilog
python3 main.py
- Python3
- Verilog
Registers.list[0].data = '10'
Registers.list[1].data = '11'
Registers.list[2].data = '12'
Registers.list[3].data = '13'
Registers.list[4].data = '14'
Registers.list[5].data = '15'
Registers.list[6].data = '16'
Registers.list[7].data = '17'
Registers.list[8].data = '18'
Registers.list[9].data = '19'
Registers.list[10].data = '30'
Memory.write_memory(11, 40)
Memory.write_memory(12, 42)
Memory.write_memory(13, 43)
Memory.write_memory(14, 44)
Memory.write_memory(110,820)
ADD R11 R10 R10
MUL R12 R0 R1
FADD R13 R12 R8
FMUL R14 R2 R4
LD R15 R12
ST R8 R12