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ref: fix build-riscv test issues
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Signed-off-by: Manuel Rodríguez <[email protected]>
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@malejo97
malejo97 committed May 26, 2024
1 parent 8549433 commit 9e37025
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Showing 2 changed files with 25 additions and 48 deletions.
11 changes: 11 additions & 0 deletions src/arch/riscv/inc/arch/iommu.h
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Original file line number Diff line number Diff line change
Expand Up @@ -13,4 +13,15 @@ struct iommu_vm_arch {
EMPTY_STRUCT_FIELDS
};

struct vm;
void rv_iommu_fq_irq_handler(irqid_t irq_id);
void alloc_2lvl_vptrs(void);
void up_1lvl_to_2lvl(void);
void alloc_3lvl_vptrs(void);
void up_2lvl_to_3lvl(void);
void ddt_init(void);
void rv_iommu_init(void);
bool rv_iommu_alloc_did(deviceid_t dev_id);
void rv_iommu_write_ddt(deviceid_t dev_id, struct vm* vm, paddr_t root_pt);

#endif /* __IOMMU_ARCH_H__ */
62 changes: 14 additions & 48 deletions src/arch/riscv/iommu.c
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Original file line number Diff line number Diff line change
Expand Up @@ -30,14 +30,11 @@
#define RV_IOMMU_FCTL_DEFAULT (RV_IOMMU_FCTL_WSI_BIT)

// Device Directory Table Pointer register
#define RV_IOMMU_DDTP_MODE_OFF (0ULL)
#define RV_IOMMU_DDTP_MODE_BARE (1ULL)
#define RV_IOMMU_DDTP_MODE_1LVL (2ULL)
#define RV_IOMMU_DDTP_MODE_2LVL (3ULL)
#define RV_IOMMU_DDTP_MODE_3LVL (4ULL)

#define RV_IOMMU_DDTP_BUSY_BIT (0x1ULL << 4)

#define RV_IOMMU_DDTP_PPN_OFF (10)
#define RV_IOMMU_DDTP_PPN_LEN (44)
#define RV_IOMMU_DDTP_PPN_MASK BIT64_MASK(RV_IOMMU_DDTP_PPN_OFF, RV_IOMMU_DDTP_PPN_LEN)
Expand All @@ -50,8 +47,6 @@
#define RV_IOMMU_XQCSR_EN_BIT (1ULL << 0)
#define RV_IOMMU_XQCSR_IE_BIT (1ULL << 1)
#define RV_IOMMU_XQCSR_MF_BIT (1ULL << 8)
#define RV_IOMMU_XQCSR_ON_BIT (1ULL << 16)
#define RV_IOMMU_XQCSR_BUSY_BIT (1ULL << 17)

// FQ CSR
#define RV_IOMMU_FQCSR_OF_BIT (1ULL << 9)
Expand Down Expand Up @@ -137,7 +132,6 @@ struct riscv_iommu_regmap {

// Leaf
#define RV_IOMMU_DC_VALID_BIT (1ULL << 0)
#define RV_IOMMU_DC_DTF_BIT (1ULL << 4)

#define RV_IOMMU_DC_IOHGATP_PPN_OFF (0)
#define RV_IOMMU_DC_IOHGATP_PPN_LEN (44)
Expand All @@ -148,36 +142,7 @@ struct riscv_iommu_regmap {
#define RV_IOMMU_DC_IOHGATP_GSCID_MASK \
BIT64_MASK(RV_IOMMU_DC_IOHGATP_GSCID_OFF, RV_IOMMU_DC_IOHGATP_GSCID_LEN)
#define RV_IOMMU_DC_IOHGATP_MODE_OFF (60)
#define RV_IOMMU_DC_IOHGATP_MODE_LEN (4)
#define RV_IOMMU_DC_IOHGATP_MODE_MASK \
BIT64_MASK(RV_IOMMU_DC_IOHGATP_MODE_OFF, RV_IOMMU_DC_IOHGATP_MODE_LEN)
#define RV_IOMMU_IOHGATP_SV39X4 (8ULL << RV_IOMMU_DC_IOHGATP_MODE_OFF)
#define RV_IOMMU_IOHGATP_BARE (0ULL << RV_IOMMU_DC_IOHGATP_MODE_OFF)

#define RV_IOMMU_DC_IOHGATP_PSCID_OFF (12)
#define RV_IOMMU_DC_IOHGATP_PSCID_LEN (20)
#define RV_IOMMU_DC_IOHGATP_PSCID_MASK \
BIT64_MASK(RV_IOMMU_DC_IOHGATP_PSCID_OFF, RV_IOMMU_DC_IOHGATP_PSCID_LEN)

#define RV_IOMMU_DC_FSC_PPN_OFF (0)
#define RV_IOMMU_DC_FSC_PPN_LEN (44)
#define RV_IOMMU_DC_FSC_PPN_MASK BIT64_MASK(RV_IOMMU_DC_FSC_PPN_OFF, RV_IOMMU_DC_FSC_PPN_LEN)
#define RV_IOMMU_DC_FSC_MODE_OFF (60)
#define RV_IOMMU_DC_FSC_MODE_LEN (4)
#define RV_IOMMU_DC_FSC_MODE_MASK BIT64_MASK(RV_IOMMU_DC_FSC_MODE_OFF, RV_IOMMU_DC_FSC_MODE_LEN)

#define RV_IOMMU_DC_MSIPTP_PPN_OFF (0)
#define RV_IOMMU_DC_MSIPTP_PPN_LEN (44)
#define RV_IOMMU_DC_MSIPTP_PPN_MASK \
BIT64_MASK(RV_IOMMU_DC_MSIPTP_PPN_OFF, RV_IOMMU_DC_MSIPTP_PPN_LEN)
#define RV_IOMMU_DC_MSIPTP_MODE_OFF (60)
#define RV_IOMMU_DC_MSIPTP_MODE_LEN (4)
#define RV_IOMMU_DC_MSIPTP_MODE_MASK \
BIT64_MASK(RV_IOMMU_DC_MSIPTP_MODE_OFF, RV_IOMMU_DC_MSIPTP_MODE_LEN)

#define RV_IOMMU_DC_MSIMASK_OFF (0)
#define RV_IOMMU_DC_MSIMASK_LEN (52)
#define RV_IOMMU_DC_MSIMASK_MASK BIT64_MASK(RV_IOMMU_DC_MSIMASK_OFF, RV_IOMMU_DC_MSIMASK_LEN)
#define RV_IOMMU_IOHGATP_SV39X4 (8ULL << RV_IOMMU_DC_IOHGATP_MODE_OFF)

typedef uint64_t* ddt_bitmap_t;

Expand All @@ -200,10 +165,6 @@ struct ddt_entry {
// # Fault Queue
#define RV_IOMMU_FQ_CAUSE_OFF (0)
#define RV_IOMMU_FQ_CAUSE_LEN (12)
#define RV_IOMMU_FQ_PID_OFF (12)
#define RV_IOMMU_FQ_PID_LEN (20)
#define RV_IOMMU_FQ_TTYP_OFF (34)
#define RV_IOMMU_FQ_TTYP_LEN (6)
#define RV_IOMMU_FQ_DID_OFF (40)
#define RV_IOMMU_FQ_DID_LEN (24)

Expand Down Expand Up @@ -248,7 +209,7 @@ struct riscv_iommu_priv rv_iommu;
*/
static void rv_iommu_check_features(void)
{
unsigned version =
uint64_t version =
bit64_extract(rv_iommu.caps, RV_IOMMU_CAPS_VERSION_OFF, RV_IOMMU_CAPS_VERSION_LEN);

if (version != RV_IOMMU_SUPPORTED_VERSION) {
Expand All @@ -259,7 +220,7 @@ static void rv_iommu_check_features(void)
ERROR("RV IOMMU: Sv39x4 not supported");
}

unsigned igs = bit64_extract(rv_iommu.caps, RV_IOMMU_CAPS_IGS_OFF, RV_IOMMU_CAPS_IGS_LEN);
uint64_t igs = bit64_extract(rv_iommu.caps, RV_IOMMU_CAPS_IGS_OFF, RV_IOMMU_CAPS_IGS_LEN);
if (!igs) {
WARNING("RV IOMMU: WSI generation not supported. MSI generation is currently not supported "
"by Bao");
Expand All @@ -271,6 +232,8 @@ static void rv_iommu_check_features(void)
*/
void rv_iommu_fq_irq_handler(irqid_t irq_id)
{
UNUSED_ARG(irq_id);

// Read ipsr.fip
uint32_t ipsr = rv_iommu.hw.reg_ptr->ipsr;

Expand Down Expand Up @@ -449,7 +412,7 @@ void ddt_init(void)
uint64_t ddtp_readback = rv_iommu.hw.reg_ptr->ddtp;

if (ddtp_readback == ddtp_mode) {
rv_iommu.supported_modes |= (1 << (i + 2));
rv_iommu.supported_modes |= (uint8_t)(1 << (i + 2));
if (first) {
first = false;
simplest_mode = ddtp_mode; // save simplest mode
Expand Down Expand Up @@ -704,16 +667,16 @@ void rv_iommu_write_ddt(deviceid_t dev_id, struct vm* vm, paddr_t root_pt)
/*** Write DC ***/

// Get DC pointer
struct ddt_entry* dc_ptr = NULL;
volatile struct ddt_entry* dc_ptr = NULL;
switch (rv_iommu.iommu_mode) {
case RV_IOMMU_DDTP_MODE_3LVL:
dc_ptr = (struct ddt_entry*)(rv_iommu.hw.vddt_lvl2[ddi_2][ddi_1]);
dc_ptr = (volatile struct ddt_entry*)(rv_iommu.hw.vddt_lvl2[ddi_2][ddi_1]);
break;
case RV_IOMMU_DDTP_MODE_2LVL:
dc_ptr = (struct ddt_entry*)(rv_iommu.hw.vddt_lvl1[ddi_1]);
dc_ptr = (volatile struct ddt_entry*)(rv_iommu.hw.vddt_lvl1[ddi_1]);
break;
case RV_IOMMU_DDTP_MODE_1LVL:
dc_ptr = (struct ddt_entry*)rv_iommu.hw.vddt_lvl0;
dc_ptr = (volatile struct ddt_entry*)rv_iommu.hw.vddt_lvl0;
break;

default:
Expand Down Expand Up @@ -850,8 +813,11 @@ inline bool iommu_arch_vm_add_device(struct vm* vm, deviceid_t dev_id)
*
* @returns true on success, false on error.
*/
bool iommu_arch_vm_init(struct vm* vm, const struct vm_config* config)
bool iommu_arch_vm_init(struct vm* vm, const struct vm_config* vm_config)
{
UNUSED_ARG(vm);
UNUSED_ARG(vm_config);

// For now there is no data to initialize
return true;
}

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