- Cummings Verilog/SV “Gotchas” paper (See 2006-snug-boston_standard_gotchas_paper.pdf in learning suite)
- 4.1 - 4.4
- 5.1 - 5.3
- Verilog 95 artihmetic rules
- Signed artihmetic rules in Verilog 2001 (i.e., when is the result signed or unsigned)
- The syntax and meaning of signed literals in Verilog 2001 (what happens when there are fewer or more bits)
- Rules for arithmetic: mismatched types, incomplete size, sign extension, etc.