This lecture will review proper design practices and discuss common pitfalls.
- ECEN 220 Coding Standards
- Chu, Chapter 9.1
- Cummings Verilog/SV “Gotchas” paper (See 2006-snug-boston_standard_gotchas_paper.pdf in learning suite)
- 2.1-2.2, 6.1-6.2, 6.7-6.12,
- Coding standards
- Improper use of clocks
- Misuse of asynchronous resets
- Misuse of gated clocks
- Misuse of derived clocks
- What is a "Gotcha"?
- System Verilog Gotchas