From 89ff877af84475f31e758a91313c1303a24bf5be Mon Sep 17 00:00:00 2001 From: krk Date: Thu, 12 Dec 2024 12:30:26 +0000 Subject: [PATCH] 8345296: AArch64: VM crashes with SIGILL when prctl is disallowed Backport-of: 3c60f0b2bb75150d49da9ab94d88b767275de5e2 --- src/hotspot/cpu/aarch64/register_aarch64.hpp | 10 ++++++++-- src/hotspot/cpu/aarch64/vm_version_aarch64.cpp | 15 ++++++++++++++- 2 files changed, 22 insertions(+), 3 deletions(-) diff --git a/src/hotspot/cpu/aarch64/register_aarch64.hpp b/src/hotspot/cpu/aarch64/register_aarch64.hpp index 286dd83d687..eef4182efe9 100644 --- a/src/hotspot/cpu/aarch64/register_aarch64.hpp +++ b/src/hotspot/cpu/aarch64/register_aarch64.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2000, 2023, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2000, 2024, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2014, 2021, Red Hat Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -165,7 +165,13 @@ class FloatRegister { max_slots_per_register = 4, save_slots_per_register = 2, slots_per_neon_register = 4, - extra_save_slots_per_neon_register = slots_per_neon_register - save_slots_per_register + extra_save_slots_per_neon_register = slots_per_neon_register - save_slots_per_register, + neon_vl = 16, + // VLmax: The maximum sve vector length is determined by the hardware + // sve_vl_min <= VLmax <= sve_vl_max. + sve_vl_min = 16, + // Maximum supported vector length across all CPUs + sve_vl_max = 256 }; class FloatRegisterImpl: public AbstractRegisterImpl { diff --git a/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp b/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp index ee9fc80f0c5..bbf33fd4f0a 100644 --- a/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/vm_version_aarch64.cpp @@ -25,6 +25,7 @@ #include "precompiled.hpp" #include "pauth_aarch64.hpp" +#include "register_aarch64.hpp" #include "runtime/arguments.hpp" #include "runtime/globals_extension.hpp" #include "runtime/java.hpp" @@ -442,7 +443,19 @@ void VM_Version::initialize() { } if (UseSVE > 0) { - _initial_sve_vector_length = get_current_sve_vector_length(); + int vl = get_current_sve_vector_length(); + if (vl < 0) { + warning("Unable to get SVE vector length on this system. " + "Disabling SVE. Specify -XX:UseSVE=0 to shun this warning."); + FLAG_SET_DEFAULT(UseSVE, 0); + } else if ((vl == 0) || ((vl % FloatRegister::sve_vl_min) != 0) || !is_power_of_2(vl)) { + warning("Detected SVE vector length (%d) should be a power of two and a multiple of %d. " + "Disabling SVE. Specify -XX:UseSVE=0 to shun this warning.", + vl, FloatRegister::sve_vl_min); + FLAG_SET_DEFAULT(UseSVE, 0); + } else { + _initial_sve_vector_length = vl; + } } // This machine allows unaligned memory accesses