From 52b43e99280ea81409db3cb664f391d3163ffb8d Mon Sep 17 00:00:00 2001 From: Tobias Hartmann Date: Mon, 22 Apr 2024 08:07:29 +0000 Subject: [PATCH 1/4] 8324874: AArch64: crypto pmull based CRC32/CRC32C intrinsics clobber V8-V15 registers Backport-of: 4cd318756d4a8de64d25fb6512ecba9a008edfa1 --- .../cpu/aarch64/macroAssembler_aarch64.cpp | 173 +++++++++--------- .../intrinsics/zip/TestFpRegsABI.java | 163 +++++++++++++++++ 2 files changed, 254 insertions(+), 82 deletions(-) create mode 100644 test/hotspot/jtreg/compiler/intrinsics/zip/TestFpRegsABI.java diff --git a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp index a3c560b28d3..5ab336d7d15 100644 --- a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp +++ b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp @@ -4258,108 +4258,117 @@ void MacroAssembler::kernel_crc32_common_fold_using_crypto_pmull(Register crc, R } add(table, table, table_offset); + // Registers v0..v7 are used as data registers. + // Registers v16..v31 are used as tmp registers. sub(buf, buf, 0x10); - ldrq(v1, Address(buf, 0x10)); - ldrq(v2, Address(buf, 0x20)); - ldrq(v3, Address(buf, 0x30)); - ldrq(v4, Address(buf, 0x40)); - ldrq(v5, Address(buf, 0x50)); - ldrq(v6, Address(buf, 0x60)); - ldrq(v7, Address(buf, 0x70)); - ldrq(v8, Address(pre(buf, 0x80))); - - movi(v25, T4S, 0); - mov(v25, S, 0, crc); - eor(v1, T16B, v1, v25); - - ldrq(v0, Address(table)); + ldrq(v0, Address(buf, 0x10)); + ldrq(v1, Address(buf, 0x20)); + ldrq(v2, Address(buf, 0x30)); + ldrq(v3, Address(buf, 0x40)); + ldrq(v4, Address(buf, 0x50)); + ldrq(v5, Address(buf, 0x60)); + ldrq(v6, Address(buf, 0x70)); + ldrq(v7, Address(pre(buf, 0x80))); + + movi(v31, T4S, 0); + mov(v31, S, 0, crc); + eor(v0, T16B, v0, v31); + + // Register v16 contains constants from the crc table. + ldrq(v16, Address(table)); b(CRC_by128_loop); align(OptoLoopAlignment); BIND(CRC_by128_loop); - pmull (v9, T1Q, v1, v0, T1D); - pmull2(v10, T1Q, v1, v0, T2D); - ldrq(v1, Address(buf, 0x10)); - eor3(v1, T16B, v9, v10, v1); - - pmull (v11, T1Q, v2, v0, T1D); - pmull2(v12, T1Q, v2, v0, T2D); - ldrq(v2, Address(buf, 0x20)); - eor3(v2, T16B, v11, v12, v2); - - pmull (v13, T1Q, v3, v0, T1D); - pmull2(v14, T1Q, v3, v0, T2D); - ldrq(v3, Address(buf, 0x30)); - eor3(v3, T16B, v13, v14, v3); - - pmull (v15, T1Q, v4, v0, T1D); - pmull2(v16, T1Q, v4, v0, T2D); - ldrq(v4, Address(buf, 0x40)); - eor3(v4, T16B, v15, v16, v4); - - pmull (v17, T1Q, v5, v0, T1D); - pmull2(v18, T1Q, v5, v0, T2D); - ldrq(v5, Address(buf, 0x50)); - eor3(v5, T16B, v17, v18, v5); - - pmull (v19, T1Q, v6, v0, T1D); - pmull2(v20, T1Q, v6, v0, T2D); - ldrq(v6, Address(buf, 0x60)); - eor3(v6, T16B, v19, v20, v6); - - pmull (v21, T1Q, v7, v0, T1D); - pmull2(v22, T1Q, v7, v0, T2D); - ldrq(v7, Address(buf, 0x70)); - eor3(v7, T16B, v21, v22, v7); - - pmull (v23, T1Q, v8, v0, T1D); - pmull2(v24, T1Q, v8, v0, T2D); - ldrq(v8, Address(pre(buf, 0x80))); - eor3(v8, T16B, v23, v24, v8); + pmull (v17, T1Q, v0, v16, T1D); + pmull2(v18, T1Q, v0, v16, T2D); + ldrq(v0, Address(buf, 0x10)); + eor3(v0, T16B, v17, v18, v0); + + pmull (v19, T1Q, v1, v16, T1D); + pmull2(v20, T1Q, v1, v16, T2D); + ldrq(v1, Address(buf, 0x20)); + eor3(v1, T16B, v19, v20, v1); + + pmull (v21, T1Q, v2, v16, T1D); + pmull2(v22, T1Q, v2, v16, T2D); + ldrq(v2, Address(buf, 0x30)); + eor3(v2, T16B, v21, v22, v2); + + pmull (v23, T1Q, v3, v16, T1D); + pmull2(v24, T1Q, v3, v16, T2D); + ldrq(v3, Address(buf, 0x40)); + eor3(v3, T16B, v23, v24, v3); + + pmull (v25, T1Q, v4, v16, T1D); + pmull2(v26, T1Q, v4, v16, T2D); + ldrq(v4, Address(buf, 0x50)); + eor3(v4, T16B, v25, v26, v4); + + pmull (v27, T1Q, v5, v16, T1D); + pmull2(v28, T1Q, v5, v16, T2D); + ldrq(v5, Address(buf, 0x60)); + eor3(v5, T16B, v27, v28, v5); + + pmull (v29, T1Q, v6, v16, T1D); + pmull2(v30, T1Q, v6, v16, T2D); + ldrq(v6, Address(buf, 0x70)); + eor3(v6, T16B, v29, v30, v6); + + // Reuse registers v23, v24. + // Using them won't block the first instruction of the next iteration. + pmull (v23, T1Q, v7, v16, T1D); + pmull2(v24, T1Q, v7, v16, T2D); + ldrq(v7, Address(pre(buf, 0x80))); + eor3(v7, T16B, v23, v24, v7); subs(len, len, 0x80); br(Assembler::GE, CRC_by128_loop); // fold into 512 bits - ldrq(v0, Address(table, 0x10)); + // Use v31 for constants because v16 can be still in use. + ldrq(v31, Address(table, 0x10)); - pmull (v10, T1Q, v1, v0, T1D); - pmull2(v11, T1Q, v1, v0, T2D); - eor3(v1, T16B, v10, v11, v5); + pmull (v17, T1Q, v0, v31, T1D); + pmull2(v18, T1Q, v0, v31, T2D); + eor3(v0, T16B, v17, v18, v4); - pmull (v12, T1Q, v2, v0, T1D); - pmull2(v13, T1Q, v2, v0, T2D); - eor3(v2, T16B, v12, v13, v6); + pmull (v19, T1Q, v1, v31, T1D); + pmull2(v20, T1Q, v1, v31, T2D); + eor3(v1, T16B, v19, v20, v5); - pmull (v14, T1Q, v3, v0, T1D); - pmull2(v15, T1Q, v3, v0, T2D); - eor3(v3, T16B, v14, v15, v7); + pmull (v21, T1Q, v2, v31, T1D); + pmull2(v22, T1Q, v2, v31, T2D); + eor3(v2, T16B, v21, v22, v6); - pmull (v16, T1Q, v4, v0, T1D); - pmull2(v17, T1Q, v4, v0, T2D); - eor3(v4, T16B, v16, v17, v8); + pmull (v23, T1Q, v3, v31, T1D); + pmull2(v24, T1Q, v3, v31, T2D); + eor3(v3, T16B, v23, v24, v7); // fold into 128 bits - ldrq(v5, Address(table, 0x20)); - pmull (v10, T1Q, v1, v5, T1D); - pmull2(v11, T1Q, v1, v5, T2D); - eor3(v4, T16B, v4, v10, v11); - - ldrq(v6, Address(table, 0x30)); - pmull (v12, T1Q, v2, v6, T1D); - pmull2(v13, T1Q, v2, v6, T2D); - eor3(v4, T16B, v4, v12, v13); - - ldrq(v7, Address(table, 0x40)); - pmull (v14, T1Q, v3, v7, T1D); - pmull2(v15, T1Q, v3, v7, T2D); - eor3(v1, T16B, v4, v14, v15); + // Use v17 for constants because v31 can be still in use. + ldrq(v17, Address(table, 0x20)); + pmull (v25, T1Q, v0, v17, T1D); + pmull2(v26, T1Q, v0, v17, T2D); + eor3(v3, T16B, v3, v25, v26); + + // Use v18 for constants because v17 can be still in use. + ldrq(v18, Address(table, 0x30)); + pmull (v27, T1Q, v1, v18, T1D); + pmull2(v28, T1Q, v1, v18, T2D); + eor3(v3, T16B, v3, v27, v28); + + // Use v19 for constants because v18 can be still in use. + ldrq(v19, Address(table, 0x40)); + pmull (v29, T1Q, v2, v19, T1D); + pmull2(v30, T1Q, v2, v19, T2D); + eor3(v0, T16B, v3, v29, v30); add(len, len, 0x80); add(buf, buf, 0x10); - mov(tmp0, v1, D, 0); - mov(tmp1, v1, D, 1); + mov(tmp0, v0, D, 0); + mov(tmp1, v0, D, 1); } SkipIfEqual::SkipIfEqual( diff --git a/test/hotspot/jtreg/compiler/intrinsics/zip/TestFpRegsABI.java b/test/hotspot/jtreg/compiler/intrinsics/zip/TestFpRegsABI.java new file mode 100644 index 00000000000..46ecb64096b --- /dev/null +++ b/test/hotspot/jtreg/compiler/intrinsics/zip/TestFpRegsABI.java @@ -0,0 +1,163 @@ +/* + * Copyright Amazon.com Inc. or its affiliates. All rights reserved. + * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 only, as + * published by the Free Software Foundation. + * + * This code is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * version 2 for more details (a copy is included in the LICENSE file that + * accompanied this code). + * + * You should have received a copy of the GNU General Public License version + * 2 along with this work; if not, write to the Free Software Foundation, + * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. + * + * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA + * or visit www.oracle.com if you need additional information or have any + * questions. + */ + + +/** + * @test TestFpRegsABI + * @bug 8324874 + * @summary ABI for the Arm 64-bit Architecture requires to preserve registers v8-v15 by a callee across subroutine calls + * + * @run main/othervm -XX:-TieredCompilation -Xbatch -XX:CompileCommand=inline,*::calcValue compiler.intrinsics.zip.TestFpRegsABI + * @run main/othervm -XX:-TieredCompilation -Xbatch -XX:CompileCommand=dontinline,*::calcValue compiler.intrinsics.zip.TestFpRegsABI + * @run main/othervm -XX:+TieredCompilation -XX:TieredStopAtLevel=1 -Xbatch -XX:CompileCommand=inline,*::calcValue compiler.intrinsics.zip.TestFpRegsABI + * @run main/othervm -XX:+TieredCompilation -XX:TieredStopAtLevel=1 -Xbatch -XX:CompileCommand=dontinline,*::calcValue compiler.intrinsics.zip.TestFpRegsABI + * @run main/othervm -Xbatch -XX:CompileCommand=inline,*::calcValue compiler.intrinsics.zip.TestFpRegsABI + * @run main/othervm -Xbatch -XX:CompileCommand=dontinline,*::calcValue compiler.intrinsics.zip.TestFpRegsABI + * @run main/othervm -Xint compiler.intrinsics.zip.TestFpRegsABI + */ + +package compiler.intrinsics.zip; + +import java.util.zip.Checksum; +import java.util.zip.CRC32; +import java.util.zip.CRC32C; + +public class TestFpRegsABI { + private static byte[] buf; + + static { + buf = new byte[1024]; + for (int i = 0; i < buf.length; ++i) { + buf[i] = (byte)i; + } + } + + private static class RegressionTest { + Checksum checksum; + + RegressionTest(Checksum checksum) { + this.checksum = checksum; + } + + public void run(byte[] buf, long expectedValue) { + for (int i = 0; i < 20_000; ++i) { + runIteration(buf, expectedValue); + } + } + + // If checksum intrinsic does not save fp registers as ABI requires, + // the second call of calcValue might produce a wrong result. + private void runIteration(byte[] buf, long expectedValue) { + int v1 = calcValue(buf); + checksum.reset(); + checksum.update(buf, 0, buf.length); + long checksumValue = checksum.getValue(); + if (checksumValue != expectedValue) { + System.err.printf("ERROR: checksum = 0x%016x, expected = 0x%016x\n", + checksumValue, expectedValue); + throw new RuntimeException("Checksum Error"); + } + int v2 = calcValue(buf); + if (v1 != v2) { + throw new RuntimeException("Expect v2(" + v2 + ") to equal v1(" + v1 + ")"); + } + } + + private int calcValue(byte[] buf) { + return (int)(2.5 * buf.length); + } + } + + private static class TestIntrinsic { + Checksum checksum; + + TestIntrinsic(Checksum checksum) { + this.checksum = checksum; + } + + public void run(byte[] buf, long expectedValue) { + for (int i = 0; i < 20_000; ++i) { + runIteration(buf, expectedValue); + } + } + + // If checksum intrinsic does not save fp registers as ABI requires, + // the second call of calcValue might produce a wrong result. + private void runIteration(byte[] buf, long expectedValue) { + int v1 = calcValue(buf); + checksum.reset(); + checksum.update(buf, 0, buf.length); + long checksumValue = checksum.getValue(); + if (checksumValue != expectedValue) { + System.err.printf("ERROR: checksum = 0x%016x, expected = 0x%016x\n", + checksumValue, expectedValue); + throw new RuntimeException("Checksum Error"); + } + int v2 = calcValue(buf); + if (v1 != v2) { + throw new RuntimeException("Expect v2(" + v2 + ") to equal v1(" + v1 + ")"); + } + } + + // ABI can require some fp registers to be saved by a callee, e.g. v8-15 in ARM64 ABI. + // We create fp register pressure to get as many fp registers used as possible. + private int calcValue(byte[] buf) { + double v = 0.0; + for (int i = 24; i <= buf.length; i += 24) { + v += buf[i - 1] * ((double)i - 1.0) + (double)i - 1.0; + v += buf[i - 2] * ((double)i - 2.0) + (double)i - 2.0; + v += buf[i - 3] * ((double)i - 3.0) + (double)i - 3.0; + v += buf[i - 4] * ((double)i - 4.0) + (double)i - 4.0; + v += buf[i - 5] * ((double)i - 5.0) + (double)i - 5.0; + v += buf[i - 6] * ((double)i - 6.0) + (double)i - 6.0; + v += buf[i - 7] * ((double)i - 7.0) + (double)i - 7.0; + v += buf[i - 8] * ((double)i - 8.0) + (double)i - 8.0; + v += buf[i - 9] * ((double)i - 9.0) + (double)i - 9.0; + v += buf[i - 10] * ((double)i - 10.0) + (double)i - 10.0; + v += buf[i - 11] * ((double)i - 11.0) + (double)i - 11.0; + v += buf[i - 12] * ((double)i - 12.0) + (double)i - 12.0; + v += buf[i - 13] * ((double)i - 13.0) + (double)i - 13.0; + v += buf[i - 14] * ((double)i - 14.0) + (double)i - 14.0; + v += buf[i - 15] * ((double)i - 15.0) + (double)i - 15.0; + v += buf[i - 16] * ((double)i - 16.0) + (double)i - 16.0; + v += buf[i - 17] * ((double)i - 17.0) + (double)i - 17.0; + v += buf[i - 18] * ((double)i - 18.0) + (double)i - 18.0; + v += buf[i - 19] * ((double)i - 19.0) + (double)i - 19.0; + v += buf[i - 20] * ((double)i - 20.0) + (double)i - 20.0; + v += buf[i - 21] * ((double)i - 21.0) + (double)i - 21.0; + v += buf[i - 22] * ((double)i - 22.0) + (double)i - 22.0; + v += buf[i - 23] * ((double)i - 23.0) + (double)i - 23.0; + v += buf[i - 24] * ((double)i - 24.0) + (double)i - 24.0; + } + return (int)v; + } + } + + public static void main(final String[] argv) { + new TestIntrinsic(new CRC32()).run(buf, 0x00000000b70b4c26L); + new TestIntrinsic(new CRC32C()).run(buf, 0x000000002cdf6e8fL); + new RegressionTest(new CRC32()).run(buf, 0x00000000b70b4c26L); + new RegressionTest(new CRC32C()).run(buf, 0x000000002cdf6e8fL); + } +} + From bde0fad12534e7e91f67878b3ce0d6b4f4e634be Mon Sep 17 00:00:00 2001 From: Amit Kumar Date: Mon, 22 Apr 2024 13:49:48 +0000 Subject: [PATCH 2/4] 8330011: [s390x] update block-comments to make code consistent Backport-of: 01bda278d6a498ca89c0bc5218680cd51a04e9d3 --- src/hotspot/cpu/s390/downcallLinker_s390.cpp | 32 +++++++++++--------- src/hotspot/cpu/s390/upcallLinker_s390.cpp | 20 ++++++------ 2 files changed, 27 insertions(+), 25 deletions(-) diff --git a/src/hotspot/cpu/s390/downcallLinker_s390.cpp b/src/hotspot/cpu/s390/downcallLinker_s390.cpp index 22bd644e2b8..383a3244874 100644 --- a/src/hotspot/cpu/s390/downcallLinker_s390.cpp +++ b/src/hotspot/cpu/s390/downcallLinker_s390.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, 2023, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2022, 2024, Oracle and/or its affiliates. All rights reserved. * Copyright (c) 2020, Red Hat, Inc. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * @@ -138,10 +138,10 @@ void DowncallLinker::StubGenerator::generate() { locs.set(StubLocations::TARGET_ADDRESS, _abi._scratch2); if (_captured_state_mask != 0) { - __ block_comment("{ _captured_state_mask is set"); + __ block_comment("_captured_state_mask_is_set {"); locs.set_frame_data(StubLocations::CAPTURED_STATE_BUFFER, allocated_frame_size); allocated_frame_size += BytesPerWord; - __ block_comment("} _captured_state_mask is set"); + __ block_comment("} _captured_state_mask_is_set"); } VMStorage shuffle_reg = _abi._scratch1; @@ -176,7 +176,7 @@ void DowncallLinker::StubGenerator::generate() { _frame_complete = __ pc() - start; // frame build complete. if (_needs_transition) { - __ block_comment("{ thread java2native"); + __ block_comment("thread_java2native {"); __ get_PC(Z_R1_scratch); address the_pc = __ pc(); __ set_last_Java_frame(Z_SP, Z_R1_scratch); @@ -186,21 +186,21 @@ void DowncallLinker::StubGenerator::generate() { // State transition __ set_thread_state(_thread_in_native); - __ block_comment("} thread java2native"); + __ block_comment("} thread_java2native"); } if (has_objects) { add_offsets_to_oops(java_regs, _abi._scratch1, _abi._scratch2); } - __ block_comment("{ argument shuffle"); + __ block_comment("argument shuffle {"); arg_shuffle.generate(_masm, shuffle_reg, frame::z_jit_out_preserve_size, _abi._shadow_space_bytes); - __ block_comment("} argument shuffle"); + __ block_comment("} argument_shuffle"); __ call(as_Register(locs.get(StubLocations::TARGET_ADDRESS))); ////////////////////////////////////////////////////////////////////////////// if (_captured_state_mask != 0) { - __ block_comment("{ save thread local"); + __ block_comment("save_thread_local {"); out_reg_spiller.generate_spill(_masm, spill_offset); @@ -211,7 +211,7 @@ void DowncallLinker::StubGenerator::generate() { out_reg_spiller.generate_fill(_masm, spill_offset); - __ block_comment("} save thread local"); + __ block_comment("} save_thread_local"); } ////////////////////////////////////////////////////////////////////////////// @@ -222,7 +222,7 @@ void DowncallLinker::StubGenerator::generate() { Label L_after_reguard; if (_needs_transition) { - __ block_comment("{ thread native2java"); + __ block_comment("thread_native2java {"); __ set_thread_state(_thread_in_native_trans); if (!UseSystemMemoryBarrier) { @@ -239,10 +239,12 @@ void DowncallLinker::StubGenerator::generate() { // change thread state __ set_thread_state(_thread_in_Java); - __ block_comment("reguard stack check"); - __ z_cli(Address(Z_thread, JavaThread::stack_guard_state_offset() + in_ByteSize(sizeof(StackOverflow::StackGuardState) - 1)), - StackOverflow::stack_guard_yellow_reserved_disabled); + __ block_comment("reguard_stack_check {"); + __ z_cli(Address(Z_thread, + JavaThread::stack_guard_state_offset() + in_ByteSize(sizeof(StackOverflow::StackGuardState) - 1)), + StackOverflow::stack_guard_yellow_reserved_disabled); __ z_bre(L_reguard); + __ block_comment("} reguard_stack_check"); __ bind(L_after_reguard); __ reset_last_Java_frame(); @@ -256,7 +258,7 @@ void DowncallLinker::StubGenerator::generate() { ////////////////////////////////////////////////////////////////////////////// if (_needs_transition) { - __ block_comment("{ L_safepoint_poll_slow_path"); + __ block_comment("L_safepoint_poll_slow_path {"); __ bind(L_safepoint_poll_slow_path); // Need to save the native result registers around any runtime calls. @@ -272,7 +274,7 @@ void DowncallLinker::StubGenerator::generate() { __ block_comment("} L_safepoint_poll_slow_path"); ////////////////////////////////////////////////////////////////////////////// - __ block_comment("{ L_reguard"); + __ block_comment("L_reguard {"); __ bind(L_reguard); // Need to save the native result registers around any runtime calls. diff --git a/src/hotspot/cpu/s390/upcallLinker_s390.cpp b/src/hotspot/cpu/s390/upcallLinker_s390.cpp index 20c9b35db62..734b4e89c7c 100644 --- a/src/hotspot/cpu/s390/upcallLinker_s390.cpp +++ b/src/hotspot/cpu/s390/upcallLinker_s390.cpp @@ -63,7 +63,7 @@ static void preserve_callee_saved_registers(MacroAssembler* _masm, const ABIDesc int offset = reg_save_area_offset; - __ block_comment("{ preserve_callee_saved_regs "); + __ block_comment("preserve_callee_saved_regs {"); for (int i = 0; i < Register::number_of_registers; i++) { Register reg = as_Register(i); // Z_SP saved/restored by prologue/epilogue @@ -82,7 +82,7 @@ static void preserve_callee_saved_registers(MacroAssembler* _masm, const ABIDesc } } - __ block_comment("} preserve_callee_saved_regs "); + __ block_comment("} preserve_callee_saved_regs"); } static void restore_callee_saved_registers(MacroAssembler* _masm, const ABIDescriptor& abi, int reg_save_area_offset) { @@ -92,7 +92,7 @@ static void restore_callee_saved_registers(MacroAssembler* _masm, const ABIDescr int offset = reg_save_area_offset; - __ block_comment("{ restore_callee_saved_regs "); + __ block_comment("restore_callee_saved_regs {"); for (int i = 0; i < Register::number_of_registers; i++) { Register reg = as_Register(i); // Z_SP saved/restored by prologue/epilogue @@ -111,7 +111,7 @@ static void restore_callee_saved_registers(MacroAssembler* _masm, const ABIDescr } } - __ block_comment("} restore_callee_saved_regs "); + __ block_comment("} restore_callee_saved_regs"); } static const int upcall_stub_code_base_size = 1024; @@ -203,7 +203,7 @@ address UpcallLinker::make_upcall_stub(jobject receiver, Method* entry, // Java methods won't preserve them, so save them here: preserve_callee_saved_registers(_masm, abi, reg_save_area_offset); - __ block_comment("{ on_entry"); + __ block_comment("on_entry {"); __ load_const_optimized(call_target_address, CAST_FROM_FN_PTR(uint64_t, UpcallLinker::on_entry)); __ z_aghik(Z_ARG1, Z_SP, frame_data_offset); __ load_const_optimized(Z_ARG2, (intptr_t)receiver); @@ -212,13 +212,13 @@ address UpcallLinker::make_upcall_stub(jobject receiver, Method* entry, __ block_comment("} on_entry"); arg_spiller.generate_fill(_masm, arg_save_area_offset); - __ block_comment("{ argument shuffle"); + __ block_comment("argument_shuffle {"); arg_shuffle.generate(_masm, shuffle_reg, abi._shadow_space_bytes, frame::z_jit_out_preserve_size); - __ block_comment("} argument shuffle"); + __ block_comment("} argument_shuffle"); - __ block_comment("{ receiver "); + __ block_comment("receiver {"); __ get_vm_result(Z_ARG1); - __ block_comment("} receiver "); + __ block_comment("} receiver"); __ load_const_optimized(Z_method, (intptr_t)entry); __ z_stg(Z_method, Address(Z_thread, in_bytes(JavaThread::callee_target_offset()))); @@ -254,7 +254,7 @@ address UpcallLinker::make_upcall_stub(jobject receiver, Method* entry, result_spiller.generate_spill(_masm, res_save_area_offset); - __ block_comment("{ on_exit"); + __ block_comment("on_exit {"); __ load_const_optimized(call_target_address, CAST_FROM_FN_PTR(uint64_t, UpcallLinker::on_exit)); __ z_aghik(Z_ARG1, Z_SP, frame_data_offset); __ call(call_target_address); From bf8146eac24ba8e00d1794ef7134ecf2476cf897 Mon Sep 17 00:00:00 2001 From: Zhengyu Gu Date: Mon, 22 Apr 2024 15:48:03 +0000 Subject: [PATCH 3/4] 8328744: Parallel: Parallel GC throws OOM before heap is fully expanded Backport-of: 142c311e3b9bd3f00edaa6ba7bcbc9fc285ee9b9 --- src/hotspot/share/gc/parallel/psScavenge.cpp | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/hotspot/share/gc/parallel/psScavenge.cpp b/src/hotspot/share/gc/parallel/psScavenge.cpp index a783dfe7155..2ada2c8fa9f 100644 --- a/src/hotspot/share/gc/parallel/psScavenge.cpp +++ b/src/hotspot/share/gc/parallel/psScavenge.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002, 2023, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2002, 2024, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -704,12 +704,14 @@ bool PSScavenge::should_attempt_scavenge() { size_t avg_promoted = (size_t) policy->padded_average_promoted_in_bytes(); size_t promotion_estimate = MIN2(avg_promoted, young_gen->used_in_bytes()); - bool result = promotion_estimate < old_gen->free_in_bytes(); + // Total free size after possible old gen expansion + size_t free_in_old_gen = old_gen->max_gen_size() - old_gen->used_in_bytes(); + bool result = promotion_estimate < free_in_old_gen; log_trace(ergo)("%s scavenge: average_promoted " SIZE_FORMAT " padded_average_promoted " SIZE_FORMAT " free in old gen " SIZE_FORMAT, result ? "Do" : "Skip", (size_t) policy->average_promoted_in_bytes(), (size_t) policy->padded_average_promoted_in_bytes(), - old_gen->free_in_bytes()); + free_in_old_gen); if (young_gen->used_in_bytes() < (size_t) policy->padded_average_promoted_in_bytes()) { log_trace(ergo)(" padded_promoted_average is greater than maximum promotion = " SIZE_FORMAT, young_gen->used_in_bytes()); } From a93848c1438fd96ac79d62b2e8bb4f495e65bc42 Mon Sep 17 00:00:00 2001 From: Alexey Semenyuk Date: Tue, 23 Apr 2024 06:55:56 +0000 Subject: [PATCH 4/4] 8295111: dpkg appears to have problems resolving symbolically linked native libraries Backport-of: 32946e1882e9b22c983cbba3c6bda3cc7295946a --- .../jpackage/internal/LinuxDebBundler.java | 66 ++++++++++++------- 1 file changed, 41 insertions(+), 25 deletions(-) diff --git a/src/jdk.jpackage/linux/classes/jdk/jpackage/internal/LinuxDebBundler.java b/src/jdk.jpackage/linux/classes/jdk/jpackage/internal/LinuxDebBundler.java index e97cfc90a80..478ec078797 100644 --- a/src/jdk.jpackage/linux/classes/jdk/jpackage/internal/LinuxDebBundler.java +++ b/src/jdk.jpackage/linux/classes/jdk/jpackage/internal/LinuxDebBundler.java @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012, 2023, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2012, 2024, Oracle and/or its affiliates. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -201,6 +201,24 @@ protected void initLibProvidersLookup( Map params, LibProvidersLookup libProvidersLookup) { + libProvidersLookup.setPackageLookup(file -> { + Path realPath = file.toRealPath(); + + try { + // Try the real path first as it works better on newer Ubuntu versions + return findProvidingPackages(realPath); + } catch (IOException ex) { + // Try the default path if differ + if (!realPath.toString().equals(file.toString())) { + return findProvidingPackages(file); + } else { + throw ex; + } + } + }); + } + + private static Stream findProvidingPackages(Path file) throws IOException { // // `dpkg -S` command does glob pattern lookup. If not the absolute path // to the file is specified it might return mltiple package names. @@ -243,32 +261,30 @@ protected void initLibProvidersLookup( // 4. Arch suffix should be stripped from accepted package names. // - libProvidersLookup.setPackageLookup(file -> { - Set archPackages = new HashSet<>(); - Set otherPackages = new HashSet<>(); - - Executor.of(TOOL_DPKG, "-S", file.toString()) - .saveOutput(true).executeExpectSuccess() - .getOutput().forEach(line -> { - Matcher matcher = PACKAGE_NAME_REGEX.matcher(line); - if (matcher.find()) { - String name = matcher.group(1); - if (name.endsWith(":" + DEB_ARCH)) { - // Strip arch suffix - name = name.substring(0, - name.length() - (DEB_ARCH.length() + 1)); - archPackages.add(name); - } else { - otherPackages.add(name); - } + Set archPackages = new HashSet<>(); + Set otherPackages = new HashSet<>(); + + Executor.of(TOOL_DPKG, "-S", file.toString()) + .saveOutput(true).executeExpectSuccess() + .getOutput().forEach(line -> { + Matcher matcher = PACKAGE_NAME_REGEX.matcher(line); + if (matcher.find()) { + String name = matcher.group(1); + if (name.endsWith(":" + DEB_ARCH)) { + // Strip arch suffix + name = name.substring(0, + name.length() - (DEB_ARCH.length() + 1)); + archPackages.add(name); + } else { + otherPackages.add(name); } - }); + } + }); - if (!archPackages.isEmpty()) { - return archPackages.stream(); - } - return otherPackages.stream(); - }); + if (!archPackages.isEmpty()) { + return archPackages.stream(); + } + return otherPackages.stream(); } @Override