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Review #13

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48 of 64 tasks
thomasnonis opened this issue Dec 15, 2023 · 0 comments
Open
48 of 64 tasks

Review #13

thomasnonis opened this issue Dec 15, 2023 · 0 comments

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@thomasnonis
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thomasnonis commented Dec 15, 2023

Schematic

General

  • Use the standard part fields as in the template and fill them
  • All datasheets must be local and with the core information highlighted
  • Molex connectors are usually numbered Top-Bottom (check). Use correct symbols.
  • 00_proj-lib is not included in the path
  • Some important errors still appear in the DRC
    image

Root

Power in

  • Eagle_Connectors:17762791 is not on the team library
  • The Zener on the reverse polarity mosfet probably has too low of a voltage. It will not be able to carry 10A
    image
  • Reverse polarity protection mosfet footprint is wrong. Probably must be GDS or SDG
  • Simply renaming a power port after placement will not change its net name. Need to create new port to actually have net renamed
    image
  • Do not change reference designators just on one side. These are not linked anymore
    image

Additional fan

  • Sure that 1N4148W is SOD323?

Shutdown + Discharge

Shutdown

  • Here 1N4148W is SOD123, in root was SOD323
  • Relay, not Rele
  • PMOS series resistor probably not needed. Does not hurt
  • PON pull-down 0805?

Discharge

  • Diode footprint is not really correct. Will probably work anyway

RS232 + Feedback

RS232

  • Do not use pre-bridged solder jumpers. They are a pain in the ass to open
  • Why dual RS232 transceiver if only one line used?
  • Pull-up of unused TX line not necessary. If used to reduce useless power draw, should also add it to unused RX line
  • Sure that GND pin is not 5?

5A Output

  • Why are there resistors in series with the load?
  • Is mosfet thermally ok with required load?
  • Ports on root hierarchical sheet connected to nothing

Feedback ADC

  • Use >=0805 for >=1uF
  • Why RC at REF+?
  • Consider 0805 package on REF+ capacitor to increase to 1uF or 10uF
  • Why is OVDD let floating? Datasheet says to "bypass to GND with a 10µF in
    parallel with a 0.1µF capacitors". Must very likely be connected to supply voltage
  • AOP, AON, AIP, AON are not connected. It will never work like this
  • Connect unused spare connector pins to GND
  • Use 0603 resistors on NC_ADC_xx filters. 0805 capacitors are ok
  • Always design from left to right
    image

Raspberry

Raspberry

  • Use 0603 for caps <1uF unless else is required
  • Connect unused spare pin to GND or use 01x03 connector

LEDs driver

  • Use 0603 for caps <1uF unless else is required
  • Driver PN not visible
  • Is capacitor on addresses really needed?
  • Separating the driver from the driven LEDs is not good for readability. Could instead create a dedicated sheet called "Indicators" for example and keep everything tidy, or put the driver together with the LEDs

Raspi fan

  • Could avoid all MOSFET resistors (maybe except series) if totem-pole (push-pull) is used in driver (yes, there is enough space)
  • 1N4148W here is SOD323

Buzzer

  • Could avoid all MOSFET resistors (maybe except series) if totem-pole (push-pull) is used in driver (yes, there is enough space)
  • 1N4148W here is SOD323

CAN interface

  • Use 0603 for caps <1uF unless else is required
  • Why such a large oscillator?
  • Add OSC2 series resistor

Output

  • Could avoid all MOSFET resistors (maybe except series) if totem-pole (push-pull) is used in driver (yes, there is enough space)

LEDs

  • A short to GND of the cathode of the LED will turn it on. Is this ok? Probably overkill to think about this
  • 0603 resistors are usually rated for 0.1W

TSAL

  • Why resistor on drain? TSAL accepts normal signals or current sink (check)

RGB control?

  • Why resistor on drain? Aren't typical LED strips going to draw too much current?

Layout

  • Use filled zone instead of traces. Better for thermal reliefs
    image
  • This artifact brings no advantages. Decrease the zone's clearances or minimum widths to add more thermal relief. If this size is needed, might as well use fully filled zone (bad for soldering though)
    image
  • Is one VIA enough? Verify
    image
  • In general, routing traces as close as possible to each other is not good practice. If there is space, leave ample clearance
  • Trace width is smaller at source and larger at load. Should be equal or the opposite
    image
  • If traces have to be able to carry the same current (bypass), they should be the same size.
    image
  • Could place it here on back layer
    image
  • Are 1.2mm needed for SDC? No need to reduce size, but probably oversized
  • Add silkscreen description of every connector. If possible, also describe every single pin
  • Use YYYY-MM-DD format
  • It will be impossible/very hard to remove the fuses with all of that stuff around (the 3D model of the DCDC is wrong, it will be taller)
  • No need to create a table if there is space beside the component to place the refdes
    image
  • weird pad under GND pad (changed size only on top). Either remove or make same size on bottom
  • Use all the empty space to add as much descriptive information as possible. Make "Handcart" smaller and use that space (pinouts of connectors are always nice to have where possible)
  • Love the design of these 😍
    image
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