diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index 772e6c5b..227c056c 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -46,7 +46,7 @@ jobs:
   builds:
     strategy:
       matrix:
-        chip: ["esp32", "esp32s2", "esp32s3", "esp32c2", "esp32c3", "esp32c6"]
+        chip: ["esp32", "esp32s2", "esp32s3", "esp32c2", "esp32c3", "esp32c6", "esp32h2"]
 
     runs-on: ubuntu-latest
     steps:
@@ -58,50 +58,66 @@ jobs:
       - uses: Swatinem/rust-cache@v2
 
       - name: build
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }}
       - name: build (common features)
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --features=async,wifi,esp-now,embassy-net,log,${{ matrix.chip }}-hal/embassy-time-timg0
       - name: build (common features + defmt)
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --no-default-features --features=async,wifi,esp-now,embassy-net,defmt,${{ matrix.chip }}-hal/embassy-time-timg0
       - name: build (all possible network options)
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && for combo in {ipv4,},{ipv6,},{tcp,},{udp,},{igmp,},{dhcpv4,} ; do cargo b${{ matrix.chip }} --release --no-default-features --features=wifi,wifi-logs,$combo ; done
       - name: build (access_point)
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=access_point --features=wifi
       - name: build (access_point_with_sta)
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=access_point_with_sta --features=wifi
       - name: build (dhcp)
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=dhcp --features=wifi
       - name: build (bench)
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=bench --features=wifi
       - name: build (static_ip)
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=static_ip --features=wifi
       - name: build (esp_now)
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=esp_now --features=esp-now
       - name: build (embassy_esp_now)
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=embassy_esp_now --features=async,esp-now,${{ matrix.chip }}-hal/embassy-time-timg0
       - name: build (embassy_esp_now_duplex)
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=embassy_esp_now_duplex --features=async,esp-now,${{ matrix.chip }}-hal/embassy-time-timg0
       - name: build (embassy_dhcp)
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=embassy_dhcp --features=async,wifi,embassy-net,${{ matrix.chip }}-hal/embassy-time-timg0
       - name: build (embassy_bench)
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=embassy_bench --features=async,wifi,embassy-net,${{ matrix.chip }}-hal/embassy-time-timg0
       - name: build (embassy_access_point)
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=embassy_access_point --features=async,wifi,embassy-net,${{ matrix.chip }}-hal/embassy-time-timg0
       - name: build (embassy_access_point_with_sta)
+        if: ${{ matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=embassy_access_point_with_sta --features=async,wifi,embassy-net,${{ matrix.chip }}-hal/embassy-time-timg0
 
       - name: build (common features + ble)
-        if: ${{ matrix.chip != 'esp32s2' }}
+        if: ${{ matrix.chip != 'esp32s2' && matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --features=async,wifi,ble,esp-now,embassy-net,log,${{ matrix.chip }}-hal/embassy-time-timg0
       - name: build (common features + ble + defmt)
-        if: ${{ matrix.chip != 'esp32s2' }}
+        if: ${{ matrix.chip != 'esp32s2' && matrix.chip != 'esp32h2' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --no-default-features --features=async,wifi,ble,esp-now,embassy-net,defmt,${{ matrix.chip }}-hal/embassy-time-timg0
       - name: build (ble)
         if: ${{ matrix.chip != 'esp32s2' }}
-        run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=ble --features=ble
+        run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=ble --no-default-features --features=ble
       - name: build (embassy_ble)
         if: ${{ matrix.chip != 'esp32s2' }}
-        run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=embassy_ble --features=async,ble,${{ matrix.chip }}-hal/embassy-time-timg0
+        run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=embassy_ble --no-default-features --features=async,ble,${{ matrix.chip }}-hal/embassy-time-timg0
       - name: build (coex)
         if: ${{ matrix.chip == 'esp32' || matrix.chip == 'esp32s3' || matrix.chip == 'esp32c3' }}
         run: cd esp-wifi && cargo b${{ matrix.chip }} --release --example=coex --features=wifi,ble,coex
diff --git a/Cargo.toml b/Cargo.toml
index b29963e9..5d020058 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -19,6 +19,7 @@ defmt = "=0.3.5"
 esp32c3-hal = { version = "0.13.0", default-features = false }
 esp32c2-hal = { version = "0.11.0", default-features = false }
 esp32c6-hal = { version = "0.6.0",  default-features = false }
+esp32h2-hal = { version = "0.4.0", default-features = false }
 esp32-hal   = { version = "0.16.0", default-features = false }
 esp32s3-hal = { version = "0.13.0", default-features = false }
 esp32s2-hal = { version = "0.13.0", default-features = false }
@@ -61,6 +62,7 @@ esp32-hal = { git = "https://github.com/esp-rs/esp-hal.git", rev = "22f14fd" }
 esp32c2-hal = { git = "https://github.com/esp-rs/esp-hal.git", rev = "22f14fd" }
 esp32c3-hal = { git = "https://github.com/esp-rs/esp-hal.git", rev = "22f14fd" }
 esp32c6-hal = { git = "https://github.com/esp-rs/esp-hal.git", rev = "22f14fd" }
+esp32h2-hal = { git = "https://github.com/esp-rs/esp-hal.git", rev = "22f14fd" }
 esp32s2-hal = { git = "https://github.com/esp-rs/esp-hal.git", rev = "22f14fd" }
 esp32s3-hal = { git = "https://github.com/esp-rs/esp-hal.git", rev = "22f14fd" }
 esp-hal-common = { git = "https://github.com/esp-rs/esp-hal.git", rev = "22f14fd" }
diff --git a/esp-wifi-sys/Cargo.toml b/esp-wifi-sys/Cargo.toml
index bf644463..4c870d8e 100644
--- a/esp-wifi-sys/Cargo.toml
+++ b/esp-wifi-sys/Cargo.toml
@@ -34,6 +34,7 @@ esp32   = []
 esp32c2 = []
 esp32c3 = []
 esp32c6 = []
+esp32h2 = []
 esp32s2 = []
 esp32s3 = []
 
diff --git a/esp-wifi-sys/build.rs b/esp-wifi-sys/build.rs
index 5ba99502..a192c890 100644
--- a/esp-wifi-sys/build.rs
+++ b/esp-wifi-sys/build.rs
@@ -31,6 +31,11 @@ fn main() -> Result<()> {
         configure_linker_for_chip(&out, "esp32c6")?;
         copy_libraries(&out)?;
     }
+    #[cfg(feature = "esp32h2")]
+    {
+        configure_linker_for_chip(&out, "esp32h2")?;
+        copy_libraries(&out)?;
+    }
     #[cfg(feature = "esp32s2")]
     {
         configure_linker_for_chip(&out, "esp32s2")?;
@@ -197,6 +202,26 @@ fn copy_libraries(out: &PathBuf) -> Result<()> {
     Ok(())
 }
 
+#[cfg(feature = "esp32h2")]
+fn copy_libraries(out: &PathBuf) -> Result<()> {
+    copy_file(out, "libs/esp32h2/libble_app.a", "libble_app.a")?;
+    copy_file(out, "libs/esp32h2/libbtbb.a", "libbtbb.a")?;
+    copy_file(out, "libs/esp32h2/libcoexist.a", "libcoexist.a")?;
+    copy_file(out, "libs/esp32h2/libphy.a", "libphy.a")?;
+    copy_file(
+        out,
+        "libs/esp32h2/libwpa_supplicant.a",
+        "libwpa_supplicant.a",
+    )?;
+
+    println!("cargo:rustc-link-lib={}", "ble_app");
+    println!("cargo:rustc-link-lib={}", "btbb");
+    println!("cargo:rustc-link-lib={}", "phy");
+    println!("cargo:rustc-link-lib={}", "wpa_supplicant");
+
+    Ok(())
+}
+
 #[cfg(feature = "esp32s2")]
 fn copy_libraries(out: &PathBuf) -> Result<()> {
     copy_file(out, "ld/esp32s2/rom_functions.x", "esp32s2_rom_functions.x")?;
diff --git a/esp-wifi-sys/ld/esp32h2/rom_functions.x b/esp-wifi-sys/ld/esp32h2/rom_functions.x
new file mode 100644
index 00000000..b2e30c10
--- /dev/null
+++ b/esp-wifi-sys/ld/esp32h2/rom_functions.x
@@ -0,0 +1,646 @@
+/*
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32h2.rom.ld for esp32h2
+ *
+ *
+ * Generated from ./target/esp32h2/interface-esp32h2.yml md5sum c0ad4e113e5b29bb9d799f10f03edbc1
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group common
+ ***************************************/
+
+/* Functions */
+rtc_get_reset_reason = 0x40000018;
+analog_super_wdt_reset_happened = 0x4000001c;
+rtc_get_wakeup_cause = 0x40000020;
+rtc_unhold_all_pads = 0x40000024;
+ets_printf = 0x40000028;
+ets_install_putc1 = 0x4000002c;
+ets_install_putc2 = 0x40000030;
+ets_install_uart_printf = 0x40000034;
+ets_install_usb_printf = 0x40000038;
+ets_get_printf_channel = 0x4000003c;
+ets_delay_us = 0x40000040;
+ets_get_cpu_frequency = 0x40000044;
+ets_update_cpu_frequency = 0x40000048;
+ets_install_lock = 0x4000004c;
+UartRxString = 0x40000050;
+UartGetCmdLn = 0x40000054;
+uart_tx_one_char = 0x40000058;
+uart_tx_one_char2 = 0x4000005c;
+uart_rx_one_char = 0x40000060;
+uart_rx_one_char_block = 0x40000064;
+uart_rx_intr_handler = 0x40000068;
+uart_rx_readbuff = 0x4000006c;
+uartAttach = 0x40000070;
+uart_tx_flush = 0x40000074;
+uart_tx_wait_idle = 0x40000078;
+uart_div_modify = 0x4000007c;
+ets_write_char_uart = 0x40000080;
+uart_tx_switch = 0x40000084;
+roundup2 = 0x40000088;
+multofup = 0x4000008c;
+software_reset = 0x40000090;
+software_reset_cpu = 0x40000094;
+ets_clk_assist_debug_clock_enable = 0x40000098;
+clear_super_wdt_reset_flag = 0x4000009c;
+disable_default_watchdog = 0x400000a0;
+esp_rom_set_rtc_wake_addr = 0x400000a4;
+esp_rom_get_rtc_wake_addr = 0x400000a8;
+send_packet = 0x400000ac;
+recv_packet = 0x400000b0;
+GetUartDevice = 0x400000b4;
+UartDwnLdProc = 0x400000b8;
+GetSecurityInfoProc = 0x400000bc;
+Uart_Init = 0x400000c0;
+ets_set_user_start = 0x400000c4;
+/* Data (.data, .bss, .rodata) */
+ets_rom_layout_p = 0x4001fffc;
+ets_ops_table_ptr = 0x4084fff8;
+g_saved_pc = 0x4084fffc;
+
+
+/***************************************
+ Group miniz
+ ***************************************/
+
+/* Functions */
+mz_adler32 = 0x400000c8;
+mz_free = 0x400000cc;
+tdefl_compress = 0x400000d0;
+tdefl_compress_buffer = 0x400000d4;
+tdefl_compress_mem_to_heap = 0x400000d8;
+tdefl_compress_mem_to_mem = 0x400000dc;
+tdefl_compress_mem_to_output = 0x400000e0;
+tdefl_get_adler32 = 0x400000e4;
+tdefl_get_prev_return_status = 0x400000e8;
+tdefl_init = 0x400000ec;
+tdefl_write_image_to_png_file_in_memory = 0x400000f0;
+tdefl_write_image_to_png_file_in_memory_ex = 0x400000f4;
+tinfl_decompress = 0x400000f8;
+tinfl_decompress_mem_to_callback = 0x400000fc;
+tinfl_decompress_mem_to_heap = 0x40000100;
+tinfl_decompress_mem_to_mem = 0x40000104;
+
+
+/***************************************
+ Group spiflash_legacy
+ ***************************************/
+
+/* Functions */
+esp_rom_spiflash_wait_idle = 0x40000108;
+esp_rom_spiflash_write_encrypted = 0x4000010c;
+esp_rom_spiflash_write_encrypted_dest = 0x40000110;
+esp_rom_spiflash_write_encrypted_enable = 0x40000114;
+esp_rom_spiflash_write_encrypted_disable = 0x40000118;
+esp_rom_spiflash_erase_chip = 0x4000011c;
+_esp_rom_spiflash_erase_sector = 0x40000120;
+_esp_rom_spiflash_erase_block = 0x40000124;
+_esp_rom_spiflash_write = 0x40000128;
+_esp_rom_spiflash_read = 0x4000012c;
+_esp_rom_spiflash_unlock = 0x40000130;
+_SPIEraseArea = 0x40000134;
+_SPI_write_enable = 0x40000138;
+esp_rom_spiflash_erase_sector = 0x4000013c;
+esp_rom_spiflash_erase_block = 0x40000140;
+esp_rom_spiflash_write = 0x40000144;
+esp_rom_spiflash_read = 0x40000148;
+esp_rom_spiflash_unlock = 0x4000014c;
+SPIEraseArea = 0x40000150;
+SPI_write_enable = 0x40000154;
+esp_rom_spiflash_config_param = 0x40000158;
+esp_rom_spiflash_read_user_cmd = 0x4000015c;
+esp_rom_spiflash_select_qio_pins = 0x40000160;
+esp_rom_spi_flash_auto_sus_res = 0x40000164;
+esp_rom_spi_flash_send_resume = 0x40000168;
+esp_rom_spi_flash_update_id = 0x4000016c;
+esp_rom_spiflash_config_clk = 0x40000170;
+esp_rom_spiflash_config_readmode = 0x40000174;
+esp_rom_spiflash_read_status = 0x40000178;
+esp_rom_spiflash_read_statushigh = 0x4000017c;
+esp_rom_spiflash_write_status = 0x40000180;
+spi_cache_mode_switch = 0x40000184;
+spi_common_set_dummy_output = 0x40000188;
+spi_common_set_flash_cs_timing = 0x4000018c;
+esp_rom_spi_set_address_bit_len = 0x40000190;
+SPILock = 0x40000194;
+SPIMasterReadModeCnfig = 0x40000198;
+SPI_Common_Command = 0x4000019c;
+SPI_WakeUp = 0x400001a0;
+SPI_block_erase = 0x400001a4;
+SPI_chip_erase = 0x400001a8;
+SPI_init = 0x400001ac;
+SPI_page_program = 0x400001b0;
+SPI_read_data = 0x400001b4;
+SPI_sector_erase = 0x400001b8;
+SelectSpiFunction = 0x400001bc;
+SetSpiDrvs = 0x400001c0;
+Wait_SPI_Idle = 0x400001c4;
+spi_dummy_len_fix = 0x400001c8;
+Disable_QMode = 0x400001cc;
+Enable_QMode = 0x400001d0;
+spi_flash_attach = 0x400001d4;
+spi_flash_get_chip_size = 0x400001d8;
+spi_flash_guard_set = 0x400001dc;
+spi_flash_guard_get = 0x400001e0;
+spi_flash_read_encrypted = 0x400001e4;
+/* Data (.data, .bss, .rodata) */
+rom_spiflash_legacy_funcs = 0x4084fff0;
+rom_spiflash_legacy_data = 0x4084ffec;
+g_flash_guard_ops = 0x4084fff4;
+
+/*
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/***************************************
+ Group hal_wdt
+ ***************************************/
+
+/* Functions */
+
+/* Patch init function to set clock source
+wdt_hal_init = 0x4000038c;
+wdt_hal_deinit = 0x40000390;
+*/
+
+/* Functions */
+wdt_hal_config_stage = 0x40000394;
+wdt_hal_write_protect_disable = 0x40000398;
+wdt_hal_write_protect_enable = 0x4000039c;
+wdt_hal_enable = 0x400003a0;
+wdt_hal_disable = 0x400003a4;
+wdt_hal_handle_intr = 0x400003a8;
+wdt_hal_feed = 0x400003ac;
+wdt_hal_set_flashboot_en = 0x400003b0;
+wdt_hal_is_enabled = 0x400003b4;
+
+/* Note: esp_rom_spiflash_write_disable was moved from esp32c6.rom.spiflash.ld */
+esp_rom_spiflash_write_disable = 0x40000270;
+
+/***************************************
+ Group hal_systimer
+ ***************************************/
+
+/* Functions */
+/* The following ROM functions are commented out because they're patched in the esp_rom_systimer.c */
+/* systimer_hal_init = 0x400003b8; */
+/* systimer_hal_deinit = 0x400003bc; */
+
+systimer_hal_set_tick_rate_ops = 0x400003c0;
+systimer_hal_get_counter_value = 0x400003c4;
+systimer_hal_get_time = 0x400003c8;
+systimer_hal_set_alarm_target = 0x400003cc;
+systimer_hal_set_alarm_period = 0x400003d0;
+systimer_hal_get_alarm_value = 0x400003d4;
+systimer_hal_enable_alarm_int = 0x400003d8;
+systimer_hal_on_apb_freq_update = 0x400003dc;
+systimer_hal_counter_value_advance = 0x400003e0;
+systimer_hal_enable_counter = 0x400003e4;
+systimer_hal_select_alarm_mode = 0x400003e8;
+systimer_hal_connect_alarm_counter = 0x400003ec;
+systimer_hal_counter_can_stall_by_cpu = 0x400003f0;
+
+
+/***************************************
+ Group cache
+ ***************************************/
+
+/* Functions */
+Cache_Get_ICache_Line_Size = 0x400005fc;
+Cache_Get_Mode = 0x40000600;
+Cache_Address_Through_Cache = 0x40000604;
+ROM_Boot_Cache_Init = 0x40000608;
+MMU_Set_Page_Mode = 0x4000060c;
+MMU_Get_Page_Mode = 0x40000610;
+Cache_Invalidate_ICache_Items = 0x40000614;
+Cache_Op_Addr = 0x40000618;
+Cache_Invalidate_Addr = 0x4000061c;
+Cache_Invalidate_ICache_All = 0x40000620;
+Cache_Mask_All = 0x40000624;
+Cache_UnMask_Dram0 = 0x40000628;
+Cache_Suspend_ICache_Autoload = 0x4000062c;
+Cache_Resume_ICache_Autoload = 0x40000630;
+Cache_Start_ICache_Preload = 0x40000634;
+Cache_ICache_Preload_Done = 0x40000638;
+Cache_End_ICache_Preload = 0x4000063c;
+Cache_Config_ICache_Autoload = 0x40000640;
+Cache_Enable_ICache_Autoload = 0x40000644;
+Cache_Disable_ICache_Autoload = 0x40000648;
+Cache_Enable_ICache_PreLock = 0x4000064c;
+Cache_Disable_ICache_PreLock = 0x40000650;
+Cache_Lock_ICache_Items = 0x40000654;
+Cache_Unlock_ICache_Items = 0x40000658;
+Cache_Lock_Addr = 0x4000065c;
+Cache_Unlock_Addr = 0x40000660;
+Cache_Disable_ICache = 0x40000664;
+Cache_Enable_ICache = 0x40000668;
+Cache_Suspend_ICache = 0x4000066c;
+Cache_Resume_ICache = 0x40000670;
+Cache_Freeze_ICache_Enable = 0x40000674;
+Cache_Freeze_ICache_Disable = 0x40000678;
+Cache_Set_IDROM_MMU_Size = 0x4000067c;
+Cache_Get_IROM_MMU_End = 0x40000680;
+Cache_Get_DROM_MMU_End = 0x40000684;
+Cache_MMU_Init = 0x40000688;
+Cache_MSPI_MMU_Set = 0x4000068c;
+Cache_Travel_Tag_Memory = 0x40000690;
+Cache_Get_Virtual_Addr = 0x40000694;
+/* Data (.data, .bss, .rodata) */
+rom_cache_op_cb = 0x4084ffcc;
+rom_cache_internal_table_ptr = 0x4084ffc8;
+
+
+/***************************************
+ Group clock
+ ***************************************/
+
+/* Functions */
+ets_clk_get_xtal_freq = 0x40000698;
+ets_clk_get_cpu_freq = 0x4000069c;
+
+
+/***************************************
+ Group gpio
+ ***************************************/
+
+/* Functions */
+gpio_input_get = 0x400006a0;
+gpio_matrix_in = 0x400006a4;
+gpio_matrix_out = 0x400006a8;
+gpio_output_disable = 0x400006ac;
+gpio_output_enable = 0x400006b0;
+gpio_output_set = 0x400006b4;
+gpio_pad_hold = 0x400006b8;
+gpio_pad_input_disable = 0x400006bc;
+gpio_pad_input_enable = 0x400006c0;
+gpio_pad_pulldown = 0x400006c4;
+gpio_pad_pullup = 0x400006c8;
+gpio_pad_select_gpio = 0x400006cc;
+gpio_pad_set_drv = 0x400006d0;
+gpio_pad_unhold = 0x400006d4;
+gpio_pin_wakeup_disable = 0x400006d8;
+gpio_pin_wakeup_enable = 0x400006dc;
+gpio_bypass_matrix_in = 0x400006e0;
+
+
+/***************************************
+ Group interrupts
+ ***************************************/
+
+/* Functions */
+esprv_intc_int_set_priority = 0x400006e4;
+esprv_intc_int_set_threshold = 0x400006e8;
+esprv_intc_int_enable = 0x400006ec;
+esprv_intc_int_disable = 0x400006f0;
+esprv_intc_int_set_type = 0x400006f4;
+PROVIDE( intr_handler_set = 0x400006f8 );
+intr_matrix_set = 0x400006fc;
+ets_intr_lock = 0x40000700;
+ets_intr_unlock = 0x40000704;
+ets_isr_attach = 0x40000708;
+ets_isr_mask = 0x4000070c;
+ets_isr_unmask = 0x40000710;
+
+
+/***************************************
+ Group crypto
+ ***************************************/
+
+/* Functions */
+md5_vector = 0x40000714;
+MD5Init = 0x40000718;
+MD5Update = 0x4000071c;
+MD5Final = 0x40000720;
+crc32_le = 0x40000724;
+crc16_le = 0x40000728;
+crc8_le = 0x4000072c;
+crc32_be = 0x40000730;
+crc16_be = 0x40000734;
+crc8_be = 0x40000738;
+esp_crc8 = 0x4000073c;
+ets_sha_enable = 0x40000740;
+ets_sha_disable = 0x40000744;
+ets_sha_get_state = 0x40000748;
+ets_sha_init = 0x4000074c;
+ets_sha_process = 0x40000750;
+ets_sha_starts = 0x40000754;
+ets_sha_update = 0x40000758;
+ets_sha_finish = 0x4000075c;
+ets_sha_clone = 0x40000760;
+ets_hmac_enable = 0x40000764;
+ets_hmac_disable = 0x40000768;
+ets_hmac_calculate_message = 0x4000076c;
+ets_hmac_calculate_downstream = 0x40000770;
+ets_hmac_invalidate_downstream = 0x40000774;
+ets_jtag_enable_temporarily = 0x40000778;
+ets_aes_enable = 0x4000077c;
+ets_aes_disable = 0x40000780;
+ets_aes_setkey = 0x40000784;
+ets_aes_block = 0x40000788;
+ets_aes_setkey_dec = 0x4000078c;
+ets_aes_setkey_enc = 0x40000790;
+ets_bigint_enable = 0x40000794;
+ets_bigint_disable = 0x40000798;
+ets_bigint_multiply = 0x4000079c;
+ets_bigint_modmult = 0x400007a0;
+ets_bigint_modexp = 0x400007a4;
+ets_bigint_wait_finish = 0x400007a8;
+ets_bigint_getz = 0x400007ac;
+ets_ds_enable = 0x400007b0;
+ets_ds_disable = 0x400007b4;
+ets_ds_start_sign = 0x400007b8;
+ets_ds_is_busy = 0x400007bc;
+ets_ds_finish_sign = 0x400007c0;
+ets_ds_encrypt_params = 0x400007c4;
+ets_mgf1_sha256 = 0x400007c8;
+/* Data (.data, .bss, .rodata) */
+crc32_le_table_ptr = 0x4001fff8;
+crc16_le_table_ptr = 0x4001fff4;
+crc8_le_table_ptr = 0x4001fff0;
+crc32_be_table_ptr = 0x4001ffec;
+crc16_be_table_ptr = 0x4001ffe8;
+crc8_be_table_ptr = 0x4001ffe4;
+
+
+/***************************************
+ Group efuse
+ ***************************************/
+
+/* Functions */
+ets_efuse_read = 0x400007cc;
+ets_efuse_program = 0x400007d0;
+ets_efuse_clear_program_registers = 0x400007d4;
+ets_efuse_write_key = 0x400007d8;
+ets_efuse_get_read_register_address = 0x400007dc;
+ets_efuse_get_key_purpose = 0x400007e0;
+ets_efuse_key_block_unused = 0x400007e4;
+ets_efuse_find_unused_key_block = 0x400007e8;
+ets_efuse_rs_calculate = 0x400007ec;
+ets_efuse_count_unused_key_blocks = 0x400007f0;
+ets_efuse_secure_boot_enabled = 0x400007f4;
+ets_efuse_secure_boot_aggressive_revoke_enabled = 0x400007f8;
+ets_efuse_cache_encryption_enabled = 0x400007fc;
+ets_efuse_download_modes_disabled = 0x40000800;
+ets_efuse_find_purpose = 0x40000804;
+ets_efuse_force_send_resume = 0x40000808;
+ets_efuse_get_flash_delay_us = 0x4000080c;
+ets_efuse_get_mac = 0x40000810;
+ets_efuse_get_uart_print_control = 0x40000814;
+ets_efuse_direct_boot_mode_disabled = 0x40000818;
+ets_efuse_security_download_modes_enabled = 0x4000081c;
+ets_efuse_jtag_disabled = 0x40000820;
+ets_efuse_usb_print_is_disabled = 0x40000824;
+ets_efuse_usb_download_mode_disabled = 0x40000828;
+ets_efuse_usb_device_disabled = 0x4000082c;
+ets_efuse_secure_boot_fast_wake_enabled = 0x40000830;
+
+
+/***************************************
+ Group secureboot
+ ***************************************/
+
+/* Functions */
+ets_emsa_pss_verify = 0x40000834;
+ets_rsa_pss_verify = 0x40000838;
+ets_ecdsa_verify = 0x4000083c;
+ets_secure_boot_verify_bootloader_with_keys = 0x40000840;
+ets_secure_boot_verify_signature = 0x40000844;
+ets_secure_boot_read_key_digests = 0x40000848;
+ets_secure_boot_revoke_public_key_digest = 0x4000084c;
+
+
+/***************************************
+ Group usb_device_uart
+ ***************************************/
+
+/* Functions */
+usb_serial_device_rx_one_char = 0x400009c0;
+usb_serial_device_rx_one_char_block = 0x400009c4;
+usb_serial_device_tx_flush = 0x400009c8;
+usb_serial_device_tx_one_char = 0x400009cc;
+
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32h2.rom.newlib.ld for esp32h2
+ *
+ *
+ * Generated from ./target/esp32h2/interface-esp32h2.yml md5sum c0ad4e113e5b29bb9d799f10f03edbc1
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group newlib
+ ***************************************/
+
+/* Functions */
+esp_rom_newlib_init_common_mutexes = 0x4000049c;
+memset = 0x400004a0;
+memcpy = 0x400004a4;
+memmove = 0x400004a8;
+memcmp = 0x400004ac;
+strcpy = 0x400004b0;
+strncpy = 0x400004b4;
+strcmp = 0x400004b8;
+strncmp = 0x400004bc;
+strlen = 0x400004c0;
+strstr = 0x400004c4;
+bzero = 0x400004c8;
+_isatty_r = 0x400004cc;
+sbrk = 0x400004d0;
+isalnum = 0x400004d4;
+isalpha = 0x400004d8;
+isascii = 0x400004dc;
+isblank = 0x400004e0;
+iscntrl = 0x400004e4;
+isdigit = 0x400004e8;
+islower = 0x400004ec;
+isgraph = 0x400004f0;
+isprint = 0x400004f4;
+ispunct = 0x400004f8;
+isspace = 0x400004fc;
+isupper = 0x40000500;
+toupper = 0x40000504;
+tolower = 0x40000508;
+toascii = 0x4000050c;
+memccpy = 0x40000510;
+memchr = 0x40000514;
+memrchr = 0x40000518;
+strcasecmp = 0x4000051c;
+strcasestr = 0x40000520;
+strcat = 0x40000524;
+strdup = 0x40000528;
+strchr = 0x4000052c;
+strcspn = 0x40000530;
+strcoll = 0x40000534;
+strlcat = 0x40000538;
+strlcpy = 0x4000053c;
+strlwr = 0x40000540;
+strncasecmp = 0x40000544;
+strncat = 0x40000548;
+strndup = 0x4000054c;
+strnlen = 0x40000550;
+strrchr = 0x40000554;
+strsep = 0x40000558;
+strspn = 0x4000055c;
+strtok_r = 0x40000560;
+strupr = 0x40000564;
+longjmp = 0x40000568;
+setjmp = 0x4000056c;
+abs = 0x40000570;
+div = 0x40000574;
+labs = 0x40000578;
+ldiv = 0x4000057c;
+qsort = 0x40000580;
+rand_r = 0x40000584;
+rand = 0x40000588;
+srand = 0x4000058c;
+utoa = 0x40000590;
+itoa = 0x40000594;
+atoi = 0x40000598;
+atol = 0x4000059c;
+strtol = 0x400005a0;
+strtoul = 0x400005a4;
+fflush = 0x400005a8;
+_fflush_r = 0x400005ac;
+_fwalk = 0x400005b0;
+_fwalk_reent = 0x400005b4;
+__smakebuf_r = 0x400005b8;
+__swhatbuf_r = 0x400005bc;
+__swbuf_r = 0x400005c0;
+__swbuf = 0x400005c4;
+__swsetup_r = 0x400005c8;
+/* Data (.data, .bss, .rodata) */
+syscall_table_ptr = 0x4084ffd4;
+_global_impure_ptr = 0x4084ffd0;
+
+/*
+ * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+/* ROM function interface esp32h2.rom.libgcc.ld for esp32h2
+ *
+ *
+ * Generated from ./target/esp32h2/interface-esp32h2.yml md5sum c0ad4e113e5b29bb9d799f10f03edbc1
+ *
+ * Compatible with ROM where ECO version equal or greater to 0.
+ *
+ * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
+ */
+
+/***************************************
+ Group libgcc
+ ***************************************/
+
+/* Functions */
+__absvdi2 = 0x40000850;
+__absvsi2 = 0x40000854;
+__adddf3 = 0x40000858;
+__addsf3 = 0x4000085c;
+__addvdi3 = 0x40000860;
+__addvsi3 = 0x40000864;
+__ashldi3 = 0x40000868;
+__ashrdi3 = 0x4000086c;
+__bswapdi2 = 0x40000870;
+__bswapsi2 = 0x40000874;
+__clear_cache = 0x40000878;
+__clrsbdi2 = 0x4000087c;
+__clrsbsi2 = 0x40000880;
+__clzdi2 = 0x40000884;
+__clzsi2 = 0x40000888;
+__cmpdi2 = 0x4000088c;
+__ctzdi2 = 0x40000890;
+__ctzsi2 = 0x40000894;
+__divdc3 = 0x40000898;
+__divdf3 = 0x4000089c;
+__divdi3 = 0x400008a0;
+__divsc3 = 0x400008a4;
+__divsf3 = 0x400008a8;
+__divsi3 = 0x400008ac;
+__eqdf2 = 0x400008b0;
+__eqsf2 = 0x400008b4;
+__extendsfdf2 = 0x400008b8;
+__ffsdi2 = 0x400008bc;
+__ffssi2 = 0x400008c0;
+__fixdfdi = 0x400008c4;
+__fixdfsi = 0x400008c8;
+__fixsfdi = 0x400008cc;
+__fixsfsi = 0x400008d0;
+__fixunsdfsi = 0x400008d4;
+__fixunssfdi = 0x400008d8;
+__fixunssfsi = 0x400008dc;
+__floatdidf = 0x400008e0;
+__floatdisf = 0x400008e4;
+__floatsidf = 0x400008e8;
+__floatsisf = 0x400008ec;
+__floatundidf = 0x400008f0;
+__floatundisf = 0x400008f4;
+__floatunsidf = 0x400008f8;
+__floatunsisf = 0x400008fc;
+__gcc_bcmp = 0x40000900;
+__gedf2 = 0x40000904;
+__gesf2 = 0x40000908;
+__gtdf2 = 0x4000090c;
+__gtsf2 = 0x40000910;
+__ledf2 = 0x40000914;
+__lesf2 = 0x40000918;
+__lshrdi3 = 0x4000091c;
+__ltdf2 = 0x40000920;
+__ltsf2 = 0x40000924;
+__moddi3 = 0x40000928;
+__modsi3 = 0x4000092c;
+__muldc3 = 0x40000930;
+__muldf3 = 0x40000934;
+__muldi3 = 0x40000938;
+__mulsc3 = 0x4000093c;
+__mulsf3 = 0x40000940;
+__mulsi3 = 0x40000944;
+__mulvdi3 = 0x40000948;
+__mulvsi3 = 0x4000094c;
+__nedf2 = 0x40000950;
+__negdf2 = 0x40000954;
+__negdi2 = 0x40000958;
+__negsf2 = 0x4000095c;
+__negvdi2 = 0x40000960;
+__negvsi2 = 0x40000964;
+__nesf2 = 0x40000968;
+__paritysi2 = 0x4000096c;
+__popcountdi2 = 0x40000970;
+__popcountsi2 = 0x40000974;
+__powidf2 = 0x40000978;
+__powisf2 = 0x4000097c;
+__subdf3 = 0x40000980;
+__subsf3 = 0x40000984;
+__subvdi3 = 0x40000988;
+__subvsi3 = 0x4000098c;
+__truncdfsf2 = 0x40000990;
+__ucmpdi2 = 0x40000994;
+__udivdi3 = 0x40000998;
+__udivmoddi4 = 0x4000099c;
+__udivsi3 = 0x400009a0;
+__udiv_w_sdiv = 0x400009a4;
+__umoddi3 = 0x400009a8;
+__umodsi3 = 0x400009ac;
+__unorddf2 = 0x400009b0;
+__unordsf2 = 0x400009b4;
+__extenddftf2 = 0x400009b8;
+__trunctfdf2 = 0x400009bc;
+
+PROVIDE ( esp_rom_delay_us = ets_delay_us );
+PROVIDE ( esp_rom_crc32_le = crc32_le );
diff --git a/esp-wifi-sys/src/lib.rs b/esp-wifi-sys/src/lib.rs
index 6d6ef81e..f6b011ca 100644
--- a/esp-wifi-sys/src/lib.rs
+++ b/esp-wifi-sys/src/lib.rs
@@ -8,6 +8,7 @@ pub mod c_types;
 #[cfg_attr(feature = "esp32c2", path = "include/esp32c2.rs")]
 #[cfg_attr(feature = "esp32c3", path = "include/esp32c3.rs")]
 #[cfg_attr(feature = "esp32c6", path = "include/esp32c6.rs")]
+#[cfg_attr(feature = "esp32h2", path = "include/esp32h2.rs")]
 #[cfg_attr(feature = "esp32s2", path = "include/esp32s2.rs")]
 #[cfg_attr(feature = "esp32s3", path = "include/esp32s3.rs")]
 pub mod include;
diff --git a/esp-wifi/.cargo/config.toml b/esp-wifi/.cargo/config.toml
index 83c7032d..872463e8 100644
--- a/esp-wifi/.cargo/config.toml
+++ b/esp-wifi/.cargo/config.toml
@@ -1,5 +1,5 @@
 # Alias' for quickly building for different chips or running examples
-# By default we enable 
+# By default we enable
 #   - `default` HAL features to set up basic chip specific settings
 #   - `embassy-time-timg0` as the examples assume we are using this time driver
 #   - `embassy-executor-thread` on Xtensa chips to take advantage of the Xtensa specific executor we have in esp-hal
@@ -10,6 +10,7 @@ esp32s3 = "run --features esp32s3 --target xtensa-esp32s3-none-elf      --featur
 esp32c2 = "run --features esp32c2 --target riscv32imc-unknown-none-elf  --features esp32c2-hal/default,esp32c2-hal/embassy-time-timg0,esp32c2-hal/embassy-executor-thread"
 esp32c3 = "run --features esp32c3 --target riscv32imc-unknown-none-elf  --features esp32c3-hal/default,esp32c3-hal/embassy-time-timg0,esp32c3-hal/embassy-executor-thread"
 esp32c6 = "run --features esp32c6 --target riscv32imac-unknown-none-elf --features esp32c6-hal/default,esp32c6-hal/embassy-time-timg0,esp32c6-hal/embassy-executor-thread"
+esp32h2 = "run --features esp32h2 --target riscv32imac-unknown-none-elf --features esp32h2-hal/default,esp32h2-hal/embassy-time-timg0,esp32h2-hal/embassy-executor-thread"
 
 besp32 =   "build --features   esp32 --target xtensa-esp32-none-elf        --features esp32-hal/default,esp32-hal/embassy-time-timg0,esp32-hal/embassy-executor-thread"
 besp32s2 = "build --features esp32s2 --target xtensa-esp32s2-none-elf      --features esp32s2-hal/default,esp32s2-hal/embassy-time-timg0,esp32s2-hal/embassy-executor-thread"
@@ -17,6 +18,7 @@ besp32s3 = "build --features esp32s3 --target xtensa-esp32s3-none-elf      --fea
 besp32c2 = "build --features esp32c2 --target riscv32imc-unknown-none-elf  --features esp32c2-hal/default,esp32c2-hal/embassy-time-timg0,esp32c2-hal/embassy-executor-thread"
 besp32c3 = "build --features esp32c3 --target riscv32imc-unknown-none-elf  --features esp32c3-hal/default,esp32c3-hal/embassy-time-timg0,esp32c3-hal/embassy-executor-thread"
 besp32c6 = "build --features esp32c6 --target riscv32imac-unknown-none-elf --features esp32c6-hal/default,esp32c6-hal/embassy-time-timg0,esp32c6-hal/embassy-executor-thread"
+besp32h2 = "build --features esp32h2 --target riscv32imac-unknown-none-elf --features esp32h2-hal/default,esp32h2-hal/embassy-time-timg0,esp32h2-hal/embassy-executor-thread"
 
 [target.riscv32imc-unknown-none-elf]
 runner = "espflash flash --monitor"
@@ -57,4 +59,4 @@ rustflags = [
 ]
 
 [unstable]
-build-std = [ "core" ]
+build-std = [ "core" ]
\ No newline at end of file
diff --git a/esp-wifi/Cargo.toml b/esp-wifi/Cargo.toml
index 58125a19..a03485e7 100644
--- a/esp-wifi/Cargo.toml
+++ b/esp-wifi/Cargo.toml
@@ -26,6 +26,7 @@ defmt = { workspace = true, optional = true }
 esp32c3-hal = { workspace = true, optional = true }
 esp32c2-hal = { workspace = true, optional = true }
 esp32c6-hal = { workspace = true, optional = true }
+esp32h2-hal = { workspace = true, optional = true }
 esp32-hal = { workspace = true, optional = true }
 esp32s3-hal = { workspace = true, optional = true }
 esp32s2-hal = { workspace = true, optional = true }
@@ -75,6 +76,7 @@ default = [ "log", "ipv4", "tcp", "udp", "icmp", "igmp", "dns", "dhcpv4" ]
 esp32c2 = [ "esp32c2-hal", "esp-wifi-sys/esp32c2", "esp-println/esp32c2", "esp-backtrace/esp32c2" ]
 esp32c3 = [ "esp32c3-hal", "esp-wifi-sys/esp32c3", "esp-println/esp32c3", "esp-backtrace/esp32c3" ]
 esp32c6 = [ "esp32c6-hal", "esp-wifi-sys/esp32c6", "esp-println/esp32c6", "esp-backtrace/esp32c6" ]
+esp32h2 = [ "esp32h2-hal", "esp-wifi-sys/esp32h2", "esp-println/esp32h2", "esp-backtrace/esp32h2" ]
 esp32   = [ "esp32-hal",   "esp-wifi-sys/esp32",   "esp-println/esp32",   "esp-backtrace/esp32" ]
 esp32s2 = [ "esp32s2-hal", "esp-wifi-sys/esp32s2", "esp-println/esp32s2", "esp-backtrace/esp32s2" ]
 esp32s3 = [ "esp32s3-hal", "esp-wifi-sys/esp32s3", "esp-println/esp32s3", "esp-backtrace/esp32s3" ]
@@ -87,12 +89,14 @@ async = [
   "esp32c3-hal?/embassy",
   "esp32c2-hal?/embassy",
   "esp32c6-hal?/embassy",
+  "esp32h2-hal?/embassy",
   "esp32-hal?/embassy",
   "esp32s2-hal?/embassy",
   "esp32s3-hal?/embassy",
   "esp32c3-hal?/async",
   "esp32c2-hal?/async",
   "esp32c6-hal?/async",
+  "esp32h2-hal?/async",
   "esp32-hal?/async",
   "esp32s2-hal?/async",
   "esp32s3-hal?/async",
@@ -127,6 +131,7 @@ defmt = [
   "esp32c3-hal?/defmt",
   "esp32c2-hal?/defmt",
   "esp32c6-hal?/defmt",
+  "esp32h2-hal?/defmt",
   "esp32-hal?/defmt",
   "esp32s2-hal?/defmt",
   "esp32s3-hal?/defmt",
@@ -136,6 +141,7 @@ log = [
   "esp32c3-hal?/log",
   "esp32c2-hal?/log",
   "esp32c6-hal?/log",
+  "esp32h2-hal?/log",
   "esp32-hal?/log",
   "esp32s2-hal?/log",
   "esp32s3-hal?/log",
diff --git a/esp-wifi/automated-tests/test_ble.rs b/esp-wifi/automated-tests/test_ble.rs
index f5aaf5b7..6b50d457 100644
--- a/esp-wifi/automated-tests/test_ble.rs
+++ b/esp-wifi/automated-tests/test_ble.rs
@@ -14,7 +14,7 @@ use esp_backtrace as _;
 use esp_println::println;
 use esp_wifi::{ble::controller::BleConnector, initialize, EspWifiInitFor};
 use examples_util::hal;
-use hal::{clock::ClockControl, peripherals::*, prelude::*, Rng, IO};
+use hal::{clock::ClockControl, peripherals::*, prelude::*, Rng};
 #[path = "../../examples-util/util.rs"]
 mod examples_util;
 
diff --git a/esp-wifi/build.rs b/esp-wifi/build.rs
index c154722f..1b2fca38 100644
--- a/esp-wifi/build.rs
+++ b/esp-wifi/build.rs
@@ -3,6 +3,7 @@
     feature = "esp32c2",
     feature = "esp32c3",
     feature = "esp32c6",
+    feature = "esp32h2",
     feature = "esp32s2",
     feature = "esp32s3",
 ))]
@@ -17,12 +18,22 @@ fn main() -> Result<(), String> {
         "#
         );
     }
+    #[cfg(all(feature = "wifi", feature = "esp32h2"))]
+    {
+        panic!(
+            r#"
+
+        WiFi is not supported on this target.
+
+        "#
+        );
+    }
     #[cfg(all(feature = "coex", any(feature = "esp32s2")))]
     {
         panic!(
             r#"
 
-        COEX is not yet supported on this target. 
+        COEX is not yet supported on this target.
 
         See https://github.com/esp-rs/esp-wifi/issues/92.
 
@@ -33,7 +44,7 @@ fn main() -> Result<(), String> {
         Ok(level) => {
             if level != "2" && level != "3" {
                 let message = format!(
-                    "esp-wifi should be built with optimization level 2 or 3 - yours is {level}. 
+                    "esp-wifi should be built with optimization level 2 or 3 - yours is {level}.
                     See https://github.com/esp-rs/esp-wifi",
                 );
                 print_warning(message);
@@ -54,6 +65,9 @@ fn main() -> Result<(), String> {
     #[cfg(feature = "esp32c6")]
     println!("cargo:rustc-cfg=esp32c6");
 
+    #[cfg(feature = "esp32h2")]
+    println!("cargo:rustc-cfg=esp32h2");
+
     #[cfg(feature = "esp32s2")]
     println!("cargo:rustc-cfg=esp32s2");
 
@@ -124,6 +138,7 @@ fn try_read_xtensa_rustc_version(version: &str) -> Option<Version4> {
     feature = "esp32c2",
     feature = "esp32c3",
     feature = "esp32c6",
+    feature = "esp32h2",
     feature = "esp32s2",
     feature = "esp32s3",
 )))]
diff --git a/esp-wifi/examples/ble.rs b/esp-wifi/examples/ble.rs
index 98be8d44..1fe30d19 100644
--- a/esp-wifi/examples/ble.rs
+++ b/esp-wifi/examples/ble.rs
@@ -42,7 +42,12 @@ fn main() -> ! {
     let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
     #[cfg(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3"))]
     let button = io.pins.gpio0.into_pull_down_input();
-    #[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32c6"))]
+    #[cfg(any(
+        feature = "esp32c2",
+        feature = "esp32c3",
+        feature = "esp32c6",
+        feature = "esp32h2"
+    ))]
     let button = io.pins.gpio9.into_pull_down_input();
 
     let mut debounce_cnt = 500;
diff --git a/esp-wifi/examples/embassy_ble.rs b/esp-wifi/examples/embassy_ble.rs
index 10a640ec..963625f3 100644
--- a/esp-wifi/examples/embassy_ble.rs
+++ b/esp-wifi/examples/embassy_ble.rs
@@ -50,7 +50,12 @@ async fn main(_spawner: Spawner) -> ! {
     let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
     #[cfg(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3"))]
     let button = io.pins.gpio0.into_pull_down_input();
-    #[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32c6"))]
+    #[cfg(any(
+        feature = "esp32c2",
+        feature = "esp32c3",
+        feature = "esp32c6",
+        feature = "esp32h2"
+    ))]
     let button = io.pins.gpio9.into_pull_down_input();
 
     // Async requires the GPIO interrupt to wake futures
diff --git a/esp-wifi/src/ble/mod.rs b/esp-wifi/src/ble/mod.rs
index aa848911..c676064a 100644
--- a/esp-wifi/src/ble/mod.rs
+++ b/esp-wifi/src/ble/mod.rs
@@ -3,7 +3,7 @@
 #[cfg(any(esp32, esp32c3, esp32s3))]
 pub(crate) mod btdm;
 
-#[cfg(any(esp32c2, esp32c6))]
+#[cfg(any(esp32c2, esp32c6, esp32h2))]
 pub(crate) mod npl;
 
 use core::mem::MaybeUninit;
@@ -11,7 +11,7 @@ use core::mem::MaybeUninit;
 #[cfg(any(esp32, esp32c3, esp32s3))]
 use self::btdm as ble;
 
-#[cfg(any(esp32c2, esp32c6))]
+#[cfg(any(esp32c2, esp32c6, esp32h2))]
 use self::npl as ble;
 
 pub(crate) use ble::ble_init;
diff --git a/esp-wifi/src/ble/npl.rs b/esp-wifi/src/ble/npl.rs
index 8bf088e1..41503408 100644
--- a/esp-wifi/src/ble/npl.rs
+++ b/esp-wifi/src/ble/npl.rs
@@ -16,6 +16,7 @@ use crate::timer::yield_task;
 
 #[cfg_attr(esp32c2, path = "os_adapter_esp32c2.rs")]
 #[cfg_attr(esp32c6, path = "os_adapter_esp32c6.rs")]
+#[cfg_attr(esp32h2, path = "os_adapter_esp32h2.rs")]
 pub(crate) mod ble_os_adapter_chip_specific;
 
 const TIME_FOREVER: u32 = u32::MAX;
diff --git a/esp-wifi/src/ble/os_adapter_esp32h2.rs b/esp-wifi/src/ble/os_adapter_esp32h2.rs
new file mode 100644
index 00000000..af262ac1
--- /dev/null
+++ b/esp-wifi/src/ble/os_adapter_esp32h2.rs
@@ -0,0 +1,128 @@
+use crate::binary::include::esp_bt_controller_config_t;
+use crate::common_adapter::RADIO_CLOCKS;
+use crate::hal::system::RadioClockController;
+use crate::hal::system::RadioPeripherals;
+
+pub(crate) static mut ISR_INTERRUPT_15: (
+    *mut crate::binary::c_types::c_void,
+    *mut crate::binary::c_types::c_void,
+) = (core::ptr::null_mut(), core::ptr::null_mut());
+
+pub(crate) static mut ISR_INTERRUPT_3: (
+    *mut crate::binary::c_types::c_void,
+    *mut crate::binary::c_types::c_void,
+) = (core::ptr::null_mut(), core::ptr::null_mut());
+
+pub(crate) static BLE_CONFIG: esp_bt_controller_config_t = esp_bt_controller_config_t {
+    config_version: 0x20230113,
+    ble_ll_resolv_list_size: 4,
+    ble_hci_evt_hi_buf_count: 30,
+    ble_hci_evt_lo_buf_count: 8,
+    ble_ll_sync_list_cnt: 5,
+    ble_ll_sync_cnt: 20,
+    ble_ll_rsp_dup_list_count: 20,
+    ble_ll_adv_dup_list_count: 20,
+    ble_ll_tx_pwr_dbm: 9,
+    rtc_freq: 32000,
+    ble_ll_sca: 60,
+    ble_ll_scan_phy_number: 1,
+    ble_ll_conn_def_auth_pyld_tmo: 3000,
+    ble_ll_jitter_usecs: 16,
+    ble_ll_sched_max_adv_pdu_usecs: 376,
+    ble_ll_sched_direct_adv_max_usecs: 502,
+    ble_ll_sched_adv_max_usecs: 852,
+    ble_scan_rsp_data_max_len: 31,
+    ble_ll_cfg_num_hci_cmd_pkts: 1,
+    ble_ll_ctrl_proc_timeout_ms: 40000,
+    nimble_max_connections: 2,
+    ble_whitelist_size: 12,
+    ble_acl_buf_size: 255,
+    ble_acl_buf_count: 24,
+    ble_hci_evt_buf_size: 70,
+    ble_multi_adv_instances: 1,
+    ble_ext_adv_max_size: 31,
+    controller_task_stack_size: 4096,
+    controller_task_prio: 253, // ???
+    controller_run_cpu: 0,
+    enable_qa_test: 0,
+    enable_bqb_test: 0,
+    enable_uart_hci: 0,
+    ble_hci_uart_port: 0,
+    ble_hci_uart_baud: 0,
+    ble_hci_uart_data_bits: 0,
+    ble_hci_uart_stop_bits: 0,
+    ble_hci_uart_flow_ctrl: 0,
+    ble_hci_uart_uart_parity: 0,
+    enable_tx_cca: 0,
+    cca_rssi_thresh: (256 - 50) as u8,
+    sleep_en: 0,
+    coex_phy_coded_tx_rx_time_limit: 0,
+    dis_scan_backoff: 0,
+    ble_scan_classify_filter_enable: 1,
+    cca_drop_mode: 0,  //???
+    cca_low_tx_pwr: 0, //???
+    main_xtal_freq: 32,
+    ignore_wl_for_direct_adv: 0,
+    config_magic: 0x5A5AA5A5,
+
+    cpu_freq_mhz: 96,
+    enable_pcl: 0,
+    // version_num: 0,
+};
+
+pub(crate) fn bt_periph_module_enable() {
+    unsafe {
+        unwrap!(RADIO_CLOCKS.as_mut()).enable(RadioPeripherals::Bt);
+    }
+}
+
+pub(crate) fn disable_sleep_mode() {
+    // nothing
+}
+
+pub(super) unsafe extern "C" fn esp_intr_alloc(
+    source: u32,
+    flags: u32,
+    handler: *mut crate::binary::c_types::c_void,
+    arg: *mut crate::binary::c_types::c_void,
+    ret_handle: *mut *mut crate::binary::c_types::c_void,
+) -> i32 {
+    debug!(
+        "esp_intr_alloc {} {} {:?} {:?} {:?}",
+        source, flags, handler, arg, ret_handle
+    );
+
+    match source {
+        3 => ISR_INTERRUPT_3 = (handler, arg),
+        15 => ISR_INTERRUPT_15 = (handler, arg),
+        _ => panic!("Unexpected interrupt source {}", source),
+    }
+
+    0
+}
+
+pub(super) fn ble_rtc_clk_init() {
+    unsafe {
+        unwrap!(RADIO_CLOCKS.as_mut()).ble_rtc_clk_init();
+    }
+}
+
+pub(super) unsafe extern "C" fn esp_reset_rpa_moudle() {
+    trace!("esp_reset_rpa_moudle");
+    unsafe {
+        unwrap!(RADIO_CLOCKS.as_mut()).reset_rpa();
+    }
+}
+
+#[allow(improper_ctypes_definitions)]
+#[no_mangle]
+unsafe extern "C" fn jrand48(
+    _xsubi: [crate::binary::c_types::c_ushort; 3],
+) -> crate::binary::c_types::c_long {
+    // this is not very random but good enough for now - it's apparently not used for crypto
+    unsafe {
+        static mut VALUE: u32 = 0;
+        VALUE = VALUE.wrapping_add(3);
+        VALUE as i32
+    }
+}
diff --git a/esp-wifi/src/common_adapter/common_adapter_esp32h2.rs b/esp-wifi/src/common_adapter/common_adapter_esp32h2.rs
new file mode 100644
index 00000000..e23d0338
--- /dev/null
+++ b/esp-wifi/src/common_adapter/common_adapter_esp32h2.rs
@@ -0,0 +1,137 @@
+use super::phy_init_data::PHY_INIT_DATA_DEFAULT;
+use crate::binary::include::*;
+use crate::common_adapter::RADIO_CLOCKS;
+use crate::compat::common::str_from_c;
+use crate::hal::system::RadioClockController;
+use crate::hal::system::RadioPeripherals;
+
+// use atomic_polyfill::AtomicU32;
+use portable_atomic::{AtomicU32, Ordering};
+
+const SOC_PHY_DIG_REGS_MEM_SIZE: usize = 21 * 4;
+
+static mut SOC_PHY_DIG_REGS_MEM: [u8; SOC_PHY_DIG_REGS_MEM_SIZE] = [0u8; SOC_PHY_DIG_REGS_MEM_SIZE];
+static mut G_IS_PHY_CALIBRATED: bool = false;
+static mut G_PHY_DIGITAL_REGS_MEM: *mut u32 = core::ptr::null_mut();
+static mut S_IS_PHY_REG_STORED: bool = false;
+static mut PHY_ACCESS_REF: AtomicU32 = AtomicU32::new(0);
+
+pub(crate) fn enable_wifi_power_domain() {
+    // In esp-idf, SOC_PMU_SUPPORTED is set which makes `esp_wifi_bt_power_domain_on`
+    // a no-op.
+}
+
+pub(crate) fn phy_mem_init() {
+    unsafe {
+        G_PHY_DIGITAL_REGS_MEM = SOC_PHY_DIG_REGS_MEM.as_ptr() as *mut u32;
+    }
+}
+
+pub(crate) unsafe fn phy_enable() {
+    let count = PHY_ACCESS_REF.fetch_add(1, Ordering::SeqCst);
+    if count == 0 {
+        critical_section::with(|_| {
+            phy_enable_clock();
+
+            if G_IS_PHY_CALIBRATED == false {
+                let mut cal_data: [u8; core::mem::size_of::<esp_phy_calibration_data_t>()] =
+                    [0u8; core::mem::size_of::<esp_phy_calibration_data_t>()];
+
+                let phy_version = get_phy_version_str();
+                trace!("phy_version {}", str_from_c(phy_version as *const u8));
+
+                let init_data = &PHY_INIT_DATA_DEFAULT;
+
+                #[cfg(feature = "phy-enable-usb")]
+                {
+                    extern "C" {
+                        pub fn phy_bbpll_en_usb(param: bool);
+                    }
+
+                    phy_bbpll_en_usb(true);
+                }
+                register_chipv7_phy(
+                    init_data,
+                    &mut cal_data as *mut _
+                        as *mut crate::binary::include::esp_phy_calibration_data_t,
+                    esp_phy_calibration_mode_t_PHY_RF_CAL_FULL,
+                );
+
+                G_IS_PHY_CALIBRATED = true;
+            } else {
+                phy_wakeup_init();
+                phy_digital_regs_load();
+            }
+
+            #[cfg(feature = "ble")]
+            {
+                extern "C" {
+                    fn coex_pti_v2();
+                }
+                coex_pti_v2();
+            }
+
+            trace!("PHY ENABLE");
+        });
+    }
+}
+
+#[allow(unused)]
+pub(crate) unsafe fn phy_disable() {
+    let count = PHY_ACCESS_REF.fetch_sub(1, Ordering::SeqCst);
+    if count == 1 {
+        critical_section::with(|_| {
+            phy_digital_regs_store();
+            // Disable PHY and RF.
+            phy_close_rf();
+
+            // Disable PHY temperature sensor
+            phy_xpd_tsens();
+
+            // #if CONFIG_IDF_TARGET_ESP32
+            //         // Update WiFi MAC time before disalbe WiFi/BT common peripheral clock
+            //         phy_update_wifi_mac_time(true, esp_timer_get_time());
+            // #endif
+
+            // Disable WiFi/BT common peripheral clock. Do not disable clock for hardware RNG
+            phy_disable_clock();
+            trace!("PHY DISABLE");
+        });
+    }
+}
+
+fn phy_digital_regs_load() {
+    unsafe {
+        if S_IS_PHY_REG_STORED && !G_PHY_DIGITAL_REGS_MEM.is_null() {
+            phy_dig_reg_backup(false, G_PHY_DIGITAL_REGS_MEM);
+        }
+    }
+}
+
+fn phy_digital_regs_store() {
+    unsafe {
+        if !G_PHY_DIGITAL_REGS_MEM.is_null() {
+            phy_dig_reg_backup(true, G_PHY_DIGITAL_REGS_MEM);
+            S_IS_PHY_REG_STORED = true;
+        }
+    }
+}
+
+pub(crate) unsafe fn phy_enable_clock() {
+    trace!("phy_enable_clock");
+    unwrap!(RADIO_CLOCKS.as_mut()).enable(RadioPeripherals::Phy);
+    trace!("phy_enable_clock done!");
+}
+
+#[allow(unused)]
+pub(crate) unsafe fn phy_disable_clock() {
+    trace!("phy_disable_clock");
+    unwrap!(RADIO_CLOCKS.as_mut()).disable(RadioPeripherals::Phy);
+    trace!("phy_disable_clock done!");
+}
+
+#[no_mangle]
+pub extern "C" fn rtc_clk_xtal_freq_get() -> i32 {
+    // JUST SUPPORT 32MHz XTAL for now
+    32
+}
diff --git a/esp-wifi/src/common_adapter/mod.rs b/esp-wifi/src/common_adapter/mod.rs
index 849116c4..12b9c111 100644
--- a/esp-wifi/src/common_adapter/mod.rs
+++ b/esp-wifi/src/common_adapter/mod.rs
@@ -18,6 +18,7 @@ use hal::macros::ram;
 #[cfg_attr(esp32c3, path = "common_adapter_esp32c3.rs")]
 #[cfg_attr(esp32c2, path = "common_adapter_esp32c2.rs")]
 #[cfg_attr(esp32c6, path = "common_adapter_esp32c6.rs")]
+#[cfg_attr(esp32h2, path = "common_adapter_esp32h2.rs")]
 #[cfg_attr(esp32, path = "common_adapter_esp32.rs")]
 #[cfg_attr(esp32s3, path = "common_adapter_esp32s3.rs")]
 #[cfg_attr(esp32s2, path = "common_adapter_esp32s2.rs")]
@@ -26,6 +27,7 @@ pub(crate) mod chip_specific;
 #[cfg_attr(esp32c3, path = "phy_init_data_esp32c3.rs")]
 #[cfg_attr(esp32c2, path = "phy_init_data_esp32c2.rs")]
 #[cfg_attr(esp32c6, path = "phy_init_data_esp32c6.rs")]
+#[cfg_attr(esp32h2, path = "phy_init_data_esp32h2.rs")]
 #[cfg_attr(esp32, path = "phy_init_data_esp32.rs")]
 #[cfg_attr(esp32s3, path = "phy_init_data_esp32s3.rs")]
 #[cfg_attr(esp32s2, path = "phy_init_data_esp32s2.rs")]
diff --git a/esp-wifi/src/common_adapter/phy_init_data_esp32h2.rs b/esp-wifi/src/common_adapter/phy_init_data_esp32h2.rs
new file mode 100644
index 00000000..d379b0be
--- /dev/null
+++ b/esp-wifi/src/common_adapter/phy_init_data_esp32h2.rs
@@ -0,0 +1,146 @@
+use crate::binary::include::esp_phy_init_data_t;
+
+const CONFIG_ESP_PHY_MAX_TX_POWER: u8 = 20;
+
+const fn limit(val: u8, low: u8, high: u8) -> u8 {
+    if val < low {
+        low
+    } else if val > high {
+        high
+    } else {
+        val
+    }
+}
+
+pub(crate) static PHY_INIT_DATA_DEFAULT: esp_phy_init_data_t = esp_phy_init_data_t {
+    params: [
+        0x01,
+        0x00,
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x54),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x54),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x54),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
+        limit(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x28),
+        0x00,
+        0x00,
+        0x00,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0xff,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0x9B,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+    ],
+};
diff --git a/esp-wifi/src/lib.rs b/esp-wifi/src/lib.rs
index 36a270f8..9a4eb0e9 100644
--- a/esp-wifi/src/lib.rs
+++ b/esp-wifi/src/lib.rs
@@ -24,12 +24,14 @@ use esp32c2_hal as hal;
 use esp32c3_hal as hal;
 #[cfg(esp32c6)]
 use esp32c6_hal as hal;
+#[cfg(esp32h2)]
+use esp32h2_hal as hal;
 #[cfg(esp32s2)]
 use esp32s2_hal as hal;
 #[cfg(esp32s3)]
 use esp32s3_hal as hal;
 
-#[cfg(any(esp32c2, esp32c3, esp32c6))]
+#[cfg(any(esp32c2, esp32c3, esp32c6, esp32h2))]
 use hal::systimer::{Alarm, Target};
 
 use common_adapter::init_radio_clock_control;
@@ -152,7 +154,7 @@ fn init_heap() {
     });
 }
 
-#[cfg(any(esp32c3, esp32c2, esp32c6))]
+#[cfg(any(esp32c3, esp32c2, esp32c6, esp32h2))]
 pub(crate) type EspWifiTimer = Alarm<Target, 0>;
 
 #[cfg(any(esp32, esp32s3, esp32s2))]
@@ -245,6 +247,9 @@ pub fn initialize(
     #[cfg(esp32c2)]
     const MAX_CLOCK: u32 = 120;
 
+    #[cfg(esp32h2)]
+    const MAX_CLOCK: u32 = 96;
+
     if clocks.cpu_clock != MegahertzU32::MHz(MAX_CLOCK) {
         return Err(InitializationError::WrongClockConfig);
     }
diff --git a/esp-wifi/src/timer/mod.rs b/esp-wifi/src/timer/mod.rs
index 4b1ce9bf..a0697ffe 100644
--- a/esp-wifi/src/timer/mod.rs
+++ b/esp-wifi/src/timer/mod.rs
@@ -2,12 +2,13 @@
 #[cfg_attr(esp32c2, path = "timer_esp32c2.rs")]
 #[cfg_attr(esp32c3, path = "timer_esp32c3.rs")]
 #[cfg_attr(esp32c6, path = "timer_esp32c6.rs")]
+#[cfg_attr(esp32h2, path = "timer_esp32h2.rs")]
 #[cfg_attr(esp32s3, path = "timer_esp32s3.rs")]
 #[cfg_attr(esp32s2, path = "timer_esp32s2.rs")]
 mod chip_specific;
 
 #[cfg_attr(any(esp32, esp32s2, esp32s3), path = "xtensa.rs")]
-#[cfg_attr(any(esp32c2, esp32c3, esp32c6), path = "riscv.rs")]
+#[cfg_attr(any(esp32c2, esp32c3, esp32c6, esp32h2), path = "riscv.rs")]
 mod arch_specific;
 
 pub use arch_specific::*;
diff --git a/esp-wifi/src/timer/riscv.rs b/esp-wifi/src/timer/riscv.rs
index 53cf17c8..c74f80f7 100644
--- a/esp-wifi/src/timer/riscv.rs
+++ b/esp-wifi/src/timer/riscv.rs
@@ -13,9 +13,9 @@ use crate::{
     preempt::preempt::task_switch,
 };
 
-#[cfg(feature = "esp32c6")]
+#[cfg(any(feature = "esp32c6", feature = "esp32h2"))]
 use peripherals::INTPRI as SystemPeripheral;
-#[cfg(not(feature = "esp32c6"))]
+#[cfg(not(any(feature = "esp32c6", feature = "esp32h2")))]
 use peripherals::SYSTEM as SystemPeripheral;
 
 /// The timer responsible for time slicing.
diff --git a/esp-wifi/src/timer/timer_esp32h2.rs b/esp-wifi/src/timer/timer_esp32h2.rs
new file mode 100644
index 00000000..b77cd813
--- /dev/null
+++ b/esp-wifi/src/timer/timer_esp32h2.rs
@@ -0,0 +1,62 @@
+use crate::{
+    binary,
+    hal::{interrupt, macros::interrupt, peripherals::Interrupt},
+};
+
+pub fn setup_radio_isr() {
+    #[cfg(feature = "ble")]
+    {
+        unwrap!(interrupt::enable(
+            Interrupt::LP_BLE_TIMER,
+            interrupt::Priority::Priority1
+        ));
+        unwrap!(interrupt::enable(
+            Interrupt::BT_MAC,
+            interrupt::Priority::Priority1
+        ));
+    }
+}
+
+#[cfg(feature = "ble")]
+#[interrupt]
+fn LP_BLE_TIMER() {
+    unsafe {
+        trace!("LP_TIMER interrupt");
+
+        let (fnc, arg) = crate::ble::npl::ble_os_adapter_chip_specific::ISR_INTERRUPT_3;
+
+        trace!("interrupt LP_TIMER {:?} {:?}", fnc, arg);
+
+        if !fnc.is_null() {
+            trace!("interrupt LP_TIMER call");
+
+            let fnc: fn(*mut binary::c_types::c_void) = core::mem::transmute(fnc);
+            fnc(arg);
+            trace!("LP_TIMER done");
+        }
+
+        trace!("interrupt LP_TIMER done");
+    };
+}
+
+#[cfg(feature = "ble")]
+#[interrupt]
+fn BT_MAC() {
+    unsafe {
+        trace!("BT_MAC interrupt");
+
+        let (fnc, arg) = crate::ble::npl::ble_os_adapter_chip_specific::ISR_INTERRUPT_15;
+
+        trace!("interrupt BT_MAC {:?} {:?}", fnc, arg);
+
+        if !fnc.is_null() {
+            trace!("interrupt BT_MAC call");
+
+            let fnc: fn(*mut binary::c_types::c_void) = core::mem::transmute(fnc);
+            fnc(arg);
+            trace!("BT_MAC done");
+        }
+
+        trace!("interrupt BT_MAC done");
+    };
+}
diff --git a/esp-wifi/src/wifi/mod.rs b/esp-wifi/src/wifi/mod.rs
index 1922880b..f5ec650d 100644
--- a/esp-wifi/src/wifi/mod.rs
+++ b/esp-wifi/src/wifi/mod.rs
@@ -508,7 +508,7 @@ static g_wifi_osi_funcs: wifi_osi_funcs_t = wifi_osi_funcs_t {
     _coex_schm_interval_get: Some(coex_schm_interval_get),
     _coex_schm_curr_period_get: Some(coex_schm_curr_period_get),
     _coex_schm_curr_phase_get: Some(coex_schm_curr_phase_get),
-    #[cfg(any(esp32c3, esp32c2, esp32c6, esp32s3, esp32s2,))]
+    #[cfg(any(esp32c3, esp32c2, esp32c6, esp32h2, esp32s3, esp32s2))]
     _slowclk_cal_get: Some(slowclk_cal_get),
     #[cfg(any(esp32, esp32s2))]
     _phy_common_clock_disable: Some(os_adapter_chip_specific::phy_common_clock_disable),
diff --git a/esp-wifi/src/wifi/os_adapter.rs b/esp-wifi/src/wifi/os_adapter.rs
index 7b26e33c..2afffa25 100644
--- a/esp-wifi/src/wifi/os_adapter.rs
+++ b/esp-wifi/src/wifi/os_adapter.rs
@@ -1,6 +1,7 @@
 #[cfg_attr(esp32c3, path = "os_adapter_esp32c3.rs")]
 #[cfg_attr(esp32c2, path = "os_adapter_esp32c2.rs")]
 #[cfg_attr(esp32c6, path = "os_adapter_esp32c6.rs")]
+#[cfg_attr(esp32h2, path = "os_adapter_esp32h2.rs")]
 #[cfg_attr(esp32, path = "os_adapter_esp32.rs")]
 #[cfg_attr(esp32s3, path = "os_adapter_esp32s3.rs")]
 #[cfg_attr(esp32s2, path = "os_adapter_esp32s2.rs")]
@@ -2044,7 +2045,7 @@ pub unsafe extern "C" fn slowclk_cal_get() -> u32 {
     #[cfg(esp32c2)]
     return 28639;
 
-    #[cfg(esp32c6)]
+    #[cfg(any(esp32c6, esp32h2))]
     return 0;
 
     #[cfg(esp32)]
diff --git a/esp-wifi/src/wifi/os_adapter_esp32h2.rs b/esp-wifi/src/wifi/os_adapter_esp32h2.rs
new file mode 100644
index 00000000..06ae1d58
--- /dev/null
+++ b/esp-wifi/src/wifi/os_adapter_esp32h2.rs
@@ -0,0 +1,95 @@
+use crate::hal::{peripherals, riscv};
+
+pub(crate) fn chip_ints_on(mask: u32) {
+    unsafe {
+        (*peripherals::INTPRI::PTR)
+            .cpu_int_enable
+            .modify(|r, w| w.bits(r.bits() | mask));
+    }
+}
+
+pub(crate) fn chip_ints_off(mask: u32) {
+    unsafe {
+        (*peripherals::INTPRI::PTR)
+            .cpu_int_enable
+            .modify(|r, w| w.bits(r.bits() & !mask));
+    }
+}
+
+pub(crate) unsafe extern "C" fn wifi_int_disable(
+    wifi_int_mux: *mut crate::binary::c_types::c_void,
+) -> u32 {
+    let res = if riscv::register::mstatus::read().mie() {
+        1
+    } else {
+        0
+    };
+    riscv::interrupt::disable();
+
+    trace!(
+        "wifi_int_disable wifi_int_mux {:?} - return {}",
+        wifi_int_mux,
+        res,
+    );
+
+    res
+}
+
+pub(crate) unsafe extern "C" fn wifi_int_restore(
+    wifi_int_mux: *mut crate::binary::c_types::c_void,
+    tmp: u32,
+) {
+    trace!(
+        "wifi_int_restore wifi_int_mux {:?} tmp {}",
+        wifi_int_mux,
+        tmp
+    );
+
+    if tmp == 1 {
+        riscv::interrupt::enable();
+    }
+}
+
+pub(crate) unsafe extern "C" fn set_intr(
+    _cpu_no: i32,
+    _intr_source: u32,
+    _intr_num: u32,
+    _intr_prio: i32,
+) {
+    // this gets called with
+    // INFO - set_intr 0 2 1 1 (WIFI_PWR)
+    // INFO - set_intr 0 0 1 1 (WIFI_MAC)
+
+    // we do nothing here since all the interrupts are already
+    // configured in `setup_timer_isr` and messing with the interrupts will
+    // get us into trouble
+}
+
+pub(crate) unsafe extern "C" fn regdma_link_set_write_wait_content_dummy(
+    _arg1: *mut esp_wifi_sys::c_types::c_void,
+    _arg2: u32,
+    _arg3: u32,
+) {
+    todo!()
+}
+
+pub(crate) unsafe extern "C" fn sleep_retention_find_link_by_id_dummy(
+    _arg1: esp_wifi_sys::c_types::c_int,
+) -> *mut esp_wifi_sys::c_types::c_void {
+    todo!()
+}
+
+pub(crate) unsafe extern "C" fn sleep_retention_entries_create_dummy(
+    _arg1: *const esp_wifi_sys::c_types::c_void,
+    _arg2: esp_wifi_sys::c_types::c_int,
+    _arg3: esp_wifi_sys::c_types::c_int,
+    _arg4: esp_wifi_sys::c_types::c_int,
+) -> esp_wifi_sys::c_types::c_int {
+    todo!()
+}
+
+pub(crate) unsafe extern "C" fn sleep_retention_entries_destroy_dummy(
+    _arg1: esp_wifi_sys::c_types::c_int,
+) {
+    todo!()
+}
diff --git a/examples-util/util.rs b/examples-util/util.rs
index cad5e3f3..95db5f65 100644
--- a/examples-util/util.rs
+++ b/examples-util/util.rs
@@ -8,12 +8,19 @@ pub use esp32c2_hal as hal;
 pub use esp32c3_hal as hal;
 #[cfg(feature = "esp32c6")]
 pub use esp32c6_hal as hal;
+#[cfg(feature = "esp32h2")]
+pub use esp32h2_hal as hal;
 #[cfg(feature = "esp32s2")]
 pub use esp32s2_hal as hal;
 #[cfg(feature = "esp32s3")]
 pub use esp32s3_hal as hal;
 
-#[cfg(any(feature = "esp32c2", feature = "esp32c3", feature = "esp32c6"))]
+#[cfg(any(
+    feature = "esp32c2",
+    feature = "esp32c3",
+    feature = "esp32c6",
+    feature = "esp32h2"
+))]
 pub type BootButton = crate::hal::gpio::Gpio9<crate::hal::gpio::Input<crate::hal::gpio::PullDown>>;
 #[cfg(any(feature = "esp32", feature = "esp32s2", feature = "esp32s3"))]
 pub type BootButton = crate::hal::gpio::Gpio0<crate::hal::gpio::Input<crate::hal::gpio::PullDown>>;
@@ -24,6 +31,8 @@ pub const SOC_NAME: &str = "ESP32-C3";
 pub const SOC_NAME: &str = "ESP32-C2";
 #[cfg(feature = "esp32c6")]
 pub const SOC_NAME: &str = "ESP32-C6";
+#[cfg(feature = "esp32h2")]
+pub const SOC_NAME: &str = "ESP32-H2";
 #[cfg(feature = "esp32")]
 pub const SOC_NAME: &str = "ESP32";
 #[cfg(feature = "esp32s3")]
diff --git a/run_tests.bat b/run_tests.bat
index 4c8f6321..eee566de 100644
--- a/run_tests.bat
+++ b/run_tests.bat
@@ -71,8 +71,11 @@ copy ..\target\riscv32imac-unknown-none-elf\release\examples\open_access_point .
 copy ..\target\riscv32imac-unknown-none-elf\release\examples\test_connect ..\tmp\esp32c6
 copy ..\target\riscv32imac-unknown-none-elf\release\examples\test_ble ..\tmp\esp32c6
 
+cargo +nightly build --release --example test_ble --target riscv32imac-unknown-none-elf --no-default-features --features esp32h2,esp32h2-hal/default,esp32h2-hal/embassy-time-timg0,ble
+copy ..\target\riscv32imac-unknown-none-elf\release\examples\test_ble ..\tmp\esp32h2
+
 cd ..\tmp
-echo "Connect ESP32, ESP32-C2, ESP32-C3, ESP32-C6"
+echo "Connect ESP32, ESP32-C2, ESP32-C3, ESP32-C6, ESP32-H2"
 pause
 esp-testrun --esp32=esp32 --esp32c2=esp32c2 --esp32c3=esp32c3 --esp32c6=esp32c6
 
diff --git a/smoketest.bat b/smoketest.bat
index 0278d533..2b3824f5 100644
--- a/smoketest.bat
+++ b/smoketest.bat
@@ -99,3 +99,10 @@ cargo +nightly esp32c6 --example esp_now --release --features "esp-now"
 cargo +nightly esp32c6 --example embassy_esp_now --release --features "async,esp-now"
 cargo +nightly esp32c6 --example access_point --release --features "wifi"
 cargo +nightly esp32c6 --example embassy_access_point --release --features "async,wifi,embassy-net"
+
+set CARGO_PROFILE_RELEASE_OPT_LEVEL=3
+echo.
+echo Connect ESP32-H2
+pause
+cargo +nightly esp32h2 --example ble --release --no-default-features --features "ble"
+cargo +nightly esp32h2 --example embassy_ble --release --no-default-features  --features "async,ble"
\ No newline at end of file