From eb54c8a4e34b92a9a72739f5d4ec852116908122 Mon Sep 17 00:00:00 2001 From: flysand7 Date: Sat, 5 Oct 2024 20:30:36 +1100 Subject: [PATCH] Make nasm the new default intel flavor --- src/disasm-cli/main.odin | 5 +- src/disasm/print.odin | 2 - src/disasm/print_intel.odin | 26 ++++--- src/disasm/print_nasm.odin | 140 ------------------------------------ 4 files changed, 19 insertions(+), 154 deletions(-) delete mode 100644 src/disasm/print_nasm.odin diff --git a/src/disasm-cli/main.odin b/src/disasm-cli/main.odin index 837c733..a7cc394 100644 --- a/src/disasm-cli/main.odin +++ b/src/disasm-cli/main.odin @@ -22,7 +22,6 @@ Options: Specify the assembly output flavor. Options: * intel (default) - Print x86 disasm's intel-style assembly. * att - Print AT&T style assembly, like in gas. - * nasm - Print assembly that tries to match ndisasm output as much as possible. -format: Specify the format of the input file. Options: * auto (default) - Auto-detect a format (the default). @@ -249,7 +248,9 @@ main :: proc() { switch str { case "intel": print_flavor = .Intel case "att": print_flavor = .ATT - case "nasm": print_flavor = .Nasm + case: + fmt.eprintfln("Unknown syntax flavor: %s", str) + os.exit(2) } } else { fmt.eprintfln("The -flavor option expects a string") diff --git a/src/disasm/print.odin b/src/disasm/print.odin index ab98854..6d266d2 100644 --- a/src/disasm/print.odin +++ b/src/disasm/print.odin @@ -5,14 +5,12 @@ import "core:io" Syntax_Variant :: enum { Intel, ATT, - Nasm, } print_one :: proc(w: io.Writer, addr: u64, inst: Instruction, syntax: Syntax_Variant) -> io.Error { switch syntax { case .Intel: return print_intel(w, addr, inst) case .ATT: return print_att(w, addr, inst) - case .Nasm: return print_nasm(w, addr, inst) case: panic("Unexpected syntax variant supplied.") } return .None diff --git a/src/disasm/print_intel.odin b/src/disasm/print_intel.odin index a94fe3b..6857627 100644 --- a/src/disasm/print_intel.odin +++ b/src/disasm/print_intel.odin @@ -21,6 +21,12 @@ print_intel_rm_op :: proc(w: io.Writer, rm: RM_Op) -> (err: io.Error) { io.write_string(w, gpreg_name(rm.size, rm.reg)) or_return case .Mem_Addr_8, .Mem_Addr_16, .Mem_Addr_32: reg_size := u8(2) if rm.kind == .Mem_Addr_16 else 4 + switch rm.size { + case 1: io.write_string(w, "byte ") + case 2: io.write_string(w, "word ") + case 4: io.write_string(w, "dword ") + case 8: io.write_string(w, "oword ") + } io.write_byte(w, '[') np := 0 if rm.base_reg != REG_NONE { @@ -62,25 +68,25 @@ print_intel_eop :: proc(w: io.Writer, addr: u64, inst: Instruction) -> (err: io. case .None: unreachable() case .Imm: switch eop.size { - case 1: fmt.wprintf(w, "%#.2x", eop.lo) - case 2: fmt.wprintf(w, "%#.4x", eop.lo) - case 4: fmt.wprintf(w, "%#.8x", eop.lo) - case 8: fmt.wprintf(w, "%#.16x", eop.lo) + case 1: fmt.wprintf(w, "%#02x", eop.lo) + case 2: fmt.wprintf(w, "%#04x", eop.lo) + case 4: fmt.wprintf(w, "%#08x", eop.lo) + case 8: fmt.wprintf(w, "%#016x", eop.lo) case: panic("Unkown extra operand size") } case .SAddr: - fmt.wprintf(w, "%#.2x", u8(eop.lo)) + fmt.wprintf(w, "%#02x", u8(eop.lo)) case .NAddr: switch eop.size { - case 2: fmt.wprintf(w, "%#.4x", u16(addr+u64(inst.size)+eop.lo)) - case 4: fmt.wprintf(w, "%#.8x", u32(addr+u64(inst.size)+eop.lo)) + case 2: fmt.wprintf(w, "%#04x", u16(addr+u64(inst.size)+eop.lo)) + case 4: fmt.wprintf(w, "%#08x", u32(addr+u64(inst.size)+eop.lo)) case: panic("Unknown extra operand size") } case .FAddr: - fmt.wprintf(w, "%#.2x:", eop.hi) + fmt.wprintf(w, "%#02x:", eop.hi) switch eop.size { - case 2: fmt.wprintf(w, "%#.4x", u16(eop.lo)) - case 4: fmt.wprintf(w, "%#.8x", u32(eop.lo)) + case 2: fmt.wprintf(w, "%#04x", u16(eop.lo)) + case 4: fmt.wprintf(w, "%#08x", u32(eop.lo)) case: panic("Unknown extra operand size") } } diff --git a/src/disasm/print_nasm.odin b/src/disasm/print_nasm.odin deleted file mode 100644 index 25aa440..0000000 --- a/src/disasm/print_nasm.odin +++ /dev/null @@ -1,140 +0,0 @@ -package x86_disasm - -import "core:io" -import "core:fmt" - -print_nasm_rx_op :: proc(w: io.Writer, rx: RX_Op) -> (err: io.Error) { - assert(rx.kind != .None, "Function must be called with rx operand present") - switch rx.kind { - case .None: panic("Unknown rx register kind") - case .GPReg: io.write_string(w, gpreg_name(rx.size, rx.reg)) or_return - case .SReg: io.write_string(w, sreg_name(rx.size, rx.reg)) or_return - } - return nil -} - -print_nasm_rm_op :: proc(w: io.Writer, rm: RM_Op) -> (err: io.Error) { - assert(rm.kind != nil, "Function must be called when rm operand present") - switch rm.kind { - case .None: unreachable() - case .GPReg: - io.write_string(w, gpreg_name(rm.size, rm.reg)) or_return - case .Mem_Addr_8, .Mem_Addr_16, .Mem_Addr_32: - reg_size := u8(2) if rm.kind == .Mem_Addr_16 else 4 - switch rm.size { - case 1: io.write_string(w, "byte ") - case 2: io.write_string(w, "word ") - case 4: io.write_string(w, "dword ") - case 8: io.write_string(w, "oword ") - } - io.write_byte(w, '[') - np := 0 - if rm.base_reg != REG_NONE { - io.write_string(w, gpreg_name(reg_size, rm.base_reg)) or_return - np += 1 - } - if rm.index_reg != REG_NONE { - if np > 0 { - io.write_byte(w, '+') or_return - } - io.write_string(w, gpreg_name(reg_size, rm.index_reg)) or_return - np += 1 - } - if rm.scale != 1 { - assert(rm.index_reg != REG_NONE) - io.write_byte(w, '*') or_return - io.write_int(w, int(rm.scale)) or_return - } - if np == 0 || rm.disp != 0 { - if np > 0 && rm.disp >= 0 { - io.write_byte(w, '+') or_return - } - if rm.kind == .Mem_Addr_16 { - fmt.wprintf(w, "%#.4x", i16(rm.disp)) - } else { - fmt.wprintf(w, "%#.8x", rm.disp) - } - np += 1 - } - io.write_byte(w, ']') - } - return nil -} - -print_nasm_eop :: proc(w: io.Writer, addr: u64, inst: Instruction) -> (err: io.Error) { - eop := inst.extra_op - assert(eop.kind != .None, "Function should be called when extra operand present") - switch eop.kind { - case .None: unreachable() - case .Imm: - switch eop.size { - case 1: fmt.wprintf(w, "%#02x", eop.lo) - case 2: fmt.wprintf(w, "%#04x", eop.lo) - case 4: fmt.wprintf(w, "%#08x", eop.lo) - case 8: fmt.wprintf(w, "%#016x", eop.lo) - case: panic("Unkown extra operand size") - } - case .SAddr: - fmt.wprintf(w, "%#02x", u8(eop.lo)) - case .NAddr: - switch eop.size { - case 2: fmt.wprintf(w, "%#04x", u16(addr+u64(inst.size)+eop.lo)) - case 4: fmt.wprintf(w, "%#08x", u32(addr+u64(inst.size)+eop.lo)) - case: panic("Unknown extra operand size") - } - case .FAddr: - fmt.wprintf(w, "%#02x:", eop.hi) - switch eop.size { - case 2: fmt.wprintf(w, "%#04x", u16(eop.lo)) - case 4: fmt.wprintf(w, "%#08x", u32(eop.lo)) - case: panic("Unknown extra operand size") - } - } - return nil -} - -print_nasm :: proc(w: io.Writer, addr: u64, inst: Instruction) -> (err: io.Error) { - io.write_string(w, mnemonic_table[inst.mnemonic]) or_return - if inst.flags >= {.Far} { - io.write_string(w, " far") or_return - } - n := 0 - if .Direction_Bit not_in inst.flags { - if inst.rm_op.kind != .None { - io.write_byte(w, ' ') or_return - print_nasm_rm_op(w, inst.rm_op) or_return - n += 1 - } - if inst.rx_op.kind != .None { - if n > 0 { - io.write_byte(w, ',') or_return - } - io.write_byte(w, ' ') or_return - print_nasm_rx_op(w, inst.rx_op) or_return - n += 1 - } - } else { - if inst.rx_op.kind != .None { - io.write_byte(w, ' ') or_return - print_nasm_rx_op(w, inst.rx_op) or_return - n += 1 - } - if inst.rm_op.kind != .None { - if n > 0 { - io.write_byte(w, ',') or_return - } - io.write_byte(w, ' ') or_return - print_nasm_rm_op(w, inst.rm_op) or_return - n += 1 - } - } - if inst.extra_op.kind != nil { - if n > 0 { - io.write_byte(w, ',') or_return - } - io.write_byte(w, ' ') or_return - print_nasm_eop(w, addr, inst) or_return - n += 1 - } - return .None -}