Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

FPGA Board #26

Open
toblaroni opened this issue Feb 21, 2024 · 3 comments
Open

FPGA Board #26

toblaroni opened this issue Feb 21, 2024 · 3 comments

Comments

@toblaroni
Copy link

What FPGA board would be sufficient to do this course?

@maxgraffv
Copy link

maxgraffv commented Feb 21, 2024

I think Geohot used Xilinx Arty (Artix 7)
That would surely be a really good choice

@willlogs
Copy link

willlogs commented Apr 9, 2024

I am working on making it happen on a cheap Sipeed Nano 9k
So far I have my RISC-V and things are going good.

You can follow it here: https://corelayer.pro

@m0sys
Copy link

m0sys commented Apr 9, 2024

Here's a start - did both of them back in 2020. Hotz inspired me with the Risc-V and its been going on since then. mips, nand-tools. Also wanted to do Risc-V one but the idea is the same. Just different instruction encodings. I also built a single cycle without and pipeline in VHDL recent. If anyone is interested I can open source it.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

4 participants