.travis.yml

sudo: required
language: python
os: linux
addons:
  apt:
    update: false
    packages:
      - lib32z1
      - lib32stdc++6
      - libexpat1:i386
      - libc6:i386
      - libsm6:i386
      - libncurses5:i386
      - libx11-6:i386
      - zlib1g:i386
      - libxext6:i386
      - libxft2:i386

install:
    - pip install -r requirements.txt
    - stat /home/travis/intelFPGA/19.1/modelsim_ase || (curl 'http://download.altera.com/akdlm/software/acdsinst/19.1std/670/ib_installers/ModelSimSetup-19.1.0.670-linux.run' -o ModelSimSetup.run && chmod +x ModelSimSetup.run && travis_wait 30 ./ModelSimSetup.run --mode unattended --accept_eula 1 && sed -i 's/linux_rh60/linux/g' /home/travis/intelFPGA/19.1/modelsim_ase/vco )
script:
    - export PATH=$PATH:/home/travis/intelFPGA/19.1/modelsim_ase/bin
    - cd ./sim/master_tb/ && hdlmake fetch && hdlmake && make
    - cd -
    - cd ./sim/slow_core_tb/ && hdlmake fetch && hdlmake && make
    - cd -
    - cd ./sim/fast_core_tb/ && hdlmake fetch && hdlmake && make
    - cd -
    - cd ./sim/clock_tb/ && hdlmake fetch && hdlmake && make

cache:
    directories:
        - /home/travis/intelFPGA/