From 8759803036e171214c8ada3062cd5ad571a65f2d Mon Sep 17 00:00:00 2001
From: Frances Wingerter <fw@immunant.com>
Date: Tue, 1 Oct 2024 14:30:09 -0400
Subject: [PATCH] try to avoid tagging sp-relative accesses

sp-relative instructions do not enforce MTE

we check this by seeing if the pointer operand is an AllocaInst; I'm not 100% sure this is sufficient but it seems so thus far
---
 llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp b/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp
index 2929706aa23e..47ea934f477f 100644
--- a/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp
+++ b/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp
@@ -47,9 +47,13 @@ AArch64LoadStoreTaggingPass::run(Function &F, FunctionAnalysisManager &AM) {
       StoreInst *SI = dyn_cast<StoreInst>(&*I);
       LoadInst *LI = dyn_cast<LoadInst>(&*I);
       if (LI || SI) {
+        Value *Pointer = SI ? SI->getPointerOperand() : LI->getPointerOperand();
+        if (AllocaInst *AI = dyn_cast<AllocaInst>(Pointer)) {
+          continue;
+        }
+
         IRBuilder<> IRB(&*I);
         Value *ReadX18 = readRegister(IRB, "x18");
-        Value *Pointer = SI ? SI->getPointerOperand() : LI->getPointerOperand();
         Value *PtrToInt = IRB.CreatePtrToInt(Pointer, IntptrTy, "makeint");
 
         Value *And = IRB.CreateAnd(ReadX18, TopEightBitsSet, "andhighbitmask");