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CLOCK-00A0.dts
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CLOCK-00A0.dts
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/dts-v1/;
/plugin/;
#include <dt-bindings/board/am335x-bbw-bbb-base.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/am33xx.h>
/ {
compatible = "ti,beaglebone", "ti,beaglebone-black", "ti,beaglebone-green";
/* identification */
part-number = "CLOCK";
version = "00A0";
exclusive-use =
"P9.11", "P9.13", "P9.15", "uart4", // gps and pps
"P9.17", "P9.18", "P9.21", "P9.22", "spi0", // spi display
"P9.19", "P9.20", "i2c2", "P9.12", "P9.14", // rtc (2 pps pins, DS3231's 32KHz and SQW)
"P9.24", "P9.26", "P9.23", "uart1"; // gps2 and pps
fragment@0 {
target = <&ocp>;
__overlay__ {
P9_11_pinmux { status = "disabled"; };
P9_13_pinmux { status = "disabled"; };
P9_15_pinmux { status = "disabled"; };
P9_17_pinmux { status = "disabled"; };
P9_18_pinmux { status = "disabled"; };
P9_21_pinmux { status = "disabled"; };
P9_22_pinmux { status = "disabled"; };
P9_19_pinmux { status = "disabled"; };
P9_20_pinmux { status = "disabled"; };
P9_12_pinmux { status = "disabled"; };
P9_14_pinmux { status = "disabled"; };
P9_24_pinmux { status = "disabled"; };
P9_26_pinmux { status = "disabled"; };
P9_23_pinmux { status = "disabled"; };
};
};
fragment@1 {
target = <&am33xx_pinmux>;
__overlay__ {
bb_uart4_pins: pinmux_bb_uart4_pins {
pinctrl-single,pins = <
BONE_P9_13 (PIN_OUTPUT | MUX_MODE6)
BONE_P9_11 (PIN_INPUT | MUX_MODE6)
>;
};
bb_gps_pps_pins: pinmux_bb_gps_pps_pins {
pinctrl-single,pins = <
BONE_P9_15 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
bb_uart1_pins: pinmux_bb_uart1_pins {
pinctrl-single,pins = <
BONE_P9_24 (PIN_OUTPUT | MUX_MODE0)
BONE_P9_26 (PIN_INPUT | MUX_MODE0)
>;
};
bb_gps2_pps_pins: pinmux_bb_gps2_pps_pins {
pinctrl-single,pins = <
BONE_P9_23 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
bb_spi0_pins: pinmux_bb_spi0_pins {
pinctrl-single,pins = <
BONE_P9_22 (PIN_INPUT_PULLUP | MUX_MODE0)
BONE_P9_21 (PIN_INPUT_PULLUP | MUX_MODE0)
BONE_P9_18 (PIN_OUTPUT_PULLUP | MUX_MODE0)
BONE_P9_17 (PIN_OUTPUT_PULLUP | MUX_MODE0)
>;
};
bb_i2c2_pins: pinmux_bb_i2c2_pins {
pinctrl-single,pins = <
BONE_P9_20 (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3)
BONE_P9_19 (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3)
>;
};
bb_rtc_pps_pins: pinmux_bb_rtc_pps_pins {
pinctrl-single,pins = <
BONE_P9_14 (PIN_INPUT_PULLUP | MUX_MODE7)
>;
};
bb_rtc_32k_pins: pinmux_bb_rtc_32k_pins {
pinctrl-single,pins = <
BONE_P9_12 (PIN_INPUT_PULLUP | MUX_MODE7)
>;
};
};
};
fragment@2 {
target = <&uart4>;
__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&bb_uart4_pins>;
};
};
fragment@12 {
target = <&uart1>;
__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&bb_uart1_pins>;
};
};
fragment@3 {
target = <&ocp>;
__overlay__ {
gps_pps {
status = "okay";
compatible = "pps-gpio";
pinctrl-names = "default";
pinctrl-0 = <&bb_gps_pps_pins>;
gpios = <&gpio1 16 0>;
};
rtc_pps {
status = "okay";
compatible = "pps-gpio";
pinctrl-names = "default";
pinctrl-0 = <&bb_rtc_pps_pins>;
gpios = <&gpio1 18 0>;
};
gps2_pps {
status = "okay";
compatible = "pps-gpio";
pinctrl-names = "default";
pinctrl-0 = <&bb_gps2_pps_pins>;
gpios = <&gpio1 17 0>;
};
};
};
fragment@4 {
target = <&spi0>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&bb_spi0_pins>;
display@0 {
status = "okay";
compatible = "spidev";
spi-max-frequency = <1000000>;
spi-cpha = <1>;
spi-cpol = <1>;
reg = <0>;
};
};
};
fragment@5 {
target = <&i2c2>;
__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&bb_i2c2_pins>;
clock-frequency = <400000>;
#address-cells = <1>;
#size-cells = <0>;
ds3231: ds3231@51 {
status = "okay";
compatible = "maxim,ds3231";
reg = <0x68>;
#clock-cells = <1>;
};
};
};
fragment@6 {
target-path="/";
__overlay__ {
aliases {
rtc0 = "/ocp/i2c@4819c000/ds3231@51";
rtc1 = "/ocp/rtc@44e3e000";
};
};
};
};