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opcodes: add first batch of community syntax definitions
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@xen0n
xen0n committed Aug 3, 2021
1 parent 933da62 commit a4383d5
Showing 1 changed file with 32 additions and 32 deletions.
64 changes: 32 additions & 32 deletions opcodes/loongarch-opc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -295,23 +295,23 @@ static struct loongarch_opcode loongarch_fix_opcodes[] =
{ 0x00003c00, 0xfffffc00, "revb.d", NULL, "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00004000, 0xfffffc00, "revh.2w", NULL, "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00004400, 0xfffffc00, "revh.d", NULL, "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00004800, 0xfffffc00, "bitrev.4b", NULL, "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00004c00, 0xfffffc00, "bitrev.8b", NULL, "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00005000, 0xfffffc00, "bitrev.w", NULL, "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00005400, 0xfffffc00, "bitrev.d", NULL, "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00005800, 0xfffffc00, "ext.w.h", NULL, "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00005c00, 0xfffffc00, "ext.w.b", NULL, "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00004800, 0xfffffc00, "bitrev.4b", "revbit.4b", "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00004c00, 0xfffffc00, "bitrev.8b", "revbit.8b", "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00005000, 0xfffffc00, "bitrev.w", "revbit.w", "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00005400, 0xfffffc00, "bitrev.d", "revbit.d", "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00005800, 0xfffffc00, "ext.w.h", "sext.h", "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00005c00, 0xfffffc00, "ext.w.b", "sext.b", "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00150000, 0xfffffc00, "move", NULL, "r0:5,r5:5", NULL, 0 /* or %1,%2,$r0 */, 0, 0, 0 },
{ 0x00006000, 0xfffffc00, "rdtimel.w", NULL, "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00006400, 0xfffffc00, "rdtimeh.w", NULL, "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00006800, 0xfffffc00, "rdtime.d", NULL, "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00006000, 0xfffffc00, "rdtimel.w", "rdtickl.w", "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00006400, 0xfffffc00, "rdtimeh.w", "rdtickh.w", "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00006800, 0xfffffc00, "rdtime.d", "rdtick.d", "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00006c00, 0xfffffc00, "cpucfg", NULL, "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x00010000, 0xffff801f, "asrtle.d", NULL, "r5:5,r10:5", NULL, 0, 0, 0, 0 },
{ 0x00018000, 0xffff801f, "asrtgt.d", NULL, "r5:5,r10:5", NULL, 0, 0, 0, 0 },
{ 0x00040000, 0xfffe0000, "alsl.w", NULL, "r0:5,r5:5,r10:5,u15:2+1", NULL, 0, 0, 0, 0 },
{ 0x00060000, 0xfffe0000, "alsl.wu", NULL, "r0:5,r5:5,r10:5,u15:2+1", NULL, 0, 0, 0, 0 },
{ 0x00080000, 0xfffe0000, "bytepick.w", NULL, "r0:5,r5:5,r10:5,u15:2", NULL, 0, 0, 0,0 },
{ 0x000c0000, 0xfffc0000, "bytepick.d", NULL, "r0:5,r5:5,r10:5,u15:3", NULL, 0, 0, 0,0 },
{ 0x00010000, 0xffff801f, "asrtle.d", "asrtle", "r5:5,r10:5", NULL, 0, 0, 0, 0 },
{ 0x00018000, 0xffff801f, "asrtgt.d", "asrtgt", "r5:5,r10:5", NULL, 0, 0, 0, 0 },
{ 0x00040000, 0xfffe0000, "alsl.w", "sladd.w", "r0:5,r5:5,r10:5,u15:2+1", "r0:5,r5:5,r10:5,u15:2", 0, 0, 0, 0 },
{ 0x00060000, 0xfffe0000, "alsl.wu", "sladd.wu", "r0:5,r5:5,r10:5,u15:2+1", "r0:5,r5:5,r10:5,u15:2", 0, 0, 0, 0 },
{ 0x00080000, 0xfffe0000, "bytepick.w", "catpick.w", "r0:5,r5:5,r10:5,u15:2", NULL, 0, 0, 0,0 },
{ 0x000c0000, 0xfffc0000, "bytepick.d", "catpick.d", "r0:5,r5:5,r10:5,u15:3", NULL, 0, 0, 0,0 },
{ 0x00100000, 0xffff8000, "add.w", NULL, "r0:5,r5:5,r10:5", NULL, 0, 0, 0, 0 },
{ 0x00108000, 0xffff8000, "add.d", NULL, "r0:5,r5:5,r10:5", NULL, 0, 0, 0, 0 },
{ 0x00110000, 0xffff8000, "sub.w", NULL, "r0:5,r5:5,r10:5", NULL, 0, 0, 0, 0 },
Expand Down Expand Up @@ -359,9 +359,9 @@ static struct loongarch_opcode loongarch_fix_opcodes[] =
{ 0x00270000, 0xffff8000, "crcc.w.w.w", NULL, "r0:5,r5:5,r10:5", NULL, 0, 0, 0, 0 },
{ 0x00278000, 0xffff8000, "crcc.w.d.w", NULL, "r0:5,r5:5,r10:5", NULL, 0, 0, 0, 0 },
{ 0x002a0000, 0xffff8000, "break", NULL, "u0:15", NULL, 0, 0, 0, 0 },
{ 0x002a8000, 0xffff8000, "dbcl", NULL, "u0:15", NULL, 0, 0, 0, 0 },
{ 0x002a8000, 0xffff8000, "dbcl", "dbgcall", "u0:15", NULL, 0, 0, 0, 0 },
{ 0x002b0000, 0xffff8000, "syscall", NULL, "u0:15", NULL, 0, 0, 0, 0 },
{ 0x002c0000, 0xfffe0000, "alsl.d", NULL, "r0:5,r5:5,r10:5,u15:2+1", NULL, 0, 0, 0, 0 },
{ 0x002c0000, 0xfffe0000, "alsl.d", "sladd.d", "r0:5,r5:5,r10:5,u15:2+1", "r0:5,r5:5,r10:5,u15:2", 0, 0, 0, 0 },
{ 0x00408000, 0xffff8000, "slli.w", NULL, "r0:5,r5:5,u10:5", NULL, 0, 0, 0, 0 },
{ 0x00410000, 0xffff0000, "slli.d", NULL, "r0:5,r5:5,u10:6", NULL, 0, 0, 0, 0 },
{ 0x00448000, 0xffff8000, "srli.w", NULL, "r0:5,r5:5,u10:5", NULL, 0, 0, 0, 0 },
Expand Down Expand Up @@ -422,12 +422,12 @@ static struct loongarch_opcode loongarch_float_opcodes[] =
{ 0x0114b400, 0xfffffc00, "movfr2gr.s", NULL, "r0:5,f5:5", NULL, 0, 0, 0, 0 },
{ 0x0114b800, 0xfffffc00, "movfr2gr.d", NULL, "r0:5,f5:5", NULL, 0, 0, 0, 0 },
{ 0x0114bc00, 0xfffffc00, "movfrh2gr.s", NULL, "r0:5,f5:5", NULL, 0, 0, 0, 0 },
{ 0x0114c000, 0xfffffc00, "movgr2fcsr", NULL, "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x0114c800, 0xfffffc00, "movfcsr2gr", NULL, "r0:5,r5:5", NULL, 0, 0, 0, 0 },
{ 0x0114d000, 0xfffffc18, "movfr2cf", NULL, "c0:3,f5:5", NULL, 0, 0, 0, 0 },
{ 0x0114d400, 0xffffff00, "movcf2fr", NULL, "f0:5,c5:3", NULL, 0, 0, 0, 0 },
{ 0x0114d800, 0xfffffc18, "movgr2cf", NULL, "c0:3,r5:5", NULL, 0, 0, 0, 0 },
{ 0x0114dc00, 0xffffff00, "movcf2gr", NULL, "r0:5,c5:3", NULL, 0, 0, 0, 0 },
{ 0x0114c000, 0xfffffc00, "movgr2fcsr", "fcsrwr", "r0:5,r5:5", "r5:5,u0:5", 0, 0, 0, 0 },
{ 0x0114c800, 0xfffffc00, "movfcsr2gr", "fcsrrd", "r0:5,r5:5", "r0:5,u5:5", 0, 0, 0, 0 },
{ 0x0114d000, 0xfffffc18, "movfr2cf", "movfr2fcc", "c0:3,f5:5", NULL, 0, 0, 0, 0 },
{ 0x0114d400, 0xffffff00, "movcf2fr", "movfcc2fr", "f0:5,c5:3", NULL, 0, 0, 0, 0 },
{ 0x0114d800, 0xfffffc18, "movgr2cf", "movgr2fcc", "c0:3,r5:5", NULL, 0, 0, 0, 0 },
{ 0x0114dc00, 0xffffff00, "movcf2gr", "movfcc2gr", "r0:5,c5:3", NULL, 0, 0, 0, 0 },
{ 0x01191800, 0xfffffc00, "fcvt.s.d", NULL, "f0:5,f5:5", NULL, 0, 0, 0, 0 },
{ 0x01192400, 0xfffffc00, "fcvt.d.s", NULL, "f0:5,f5:5", NULL, 0, 0, 0, 0 },
{ 0x011a0400, 0xfffffc00, "ftintrm.w.s", NULL, "f0:5,f5:5", NULL, 0, 0, 0, 0 },
Expand Down Expand Up @@ -466,15 +466,15 @@ static struct loongarch_opcode loongarch_lmm_opcodes[] =
{ 0x02400000, 0xffc00000, "sltui", NULL, "r0:5,r5:5,s10:12", NULL, 0, 0, 0, 0 },
{ 0x02800000, 0xffc00000, "addi.w", NULL, "r0:5,r5:5,s10:12", NULL, 0, 0, 0, 0 },
{ 0x02c00000, 0xffc00000, "addi.d", NULL, "r0:5,r5:5,s10:12", NULL, 0, 0, 0, 0 },
{ 0x03000000, 0xffc00000, "lu52i.d", NULL, "r0:5,r5:5,s10:12", NULL, 0, 0, 0, 0 },
{ 0x03000000, 0xffc00000, "lu52i.d", "cu52i.d", "r0:5,r5:5,s10:12", NULL, 0, 0, 0, 0 },
{ 0, 0, "nop", NULL, "", NULL, "andi $r0,$r0,0", NULL, 0, 0, 0 },
{ 0x03400000, 0xffc00000, "andi", NULL, "r0:5,r5:5,u10:12", NULL, 0, 0, 0, 0 },
{ 0x03800000, 0xffc00000, "ori", NULL, "r0:5,r5:5,u10:12", NULL, 0, 0, 0, 0 },
{ 0x03c00000, 0xffc00000, "xori", NULL, "r0:5,r5:5,u10:12", NULL, 0, 0, 0, 0 },
{ 0x10000000, 0xfc000000, "addu16i.d", NULL, "r0:5,r5:5,s10:16", NULL, 0, 0, 0, 0 },
{ 0x14000000, 0xfe000000, "lu12i.w", NULL, "r0:5,s5:20", NULL, 0, 0, 0, 0 },
{ 0x16000000, 0xfe000000, "lu32i.d", NULL, "r0:5,s5:20", NULL, 0, 0, 0, 0 },
{ 0x18000000, 0xfe000000, "pcaddi", NULL, "r0:5,s5:20", NULL, 0, 0, 0, 0 },
{ 0x16000000, 0xfe000000, "lu32i.d", "cu32i.d", "r0:5,s5:20", NULL, 0, 0, 0, 0 },
{ 0x18000000, 0xfe000000, "pcaddi", "pcaddu2i", "r0:5,s5:20", NULL, 0, 0, 0, 0 },
{ 0x1a000000, 0xfe000000, "pcalau12i", NULL, "r0:5,s5:20", NULL, 0, 0, 0, 0 },
{ 0x1c000000, 0xfe000000, "pcaddu12i", NULL, "r0:5,s5:20", NULL, 0, 0, 0, 0 },
{ 0x1e000000, 0xfe000000, "pcaddu18i", NULL, "r0:5,s5:20", NULL, 0, 0, 0, 0 },
Expand Down Expand Up @@ -504,9 +504,9 @@ static struct loongarch_opcode loongarch_privilege_opcodes[] =
{ 0x06482c00, 0xffffffff, "tlbrd", NULL, "", NULL, 0, 0, 0, 0 },
{ 0x06483000, 0xffffffff, "tlbwr", NULL, "", NULL, 0, 0, 0, 0 },
{ 0x06483400, 0xffffffff, "tlbfill", NULL, "", NULL, 0, 0, 0, 0 },
{ 0x06483800, 0xffffffff, "ertn", NULL, "", NULL, 0, 0, 0, 0 },
{ 0x06483800, 0xffffffff, "ertn", "eret", "", NULL, 0, 0, 0, 0 },
{ 0x06488000, 0xffff8000, "idle", NULL, "u0:15", NULL, 0, 0, 0, 0 },
{ 0x06498000, 0xffff8000, "invtlb", NULL, "u0:5,r5:5,r10:5", NULL, 0, 0, 0, 0 },
{ 0x06498000, 0xffff8000, "invtlb", "tlbinv", "u0:5,r5:5,r10:5", NULL, 0, 0, 0, 0 },
{ 0 } /* Terminate the list. */
};

Expand Down Expand Up @@ -584,10 +584,10 @@ static struct loongarch_opcode loongarch_load_store_opcodes[] =
{ 0x21000000, 0xff000000, "sc.w", NULL, "r0:5,r5:5,s10:14<<2", NULL, 0, 0, 0, 0 },
{ 0x22000000, 0xff000000, "ll.d", NULL, "r0:5,r5:5,s10:14<<2", NULL, 0, 0, 0, 0 },
{ 0x23000000, 0xff000000, "sc.d", NULL, "r0:5,r5:5,s10:14<<2", NULL, 0, 0, 0, 0 },
{ 0x24000000, 0xff000000, "ldptr.w", NULL, "r0:5,r5:5,s10:14<<2", NULL, 0, 0, 0, 0 },
{ 0x25000000, 0xff000000, "stptr.w", NULL, "r0:5,r5:5,s10:14<<2", NULL, 0, 0, 0, 0 },
{ 0x26000000, 0xff000000, "ldptr.d", NULL, "r0:5,r5:5,s10:14<<2", NULL, 0, 0, 0, 0 },
{ 0x27000000, 0xff000000, "stptr.d", NULL, "r0:5,r5:5,s10:14<<2", NULL, 0, 0, 0, 0 },
{ 0x24000000, 0xff000000, "ldptr.w", "ldox4.w", "r0:5,r5:5,s10:14<<2", "r0:5,r5:5,s10:14", 0, 0, 0, 0 },
{ 0x25000000, 0xff000000, "stptr.w", "stox4.w", "r0:5,r5:5,s10:14<<2", "r0:5,r5:5,s10:14", 0, 0, 0, 0 },
{ 0x26000000, 0xff000000, "ldptr.d", "ldox4.d", "r0:5,r5:5,s10:14<<2", "r0:5,r5:5,s10:14", 0, 0, 0, 0 },
{ 0x27000000, 0xff000000, "stptr.d", "stox4.d", "r0:5,r5:5,s10:14<<2", "r0:5,r5:5,s10:14", 0, 0, 0, 0 },
{ 0x28000000, 0xffc00000, "ld.b", NULL, "r0:5,r5:5,s10:12", NULL, 0, 0, 0, 0 },
{ 0x28400000, 0xffc00000, "ld.h", NULL, "r0:5,r5:5,s10:12", NULL, 0, 0, 0, 0 },
{ 0x28800000, 0xffc00000, "ld.w", NULL, "r0:5,r5:5,s10:12", NULL, 0, 0, 0, 0 },
Expand Down

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