From 737b7982cb540fe18874c21027ba0a973eaabe08 Mon Sep 17 00:00:00 2001 From: Kiran Upadhyayula Date: Tue, 25 Jul 2023 19:21:52 +0000 Subject: [PATCH] Merged PR 117214: Datavault/FLOW_STATUS register updates, JTAG access fix Includes: Data vault register reset and naming updates idevid_csr_ready bit in FLOW_STATUS reg Clock gating fix for JTAG accesses Related work items: #514552, #516969, #517437 --- src/datavault/rtl/dv.sv | 12 +- src/datavault/rtl/dv_defines_pkg.sv | 4 +- src/datavault/rtl/dv_reg.rdl | 36 +- src/datavault/rtl/dv_reg.sv | 124 ++-- src/datavault/rtl/dv_reg_pkg.sv | 48 +- src/datavault/rtl/dv_reg_uvm.sv | 96 +-- src/integration/rtl/caliptra_reg.h | 684 +++++++++--------- src/integration/rtl/caliptra_reg_defines.svh | 684 +++++++++--------- src/integration/rtl/caliptra_top.sv | 5 +- .../tb/caliptra_top_tb_services.sv | 18 + .../test_suites/libs/datavault/datavault.c | 62 +- .../smoke_test_clk_gating.c | 11 + .../smoke_test_datavault_mini.c | 10 +- src/libs/rtl/clk_gate.sv | 9 +- .../veer_el2/rtl/el2_veer_wrapper.sv | 2 + src/soc_ifc/rtl/caliptra_top_reg.h | 4 +- src/soc_ifc/rtl/caliptra_top_reg_defines.svh | 4 +- src/soc_ifc/rtl/soc_ifc_external_reg.rdl | 5 +- src/soc_ifc/rtl/soc_ifc_reg.sv | 37 +- src/soc_ifc/rtl/soc_ifc_reg_covergroups.svh | 4 +- src/soc_ifc/rtl/soc_ifc_reg_pkg.sv | 5 + src/soc_ifc/rtl/soc_ifc_reg_sample.svh | 6 +- src/soc_ifc/rtl/soc_ifc_reg_uvm.sv | 9 +- .../registers/soc_ifc_reg_model_top_pkg.sv | 1 + 24 files changed, 985 insertions(+), 895 deletions(-) diff --git a/src/datavault/rtl/dv.sv b/src/datavault/rtl/dv.sv index b725b9e11..a4f2e459f 100644 --- a/src/datavault/rtl/dv.sv +++ b/src/datavault/rtl/dv.sv @@ -104,17 +104,17 @@ always_comb begin: datavault end //Non-Sticky Data Vault Regs & Controls - for (int entry = 0; entry < NONSTICKY_DV_NUM_ENTRIES; entry++) begin - dv_reg_hwif_in.NonStickyDataVaultCtrl[entry].lock_entry.swwel = dv_reg_hwif_out.NonStickyDataVaultCtrl[entry].lock_entry.value; + for (int entry = 0; entry < DV_NUM_ENTRIES; entry++) begin + dv_reg_hwif_in.DataVaultCtrl[entry].lock_entry.swwel = dv_reg_hwif_out.DataVaultCtrl[entry].lock_entry.value; for (int dword = 0; dword < DV_NUM_DWORDS; dword++) begin - dv_reg_hwif_in.NONSTICKY_DATA_VAULT_ENTRY[entry][dword].data.swwel = dv_reg_hwif_out.NonStickyDataVaultCtrl[entry].lock_entry.value; + dv_reg_hwif_in.DATA_VAULT_ENTRY[entry][dword].data.swwel = dv_reg_hwif_out.DataVaultCtrl[entry].lock_entry.value; end end //Non-Sticky Generic Lockable Registers in the Data Vault - for (int entry = 0; entry < NONSTICKY_LOCK_SCRATCH_NUM_ENTRIES; entry++) begin - dv_reg_hwif_in.NonStickyLockableScratchRegCtrl[entry].lock_entry.swwel = dv_reg_hwif_out.NonStickyLockableScratchRegCtrl[entry].lock_entry.value; - dv_reg_hwif_in.NonStickyLockableScratchReg[entry].data.swwel = dv_reg_hwif_out.NonStickyLockableScratchRegCtrl[entry].lock_entry.value; + for (int entry = 0; entry < LOCK_SCRATCH_NUM_ENTRIES; entry++) begin + dv_reg_hwif_in.LockableScratchRegCtrl[entry].lock_entry.swwel = dv_reg_hwif_out.LockableScratchRegCtrl[entry].lock_entry.value; + dv_reg_hwif_in.LockableScratchReg[entry].data.swwel = dv_reg_hwif_out.LockableScratchRegCtrl[entry].lock_entry.value; end //Sticky Generic Lockable Registers in the Data Vault diff --git a/src/datavault/rtl/dv_defines_pkg.sv b/src/datavault/rtl/dv_defines_pkg.sv index 0883025e3..7ff199f1d 100644 --- a/src/datavault/rtl/dv_defines_pkg.sv +++ b/src/datavault/rtl/dv_defines_pkg.sv @@ -21,8 +21,8 @@ package dv_defines_pkg; parameter DV_DATA_W = 32; parameter STICKY_DV_NUM_ENTRIES = 10; - parameter NONSTICKY_DV_NUM_ENTRIES = 10; - parameter NONSTICKY_LOCK_SCRATCH_NUM_ENTRIES = 10; + parameter DV_NUM_ENTRIES = 10; + parameter LOCK_SCRATCH_NUM_ENTRIES = 10; parameter STICKY_LOCK_SCRATCH_NUM_ENTRIES = 8; parameter NONSTICKY_SCRATCH_NUM_ENTRIES = 8; parameter DV_NUM_DWORDS = 12; diff --git a/src/datavault/rtl/dv_reg.rdl b/src/datavault/rtl/dv_reg.rdl index 27d6e59db..6e4d57a51 100644 --- a/src/datavault/rtl/dv_reg.rdl +++ b/src/datavault/rtl/dv_reg.rdl @@ -19,51 +19,53 @@ addrmap dv_reg { signal {activelow; async;} hard_reset_b; // Sticky DataVault registers - field StickyDataVaultEntry {desc="DataVault Entry"; sw=rw; hw=na; swwel=true; resetsignal = hard_reset_b;}; + field StickyDataVaultEntry {desc="DataVault Entry (cleared on hard reset)"; sw=rw; hw=na; swwel=true; resetsignal = hard_reset_b;}; reg StickyDataVaultReg {StickyDataVaultEntry data[32]=0;}; //generic reg for DataVault - // NonSticky DataVault registers (reset on warm reset) - field NonStickyDataVaultEntry {desc="DataVault Entry"; sw=rw; hw=na; swwel=true; resetsignal = reset_b;}; - reg NonStickyDataVaultReg {NonStickyDataVaultEntry data[32]=0;}; //generic reg for DataVault + // Sticky DataVault registers (reset on hard reset) + field DataVaultEntry {desc="DataVault Entry (cleared on hard reset)"; sw=rw; hw=na; swwel=true; resetsignal = hard_reset_b;}; + reg DataVaultReg {DataVaultEntry data[32]=0;}; //generic reg for DataVault // ============== Data Vault Registers =========================== reg { - desc="Controls for the Sticky Data Vault Entries"; + desc="Controls for the Sticky Data Vault Entries (cleared on hard reset)"; field {desc="Lock writes to this entry. Writes will be suppressed when locked."; - sw=rw; swwel=true; hw=r; resetsignal=hard_reset_b;} lock_entry=0; //Shoud reflect NONSTICKY_DV_NUM_ENTRIES from kv_defines_pkg.sv + sw=rw; swwel=true; hw=r; resetsignal=hard_reset_b;} lock_entry=0; //Shoud reflect STICKY_DV_NUM_ENTRIES from dv_defines_pkg.sv } StickyDataVaultCtrl[10]; - StickyDataVaultReg STICKY_DATA_VAULT_ENTRY[10][12];//Shoud reflect STICKY_DV_NUM_ENTRIES and DV_NUM_DWORDS from kv_defines_pkg.sv + StickyDataVaultReg STICKY_DATA_VAULT_ENTRY[10][12];//Shoud reflect STICKY_DV_NUM_ENTRIES and DV_NUM_DWORDS from dv_defines_pkg.sv reg { - desc="Controls for the Non-Sticky Data Vault Entries"; + desc="Controls for the Data Vault Entries (cleared on warm reset)"; field {desc="Lock writes to this entry. Writes will be suppressed when locked."; - sw=rw; swwel=true; hw=r; resetsignal=core_only_rst_b;} lock_entry=0; //Shoud reflect STICKY_DV_NUM_ENTRIES and DV_NUM_DWORDS from kv_defines_pkg.sv - } NonStickyDataVaultCtrl[10];// CAREFUL with the address extensions + sw=rw; swwel=true; hw=r; resetsignal=core_only_rst_b;} lock_entry=0; //Shoud reflect DV_NUM_ENTRIES and DV_NUM_DWORDS from dv_defines_pkg.sv + } DataVaultCtrl[10];// CAREFUL with the address extensions - NonStickyDataVaultReg NONSTICKY_DATA_VAULT_ENTRY[10][12];//Shoud reflect NONSTICKY_DV_NUM_ENTRIES and DV_NUM_DWORDS from kv_defines_pkg.sv + DataVaultReg DATA_VAULT_ENTRY[10][12];//Shoud reflect DV_NUM_ENTRIES and DV_NUM_DWORDS from dv_defines_pkg.sv reg { - desc="Non-Sticky Scratch Register Controls"; + desc="Scratch Register Controls (cleared on warm reset)"; field {desc="Lock writes to the Scratch registers. Writes will be suppressed when locked."; sw=rw; swwel=true; hw=r; resetsignal=core_only_rst_b;} lock_entry=0; - } NonStickyLockableScratchRegCtrl[10]; //Shoud reflect NONSTICKY_SCRATCH_NUM_ENTRIES from kv_defines_pkg.sv & CAREFUL with the address extensions + } LockableScratchRegCtrl[10]; //Shoud reflect LOCK_SCRATCH_NUM_ENTRIES from dv_defines_pkg.sv & CAREFUL with the address extensions reg { - field {sw=rw; swwel=true; hw=na; resetsignal=reset_b;} data[32]=0; - } NonStickyLockableScratchReg[10]; //Shoud reflect NONSTICKY_LOCKQ_SCRATCH_NUM_ENTRIES from kv_defines_pkg.sv + desc="Scratch Register Entrie (cleared on hard reset)"; + field {sw=rw; swwel=true; hw=na; resetsignal=hard_reset_b;} data[32]=0; + } LockableScratchReg[10]; //Shoud reflect LOCK_SCRATCH_NUM_ENTRIES from dv_defines_pkg.sv reg { field {sw=rw; hw=na; resetsignal=reset_b;} data[32]=0; - } NonStickyGenericScratchReg[8]; //Shoud reflect NONSTICKY_SCRATCH_NUM_ENTRIES from kv_defines_pkg.sv & CAREFUL with the address extensions + } NonStickyGenericScratchReg[8]; //Shoud reflect NONSTICKY_SCRATCH_NUM_ENTRIES from dv_defines_pkg.sv & CAREFUL with the address extensions reg { - desc="Sticky Scratch Register Controls"; + desc="Sticky Scratch Register Controls (cleared on hard reset)"; field {desc="Lock writes to the Scratch registers. Writes will be suppressed when locked."; sw=rw; swwel=true; hw=r; resetsignal=hard_reset_b;} lock_entry=0; } StickyLockableScratchRegCtrl[8]; //should reflect STICKY_LOCKQ_SCRATCH_NUM_ENTRIES reg { + desc="Sticky Scratch Register Entries (cleared on hard reset)"; field {sw=rw; swwel=true; hw=na; resetsignal=hard_reset_b;} data[32]=0; } StickyLockableScratchReg[8]; //should reflect STICKY_LOCKQ_SCRATCH_NUM_ENTRIES diff --git a/src/datavault/rtl/dv_reg.sv b/src/datavault/rtl/dv_reg.sv index 5eec7ce22..ded8e5d15 100644 --- a/src/datavault/rtl/dv_reg.sv +++ b/src/datavault/rtl/dv_reg.sv @@ -66,10 +66,10 @@ module dv_reg ( typedef struct packed{ logic [10-1:0]StickyDataVaultCtrl; logic [10-1:0][12-1:0]STICKY_DATA_VAULT_ENTRY; - logic [10-1:0]NonStickyDataVaultCtrl; - logic [10-1:0][12-1:0]NONSTICKY_DATA_VAULT_ENTRY; - logic [10-1:0]NonStickyLockableScratchRegCtrl; - logic [10-1:0]NonStickyLockableScratchReg; + logic [10-1:0]DataVaultCtrl; + logic [10-1:0][12-1:0]DATA_VAULT_ENTRY; + logic [10-1:0]LockableScratchRegCtrl; + logic [10-1:0]LockableScratchReg; logic [8-1:0]NonStickyGenericScratchReg; logic [8-1:0]StickyLockableScratchRegCtrl; logic [8-1:0]StickyLockableScratchReg; @@ -90,18 +90,18 @@ module dv_reg ( end end for(int i0=0; i0<10; i0++) begin - decoded_reg_strb.NonStickyDataVaultCtrl[i0] = cpuif_req_masked & (cpuif_addr == 'h208 + i0*'h4); + decoded_reg_strb.DataVaultCtrl[i0] = cpuif_req_masked & (cpuif_addr == 'h208 + i0*'h4); end for(int i0=0; i0<10; i0++) begin for(int i1=0; i1<12; i1++) begin - decoded_reg_strb.NONSTICKY_DATA_VAULT_ENTRY[i0][i1] = cpuif_req_masked & (cpuif_addr == 'h230 + i0*'h30 + i1*'h4); + decoded_reg_strb.DATA_VAULT_ENTRY[i0][i1] = cpuif_req_masked & (cpuif_addr == 'h230 + i0*'h30 + i1*'h4); end end for(int i0=0; i0<10; i0++) begin - decoded_reg_strb.NonStickyLockableScratchRegCtrl[i0] = cpuif_req_masked & (cpuif_addr == 'h410 + i0*'h4); + decoded_reg_strb.LockableScratchRegCtrl[i0] = cpuif_req_masked & (cpuif_addr == 'h410 + i0*'h4); end for(int i0=0; i0<10; i0++) begin - decoded_reg_strb.NonStickyLockableScratchReg[i0] = cpuif_req_masked & (cpuif_addr == 'h438 + i0*'h4); + decoded_reg_strb.LockableScratchReg[i0] = cpuif_req_masked & (cpuif_addr == 'h438 + i0*'h4); end for(int i0=0; i0<8; i0++) begin decoded_reg_strb.NonStickyGenericScratchReg[i0] = cpuif_req_masked & (cpuif_addr == 'h460 + i0*'h4); @@ -145,25 +145,25 @@ module dv_reg ( logic next; logic load_next; } lock_entry; - } [10-1:0]NonStickyDataVaultCtrl; + } [10-1:0]DataVaultCtrl; struct packed{ struct packed{ logic [31:0] next; logic load_next; } data; - } [10-1:0][12-1:0]NONSTICKY_DATA_VAULT_ENTRY; + } [10-1:0][12-1:0]DATA_VAULT_ENTRY; struct packed{ struct packed{ logic next; logic load_next; } lock_entry; - } [10-1:0]NonStickyLockableScratchRegCtrl; + } [10-1:0]LockableScratchRegCtrl; struct packed{ struct packed{ logic [31:0] next; logic load_next; } data; - } [10-1:0]NonStickyLockableScratchReg; + } [10-1:0]LockableScratchReg; struct packed{ struct packed{ logic [31:0] next; @@ -200,22 +200,22 @@ module dv_reg ( struct packed{ logic value; } lock_entry; - } [10-1:0]NonStickyDataVaultCtrl; + } [10-1:0]DataVaultCtrl; struct packed{ struct packed{ logic [31:0] value; } data; - } [10-1:0][12-1:0]NONSTICKY_DATA_VAULT_ENTRY; + } [10-1:0][12-1:0]DATA_VAULT_ENTRY; struct packed{ struct packed{ logic value; } lock_entry; - } [10-1:0]NonStickyLockableScratchRegCtrl; + } [10-1:0]LockableScratchRegCtrl; struct packed{ struct packed{ logic [31:0] value; } data; - } [10-1:0]NonStickyLockableScratchReg; + } [10-1:0]LockableScratchReg; struct packed{ struct packed{ logic [31:0] value; @@ -278,86 +278,86 @@ module dv_reg ( end end for(genvar i0=0; i0<10; i0++) begin - // Field: dv_reg.NonStickyDataVaultCtrl[].lock_entry + // Field: dv_reg.DataVaultCtrl[].lock_entry always_comb begin - automatic logic [0:0] next_c = field_storage.NonStickyDataVaultCtrl[i0].lock_entry.value; + automatic logic [0:0] next_c = field_storage.DataVaultCtrl[i0].lock_entry.value; automatic logic load_next_c = '0; - if(decoded_reg_strb.NonStickyDataVaultCtrl[i0] && decoded_req_is_wr && !(hwif_in.NonStickyDataVaultCtrl[i0].lock_entry.swwel)) begin // SW write - next_c = (field_storage.NonStickyDataVaultCtrl[i0].lock_entry.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); + if(decoded_reg_strb.DataVaultCtrl[i0] && decoded_req_is_wr && !(hwif_in.DataVaultCtrl[i0].lock_entry.swwel)) begin // SW write + next_c = (field_storage.DataVaultCtrl[i0].lock_entry.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; end - field_combo.NonStickyDataVaultCtrl[i0].lock_entry.next = next_c; - field_combo.NonStickyDataVaultCtrl[i0].lock_entry.load_next = load_next_c; + field_combo.DataVaultCtrl[i0].lock_entry.next = next_c; + field_combo.DataVaultCtrl[i0].lock_entry.load_next = load_next_c; end always_ff @(posedge clk or negedge hwif_in.core_only_rst_b) begin if(~hwif_in.core_only_rst_b) begin - field_storage.NonStickyDataVaultCtrl[i0].lock_entry.value <= 'h0; - end else if(field_combo.NonStickyDataVaultCtrl[i0].lock_entry.load_next) begin - field_storage.NonStickyDataVaultCtrl[i0].lock_entry.value <= field_combo.NonStickyDataVaultCtrl[i0].lock_entry.next; + field_storage.DataVaultCtrl[i0].lock_entry.value <= 'h0; + end else if(field_combo.DataVaultCtrl[i0].lock_entry.load_next) begin + field_storage.DataVaultCtrl[i0].lock_entry.value <= field_combo.DataVaultCtrl[i0].lock_entry.next; end end - assign hwif_out.NonStickyDataVaultCtrl[i0].lock_entry.value = field_storage.NonStickyDataVaultCtrl[i0].lock_entry.value; + assign hwif_out.DataVaultCtrl[i0].lock_entry.value = field_storage.DataVaultCtrl[i0].lock_entry.value; end for(genvar i0=0; i0<10; i0++) begin for(genvar i1=0; i1<12; i1++) begin - // Field: dv_reg.NONSTICKY_DATA_VAULT_ENTRY[][].data + // Field: dv_reg.DATA_VAULT_ENTRY[][].data always_comb begin - automatic logic [31:0] next_c = field_storage.NONSTICKY_DATA_VAULT_ENTRY[i0][i1].data.value; + automatic logic [31:0] next_c = field_storage.DATA_VAULT_ENTRY[i0][i1].data.value; automatic logic load_next_c = '0; - if(decoded_reg_strb.NONSTICKY_DATA_VAULT_ENTRY[i0][i1] && decoded_req_is_wr && !(hwif_in.NONSTICKY_DATA_VAULT_ENTRY[i0][i1].data.swwel)) begin // SW write - next_c = (field_storage.NONSTICKY_DATA_VAULT_ENTRY[i0][i1].data.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); + if(decoded_reg_strb.DATA_VAULT_ENTRY[i0][i1] && decoded_req_is_wr && !(hwif_in.DATA_VAULT_ENTRY[i0][i1].data.swwel)) begin // SW write + next_c = (field_storage.DATA_VAULT_ENTRY[i0][i1].data.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; end - field_combo.NONSTICKY_DATA_VAULT_ENTRY[i0][i1].data.next = next_c; - field_combo.NONSTICKY_DATA_VAULT_ENTRY[i0][i1].data.load_next = load_next_c; + field_combo.DATA_VAULT_ENTRY[i0][i1].data.next = next_c; + field_combo.DATA_VAULT_ENTRY[i0][i1].data.load_next = load_next_c; end - always_ff @(posedge clk or negedge hwif_in.reset_b) begin - if(~hwif_in.reset_b) begin - field_storage.NONSTICKY_DATA_VAULT_ENTRY[i0][i1].data.value <= 'h0; - end else if(field_combo.NONSTICKY_DATA_VAULT_ENTRY[i0][i1].data.load_next) begin - field_storage.NONSTICKY_DATA_VAULT_ENTRY[i0][i1].data.value <= field_combo.NONSTICKY_DATA_VAULT_ENTRY[i0][i1].data.next; + always_ff @(posedge clk or negedge hwif_in.hard_reset_b) begin + if(~hwif_in.hard_reset_b) begin + field_storage.DATA_VAULT_ENTRY[i0][i1].data.value <= 'h0; + end else if(field_combo.DATA_VAULT_ENTRY[i0][i1].data.load_next) begin + field_storage.DATA_VAULT_ENTRY[i0][i1].data.value <= field_combo.DATA_VAULT_ENTRY[i0][i1].data.next; end end end end for(genvar i0=0; i0<10; i0++) begin - // Field: dv_reg.NonStickyLockableScratchRegCtrl[].lock_entry + // Field: dv_reg.LockableScratchRegCtrl[].lock_entry always_comb begin - automatic logic [0:0] next_c = field_storage.NonStickyLockableScratchRegCtrl[i0].lock_entry.value; + automatic logic [0:0] next_c = field_storage.LockableScratchRegCtrl[i0].lock_entry.value; automatic logic load_next_c = '0; - if(decoded_reg_strb.NonStickyLockableScratchRegCtrl[i0] && decoded_req_is_wr && !(hwif_in.NonStickyLockableScratchRegCtrl[i0].lock_entry.swwel)) begin // SW write - next_c = (field_storage.NonStickyLockableScratchRegCtrl[i0].lock_entry.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); + if(decoded_reg_strb.LockableScratchRegCtrl[i0] && decoded_req_is_wr && !(hwif_in.LockableScratchRegCtrl[i0].lock_entry.swwel)) begin // SW write + next_c = (field_storage.LockableScratchRegCtrl[i0].lock_entry.value & ~decoded_wr_biten[0:0]) | (decoded_wr_data[0:0] & decoded_wr_biten[0:0]); load_next_c = '1; end - field_combo.NonStickyLockableScratchRegCtrl[i0].lock_entry.next = next_c; - field_combo.NonStickyLockableScratchRegCtrl[i0].lock_entry.load_next = load_next_c; + field_combo.LockableScratchRegCtrl[i0].lock_entry.next = next_c; + field_combo.LockableScratchRegCtrl[i0].lock_entry.load_next = load_next_c; end always_ff @(posedge clk or negedge hwif_in.core_only_rst_b) begin if(~hwif_in.core_only_rst_b) begin - field_storage.NonStickyLockableScratchRegCtrl[i0].lock_entry.value <= 'h0; - end else if(field_combo.NonStickyLockableScratchRegCtrl[i0].lock_entry.load_next) begin - field_storage.NonStickyLockableScratchRegCtrl[i0].lock_entry.value <= field_combo.NonStickyLockableScratchRegCtrl[i0].lock_entry.next; + field_storage.LockableScratchRegCtrl[i0].lock_entry.value <= 'h0; + end else if(field_combo.LockableScratchRegCtrl[i0].lock_entry.load_next) begin + field_storage.LockableScratchRegCtrl[i0].lock_entry.value <= field_combo.LockableScratchRegCtrl[i0].lock_entry.next; end end - assign hwif_out.NonStickyLockableScratchRegCtrl[i0].lock_entry.value = field_storage.NonStickyLockableScratchRegCtrl[i0].lock_entry.value; + assign hwif_out.LockableScratchRegCtrl[i0].lock_entry.value = field_storage.LockableScratchRegCtrl[i0].lock_entry.value; end for(genvar i0=0; i0<10; i0++) begin - // Field: dv_reg.NonStickyLockableScratchReg[].data + // Field: dv_reg.LockableScratchReg[].data always_comb begin - automatic logic [31:0] next_c = field_storage.NonStickyLockableScratchReg[i0].data.value; + automatic logic [31:0] next_c = field_storage.LockableScratchReg[i0].data.value; automatic logic load_next_c = '0; - if(decoded_reg_strb.NonStickyLockableScratchReg[i0] && decoded_req_is_wr && !(hwif_in.NonStickyLockableScratchReg[i0].data.swwel)) begin // SW write - next_c = (field_storage.NonStickyLockableScratchReg[i0].data.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); + if(decoded_reg_strb.LockableScratchReg[i0] && decoded_req_is_wr && !(hwif_in.LockableScratchReg[i0].data.swwel)) begin // SW write + next_c = (field_storage.LockableScratchReg[i0].data.value & ~decoded_wr_biten[31:0]) | (decoded_wr_data[31:0] & decoded_wr_biten[31:0]); load_next_c = '1; end - field_combo.NonStickyLockableScratchReg[i0].data.next = next_c; - field_combo.NonStickyLockableScratchReg[i0].data.load_next = load_next_c; + field_combo.LockableScratchReg[i0].data.next = next_c; + field_combo.LockableScratchReg[i0].data.load_next = load_next_c; end - always_ff @(posedge clk or negedge hwif_in.reset_b) begin - if(~hwif_in.reset_b) begin - field_storage.NonStickyLockableScratchReg[i0].data.value <= 'h0; - end else if(field_combo.NonStickyLockableScratchReg[i0].data.load_next) begin - field_storage.NonStickyLockableScratchReg[i0].data.value <= field_combo.NonStickyLockableScratchReg[i0].data.next; + always_ff @(posedge clk or negedge hwif_in.hard_reset_b) begin + if(~hwif_in.hard_reset_b) begin + field_storage.LockableScratchReg[i0].data.value <= 'h0; + end else if(field_combo.LockableScratchReg[i0].data.load_next) begin + field_storage.LockableScratchReg[i0].data.value <= field_combo.LockableScratchReg[i0].data.next; end end end @@ -441,20 +441,20 @@ module dv_reg ( end end for(genvar i0=0; i0<10; i0++) begin - assign readback_array[i0*1 + 130][0:0] = (decoded_reg_strb.NonStickyDataVaultCtrl[i0] && !decoded_req_is_wr) ? field_storage.NonStickyDataVaultCtrl[i0].lock_entry.value : '0; + assign readback_array[i0*1 + 130][0:0] = (decoded_reg_strb.DataVaultCtrl[i0] && !decoded_req_is_wr) ? field_storage.DataVaultCtrl[i0].lock_entry.value : '0; assign readback_array[i0*1 + 130][31:1] = '0; end for(genvar i0=0; i0<10; i0++) begin for(genvar i1=0; i1<12; i1++) begin - assign readback_array[i0*12 + i1*1 + 140][31:0] = (decoded_reg_strb.NONSTICKY_DATA_VAULT_ENTRY[i0][i1] && !decoded_req_is_wr) ? field_storage.NONSTICKY_DATA_VAULT_ENTRY[i0][i1].data.value : '0; + assign readback_array[i0*12 + i1*1 + 140][31:0] = (decoded_reg_strb.DATA_VAULT_ENTRY[i0][i1] && !decoded_req_is_wr) ? field_storage.DATA_VAULT_ENTRY[i0][i1].data.value : '0; end end for(genvar i0=0; i0<10; i0++) begin - assign readback_array[i0*1 + 260][0:0] = (decoded_reg_strb.NonStickyLockableScratchRegCtrl[i0] && !decoded_req_is_wr) ? field_storage.NonStickyLockableScratchRegCtrl[i0].lock_entry.value : '0; + assign readback_array[i0*1 + 260][0:0] = (decoded_reg_strb.LockableScratchRegCtrl[i0] && !decoded_req_is_wr) ? field_storage.LockableScratchRegCtrl[i0].lock_entry.value : '0; assign readback_array[i0*1 + 260][31:1] = '0; end for(genvar i0=0; i0<10; i0++) begin - assign readback_array[i0*1 + 270][31:0] = (decoded_reg_strb.NonStickyLockableScratchReg[i0] && !decoded_req_is_wr) ? field_storage.NonStickyLockableScratchReg[i0].data.value : '0; + assign readback_array[i0*1 + 270][31:0] = (decoded_reg_strb.LockableScratchReg[i0] && !decoded_req_is_wr) ? field_storage.LockableScratchReg[i0].data.value : '0; end for(genvar i0=0; i0<8; i0++) begin assign readback_array[i0*1 + 280][31:0] = (decoded_reg_strb.NonStickyGenericScratchReg[i0] && !decoded_req_is_wr) ? field_storage.NonStickyGenericScratchReg[i0].data.value : '0; diff --git a/src/datavault/rtl/dv_reg_pkg.sv b/src/datavault/rtl/dv_reg_pkg.sv index 465927a3b..ee3801467 100644 --- a/src/datavault/rtl/dv_reg_pkg.sv +++ b/src/datavault/rtl/dv_reg_pkg.sv @@ -20,35 +20,35 @@ package dv_reg_pkg; typedef struct packed{ logic swwel; - } dv_reg__NonStickyDataVaultCtrl__lock_entry__in_t; + } dv_reg__DataVaultCtrl__lock_entry__in_t; typedef struct packed{ - dv_reg__NonStickyDataVaultCtrl__lock_entry__in_t lock_entry; - } dv_reg__NonStickyDataVaultCtrl__in_t; + dv_reg__DataVaultCtrl__lock_entry__in_t lock_entry; + } dv_reg__DataVaultCtrl__in_t; typedef struct packed{ logic swwel; - } dv_reg__NonStickyDataVaultEntry_w32__in_t; + } dv_reg__DataVaultEntry_w32__in_t; typedef struct packed{ - dv_reg__NonStickyDataVaultEntry_w32__in_t data; - } dv_reg__NonStickyDataVaultReg__in_t; + dv_reg__DataVaultEntry_w32__in_t data; + } dv_reg__DataVaultReg__in_t; typedef struct packed{ logic swwel; - } dv_reg__NonStickyLockableScratchRegCtrl__lock_entry__in_t; + } dv_reg__LockableScratchRegCtrl__lock_entry__in_t; typedef struct packed{ - dv_reg__NonStickyLockableScratchRegCtrl__lock_entry__in_t lock_entry; - } dv_reg__NonStickyLockableScratchRegCtrl__in_t; + dv_reg__LockableScratchRegCtrl__lock_entry__in_t lock_entry; + } dv_reg__LockableScratchRegCtrl__in_t; typedef struct packed{ logic swwel; - } dv_reg__NonStickyLockableScratchReg__data__in_t; + } dv_reg__LockableScratchReg__data__in_t; typedef struct packed{ - dv_reg__NonStickyLockableScratchReg__data__in_t data; - } dv_reg__NonStickyLockableScratchReg__in_t; + dv_reg__LockableScratchReg__data__in_t data; + } dv_reg__LockableScratchReg__in_t; typedef struct packed{ logic swwel; @@ -72,10 +72,10 @@ package dv_reg_pkg; logic hard_reset_b; dv_reg__StickyDataVaultCtrl__in_t [10-1:0]StickyDataVaultCtrl; dv_reg__StickyDataVaultReg__in_t [10-1:0][12-1:0]STICKY_DATA_VAULT_ENTRY; - dv_reg__NonStickyDataVaultCtrl__in_t [10-1:0]NonStickyDataVaultCtrl; - dv_reg__NonStickyDataVaultReg__in_t [10-1:0][12-1:0]NONSTICKY_DATA_VAULT_ENTRY; - dv_reg__NonStickyLockableScratchRegCtrl__in_t [10-1:0]NonStickyLockableScratchRegCtrl; - dv_reg__NonStickyLockableScratchReg__in_t [10-1:0]NonStickyLockableScratchReg; + dv_reg__DataVaultCtrl__in_t [10-1:0]DataVaultCtrl; + dv_reg__DataVaultReg__in_t [10-1:0][12-1:0]DATA_VAULT_ENTRY; + dv_reg__LockableScratchRegCtrl__in_t [10-1:0]LockableScratchRegCtrl; + dv_reg__LockableScratchReg__in_t [10-1:0]LockableScratchReg; dv_reg__StickyLockableScratchRegCtrl__in_t [8-1:0]StickyLockableScratchRegCtrl; dv_reg__StickyLockableScratchReg__in_t [8-1:0]StickyLockableScratchReg; } dv_reg__in_t; @@ -90,19 +90,19 @@ package dv_reg_pkg; typedef struct packed{ logic value; - } dv_reg__NonStickyDataVaultCtrl__lock_entry__out_t; + } dv_reg__DataVaultCtrl__lock_entry__out_t; typedef struct packed{ - dv_reg__NonStickyDataVaultCtrl__lock_entry__out_t lock_entry; - } dv_reg__NonStickyDataVaultCtrl__out_t; + dv_reg__DataVaultCtrl__lock_entry__out_t lock_entry; + } dv_reg__DataVaultCtrl__out_t; typedef struct packed{ logic value; - } dv_reg__NonStickyLockableScratchRegCtrl__lock_entry__out_t; + } dv_reg__LockableScratchRegCtrl__lock_entry__out_t; typedef struct packed{ - dv_reg__NonStickyLockableScratchRegCtrl__lock_entry__out_t lock_entry; - } dv_reg__NonStickyLockableScratchRegCtrl__out_t; + dv_reg__LockableScratchRegCtrl__lock_entry__out_t lock_entry; + } dv_reg__LockableScratchRegCtrl__out_t; typedef struct packed{ logic value; @@ -114,8 +114,8 @@ package dv_reg_pkg; typedef struct packed{ dv_reg__StickyDataVaultCtrl__out_t [10-1:0]StickyDataVaultCtrl; - dv_reg__NonStickyDataVaultCtrl__out_t [10-1:0]NonStickyDataVaultCtrl; - dv_reg__NonStickyLockableScratchRegCtrl__out_t [10-1:0]NonStickyLockableScratchRegCtrl; + dv_reg__DataVaultCtrl__out_t [10-1:0]DataVaultCtrl; + dv_reg__LockableScratchRegCtrl__out_t [10-1:0]LockableScratchRegCtrl; dv_reg__StickyLockableScratchRegCtrl__out_t [8-1:0]StickyLockableScratchRegCtrl; } dv_reg__out_t; diff --git a/src/datavault/rtl/dv_reg_uvm.sv b/src/datavault/rtl/dv_reg_uvm.sv index 644a583b7..9517e8221 100644 --- a/src/datavault/rtl/dv_reg_uvm.sv +++ b/src/datavault/rtl/dv_reg_uvm.sv @@ -64,17 +64,17 @@ package dv_reg_uvm; endfunction : build endclass : dv_reg__StickyDataVaultReg - // Reg - dv_reg::NonStickyDataVaultCtrl - class dv_reg__NonStickyDataVaultCtrl extends uvm_reg; + // Reg - dv_reg::DataVaultCtrl + class dv_reg__DataVaultCtrl extends uvm_reg; protected uvm_reg_data_t m_current; protected uvm_reg_data_t m_data; protected bit m_is_read; - dv_reg__NonStickyDataVaultCtrl_bit_cg lock_entry_bit_cg[1]; - dv_reg__NonStickyDataVaultCtrl_fld_cg fld_cg; + dv_reg__DataVaultCtrl_bit_cg lock_entry_bit_cg[1]; + dv_reg__DataVaultCtrl_fld_cg fld_cg; rand uvm_reg_field lock_entry; - function new(string name = "dv_reg__NonStickyDataVaultCtrl"); + function new(string name = "dv_reg__DataVaultCtrl"); super.new(name, 32, build_coverage(UVM_CVR_ALL)); endfunction : new extern virtual function void sample_values(); @@ -92,19 +92,19 @@ package dv_reg_uvm; if (has_coverage(UVM_CVR_FIELD_VALS)) fld_cg = new(); endfunction : build - endclass : dv_reg__NonStickyDataVaultCtrl + endclass : dv_reg__DataVaultCtrl - // Reg - dv_reg::NonStickyDataVaultReg - class dv_reg__NonStickyDataVaultReg extends uvm_reg; + // Reg - dv_reg::DataVaultReg + class dv_reg__DataVaultReg extends uvm_reg; protected uvm_reg_data_t m_current; protected uvm_reg_data_t m_data; protected bit m_is_read; - dv_reg__NonStickyDataVaultReg_bit_cg data_bit_cg[32]; - dv_reg__NonStickyDataVaultReg_fld_cg fld_cg; + dv_reg__DataVaultReg_bit_cg data_bit_cg[32]; + dv_reg__DataVaultReg_fld_cg fld_cg; rand uvm_reg_field data; - function new(string name = "dv_reg__NonStickyDataVaultReg"); + function new(string name = "dv_reg__DataVaultReg"); super.new(name, 32, build_coverage(UVM_CVR_ALL)); endfunction : new extern virtual function void sample_values(); @@ -122,19 +122,19 @@ package dv_reg_uvm; if (has_coverage(UVM_CVR_FIELD_VALS)) fld_cg = new(); endfunction : build - endclass : dv_reg__NonStickyDataVaultReg + endclass : dv_reg__DataVaultReg - // Reg - dv_reg::NonStickyLockableScratchRegCtrl - class dv_reg__NonStickyLockableScratchRegCtrl extends uvm_reg; + // Reg - dv_reg::LockableScratchRegCtrl + class dv_reg__LockableScratchRegCtrl extends uvm_reg; protected uvm_reg_data_t m_current; protected uvm_reg_data_t m_data; protected bit m_is_read; - dv_reg__NonStickyLockableScratchRegCtrl_bit_cg lock_entry_bit_cg[1]; - dv_reg__NonStickyLockableScratchRegCtrl_fld_cg fld_cg; + dv_reg__LockableScratchRegCtrl_bit_cg lock_entry_bit_cg[1]; + dv_reg__LockableScratchRegCtrl_fld_cg fld_cg; rand uvm_reg_field lock_entry; - function new(string name = "dv_reg__NonStickyLockableScratchRegCtrl"); + function new(string name = "dv_reg__LockableScratchRegCtrl"); super.new(name, 32, build_coverage(UVM_CVR_ALL)); endfunction : new extern virtual function void sample_values(); @@ -152,19 +152,19 @@ package dv_reg_uvm; if (has_coverage(UVM_CVR_FIELD_VALS)) fld_cg = new(); endfunction : build - endclass : dv_reg__NonStickyLockableScratchRegCtrl + endclass : dv_reg__LockableScratchRegCtrl - // Reg - dv_reg::NonStickyLockableScratchReg - class dv_reg__NonStickyLockableScratchReg extends uvm_reg; + // Reg - dv_reg::LockableScratchReg + class dv_reg__LockableScratchReg extends uvm_reg; protected uvm_reg_data_t m_current; protected uvm_reg_data_t m_data; protected bit m_is_read; - dv_reg__NonStickyLockableScratchReg_bit_cg data_bit_cg[32]; - dv_reg__NonStickyLockableScratchReg_fld_cg fld_cg; + dv_reg__LockableScratchReg_bit_cg data_bit_cg[32]; + dv_reg__LockableScratchReg_fld_cg fld_cg; rand uvm_reg_field data; - function new(string name = "dv_reg__NonStickyLockableScratchReg"); + function new(string name = "dv_reg__LockableScratchReg"); super.new(name, 32, build_coverage(UVM_CVR_ALL)); endfunction : new extern virtual function void sample_values(); @@ -182,7 +182,7 @@ package dv_reg_uvm; if (has_coverage(UVM_CVR_FIELD_VALS)) fld_cg = new(); endfunction : build - endclass : dv_reg__NonStickyLockableScratchReg + endclass : dv_reg__LockableScratchReg // Reg - dv_reg::NonStickyGenericScratchReg class dv_reg__NonStickyGenericScratchReg extends uvm_reg; @@ -278,10 +278,10 @@ package dv_reg_uvm; class dv_reg extends uvm_reg_block; rand dv_reg__StickyDataVaultCtrl StickyDataVaultCtrl[10]; rand dv_reg__StickyDataVaultReg STICKY_DATA_VAULT_ENTRY[10][12]; - rand dv_reg__NonStickyDataVaultCtrl NonStickyDataVaultCtrl[10]; - rand dv_reg__NonStickyDataVaultReg NONSTICKY_DATA_VAULT_ENTRY[10][12]; - rand dv_reg__NonStickyLockableScratchRegCtrl NonStickyLockableScratchRegCtrl[10]; - rand dv_reg__NonStickyLockableScratchReg NonStickyLockableScratchReg[10]; + rand dv_reg__DataVaultCtrl DataVaultCtrl[10]; + rand dv_reg__DataVaultReg DATA_VAULT_ENTRY[10][12]; + rand dv_reg__LockableScratchRegCtrl LockableScratchRegCtrl[10]; + rand dv_reg__LockableScratchReg LockableScratchReg[10]; rand dv_reg__NonStickyGenericScratchReg NonStickyGenericScratchReg[8]; rand dv_reg__StickyLockableScratchRegCtrl StickyLockableScratchRegCtrl[8]; rand dv_reg__StickyLockableScratchReg StickyLockableScratchReg[8]; @@ -306,33 +306,33 @@ package dv_reg_uvm; this.STICKY_DATA_VAULT_ENTRY[i0][i1].build(); this.default_map.add_reg(this.STICKY_DATA_VAULT_ENTRY[i0][i1], 'h28 + i0*'h30 + i1*'h4); end - foreach(this.NonStickyDataVaultCtrl[i0]) begin - this.NonStickyDataVaultCtrl[i0] = new($sformatf("NonStickyDataVaultCtrl[%0d]", i0)); - this.NonStickyDataVaultCtrl[i0].configure(this); + foreach(this.DataVaultCtrl[i0]) begin + this.DataVaultCtrl[i0] = new($sformatf("DataVaultCtrl[%0d]", i0)); + this.DataVaultCtrl[i0].configure(this); - this.NonStickyDataVaultCtrl[i0].build(); - this.default_map.add_reg(this.NonStickyDataVaultCtrl[i0], 'h208 + i0*'h4); + this.DataVaultCtrl[i0].build(); + this.default_map.add_reg(this.DataVaultCtrl[i0], 'h208 + i0*'h4); end - foreach(this.NONSTICKY_DATA_VAULT_ENTRY[i0, i1]) begin - this.NONSTICKY_DATA_VAULT_ENTRY[i0][i1] = new($sformatf("NONSTICKY_DATA_VAULT_ENTRY[%0d][%0d]", i0, i1)); - this.NONSTICKY_DATA_VAULT_ENTRY[i0][i1].configure(this); + foreach(this.DATA_VAULT_ENTRY[i0, i1]) begin + this.DATA_VAULT_ENTRY[i0][i1] = new($sformatf("DATA_VAULT_ENTRY[%0d][%0d]", i0, i1)); + this.DATA_VAULT_ENTRY[i0][i1].configure(this); - this.NONSTICKY_DATA_VAULT_ENTRY[i0][i1].build(); - this.default_map.add_reg(this.NONSTICKY_DATA_VAULT_ENTRY[i0][i1], 'h230 + i0*'h30 + i1*'h4); + this.DATA_VAULT_ENTRY[i0][i1].build(); + this.default_map.add_reg(this.DATA_VAULT_ENTRY[i0][i1], 'h230 + i0*'h30 + i1*'h4); end - foreach(this.NonStickyLockableScratchRegCtrl[i0]) begin - this.NonStickyLockableScratchRegCtrl[i0] = new($sformatf("NonStickyLockableScratchRegCtrl[%0d]", i0)); - this.NonStickyLockableScratchRegCtrl[i0].configure(this); + foreach(this.LockableScratchRegCtrl[i0]) begin + this.LockableScratchRegCtrl[i0] = new($sformatf("LockableScratchRegCtrl[%0d]", i0)); + this.LockableScratchRegCtrl[i0].configure(this); - this.NonStickyLockableScratchRegCtrl[i0].build(); - this.default_map.add_reg(this.NonStickyLockableScratchRegCtrl[i0], 'h410 + i0*'h4); + this.LockableScratchRegCtrl[i0].build(); + this.default_map.add_reg(this.LockableScratchRegCtrl[i0], 'h410 + i0*'h4); end - foreach(this.NonStickyLockableScratchReg[i0]) begin - this.NonStickyLockableScratchReg[i0] = new($sformatf("NonStickyLockableScratchReg[%0d]", i0)); - this.NonStickyLockableScratchReg[i0].configure(this); + foreach(this.LockableScratchReg[i0]) begin + this.LockableScratchReg[i0] = new($sformatf("LockableScratchReg[%0d]", i0)); + this.LockableScratchReg[i0].configure(this); - this.NonStickyLockableScratchReg[i0].build(); - this.default_map.add_reg(this.NonStickyLockableScratchReg[i0], 'h438 + i0*'h4); + this.LockableScratchReg[i0].build(); + this.default_map.add_reg(this.LockableScratchReg[i0], 'h438 + i0*'h4); end foreach(this.NonStickyGenericScratchReg[i0]) begin this.NonStickyGenericScratchReg[i0] = new($sformatf("NonStickyGenericScratchReg[%0d]", i0)); diff --git a/src/integration/rtl/caliptra_reg.h b/src/integration/rtl/caliptra_reg.h index f9629c426..0885a3c79 100644 --- a/src/integration/rtl/caliptra_reg.h +++ b/src/integration/rtl/caliptra_reg.h @@ -3482,346 +3482,346 @@ #define DV_REG_STICKY_DATA_VAULT_ENTRY_9_10 (0x200) #define CLP_DV_REG_STICKY_DATA_VAULT_ENTRY_9_11 (0x1001c204) #define DV_REG_STICKY_DATA_VAULT_ENTRY_9_11 (0x204) -#define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_0 (0x1001c208) -#define DV_REG_NONSTICKYDATAVAULTCTRL_0 (0x208) -#define DV_REG_NONSTICKYDATAVAULTCTRL_0_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYDATAVAULTCTRL_0_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_1 (0x1001c20c) -#define DV_REG_NONSTICKYDATAVAULTCTRL_1 (0x20c) -#define DV_REG_NONSTICKYDATAVAULTCTRL_1_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYDATAVAULTCTRL_1_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_2 (0x1001c210) -#define DV_REG_NONSTICKYDATAVAULTCTRL_2 (0x210) -#define DV_REG_NONSTICKYDATAVAULTCTRL_2_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYDATAVAULTCTRL_2_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_3 (0x1001c214) -#define DV_REG_NONSTICKYDATAVAULTCTRL_3 (0x214) -#define DV_REG_NONSTICKYDATAVAULTCTRL_3_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYDATAVAULTCTRL_3_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_4 (0x1001c218) -#define DV_REG_NONSTICKYDATAVAULTCTRL_4 (0x218) -#define DV_REG_NONSTICKYDATAVAULTCTRL_4_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYDATAVAULTCTRL_4_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_5 (0x1001c21c) -#define DV_REG_NONSTICKYDATAVAULTCTRL_5 (0x21c) -#define DV_REG_NONSTICKYDATAVAULTCTRL_5_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYDATAVAULTCTRL_5_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_6 (0x1001c220) -#define DV_REG_NONSTICKYDATAVAULTCTRL_6 (0x220) -#define DV_REG_NONSTICKYDATAVAULTCTRL_6_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYDATAVAULTCTRL_6_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_7 (0x1001c224) -#define DV_REG_NONSTICKYDATAVAULTCTRL_7 (0x224) -#define DV_REG_NONSTICKYDATAVAULTCTRL_7_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYDATAVAULTCTRL_7_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_8 (0x1001c228) -#define DV_REG_NONSTICKYDATAVAULTCTRL_8 (0x228) -#define DV_REG_NONSTICKYDATAVAULTCTRL_8_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYDATAVAULTCTRL_8_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_9 (0x1001c22c) -#define DV_REG_NONSTICKYDATAVAULTCTRL_9 (0x22c) -#define DV_REG_NONSTICKYDATAVAULTCTRL_9_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYDATAVAULTCTRL_9_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_0 (0x1001c230) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_0 (0x230) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_1 (0x1001c234) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_1 (0x234) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_2 (0x1001c238) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_2 (0x238) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_3 (0x1001c23c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_3 (0x23c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_4 (0x1001c240) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_4 (0x240) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_5 (0x1001c244) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_5 (0x244) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_6 (0x1001c248) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_6 (0x248) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_7 (0x1001c24c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_7 (0x24c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_8 (0x1001c250) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_8 (0x250) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_9 (0x1001c254) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_9 (0x254) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_10 (0x1001c258) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_10 (0x258) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_11 (0x1001c25c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_11 (0x25c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_0 (0x1001c260) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_0 (0x260) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_1 (0x1001c264) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_1 (0x264) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_2 (0x1001c268) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_2 (0x268) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_3 (0x1001c26c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_3 (0x26c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_4 (0x1001c270) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_4 (0x270) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_5 (0x1001c274) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_5 (0x274) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_6 (0x1001c278) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_6 (0x278) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_7 (0x1001c27c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_7 (0x27c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_8 (0x1001c280) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_8 (0x280) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_9 (0x1001c284) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_9 (0x284) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_10 (0x1001c288) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_10 (0x288) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_11 (0x1001c28c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_11 (0x28c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_0 (0x1001c290) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_0 (0x290) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_1 (0x1001c294) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_1 (0x294) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_2 (0x1001c298) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_2 (0x298) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_3 (0x1001c29c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_3 (0x29c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_4 (0x1001c2a0) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_4 (0x2a0) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_5 (0x1001c2a4) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_5 (0x2a4) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_6 (0x1001c2a8) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_6 (0x2a8) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_7 (0x1001c2ac) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_7 (0x2ac) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_8 (0x1001c2b0) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_8 (0x2b0) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_9 (0x1001c2b4) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_9 (0x2b4) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_10 (0x1001c2b8) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_10 (0x2b8) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_11 (0x1001c2bc) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_11 (0x2bc) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_0 (0x1001c2c0) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_0 (0x2c0) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_1 (0x1001c2c4) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_1 (0x2c4) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_2 (0x1001c2c8) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_2 (0x2c8) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_3 (0x1001c2cc) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_3 (0x2cc) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_4 (0x1001c2d0) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_4 (0x2d0) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_5 (0x1001c2d4) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_5 (0x2d4) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_6 (0x1001c2d8) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_6 (0x2d8) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_7 (0x1001c2dc) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_7 (0x2dc) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_8 (0x1001c2e0) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_8 (0x2e0) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_9 (0x1001c2e4) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_9 (0x2e4) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_10 (0x1001c2e8) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_10 (0x2e8) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_11 (0x1001c2ec) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_11 (0x2ec) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_0 (0x1001c2f0) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_0 (0x2f0) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_1 (0x1001c2f4) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_1 (0x2f4) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_2 (0x1001c2f8) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_2 (0x2f8) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_3 (0x1001c2fc) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_3 (0x2fc) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_4 (0x1001c300) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_4 (0x300) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_5 (0x1001c304) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_5 (0x304) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_6 (0x1001c308) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_6 (0x308) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_7 (0x1001c30c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_7 (0x30c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_8 (0x1001c310) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_8 (0x310) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_9 (0x1001c314) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_9 (0x314) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_10 (0x1001c318) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_10 (0x318) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_11 (0x1001c31c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_11 (0x31c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_0 (0x1001c320) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_0 (0x320) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_1 (0x1001c324) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_1 (0x324) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_2 (0x1001c328) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_2 (0x328) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_3 (0x1001c32c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_3 (0x32c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_4 (0x1001c330) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_4 (0x330) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_5 (0x1001c334) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_5 (0x334) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_6 (0x1001c338) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_6 (0x338) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_7 (0x1001c33c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_7 (0x33c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_8 (0x1001c340) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_8 (0x340) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_9 (0x1001c344) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_9 (0x344) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_10 (0x1001c348) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_10 (0x348) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_11 (0x1001c34c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_11 (0x34c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_0 (0x1001c350) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_0 (0x350) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_1 (0x1001c354) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_1 (0x354) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_2 (0x1001c358) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_2 (0x358) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_3 (0x1001c35c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_3 (0x35c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_4 (0x1001c360) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_4 (0x360) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_5 (0x1001c364) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_5 (0x364) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_6 (0x1001c368) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_6 (0x368) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_7 (0x1001c36c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_7 (0x36c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_8 (0x1001c370) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_8 (0x370) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_9 (0x1001c374) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_9 (0x374) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_10 (0x1001c378) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_10 (0x378) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_11 (0x1001c37c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_11 (0x37c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_0 (0x1001c380) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_0 (0x380) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_1 (0x1001c384) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_1 (0x384) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_2 (0x1001c388) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_2 (0x388) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_3 (0x1001c38c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_3 (0x38c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_4 (0x1001c390) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_4 (0x390) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_5 (0x1001c394) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_5 (0x394) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_6 (0x1001c398) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_6 (0x398) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_7 (0x1001c39c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_7 (0x39c) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_8 (0x1001c3a0) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_8 (0x3a0) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_9 (0x1001c3a4) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_9 (0x3a4) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_10 (0x1001c3a8) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_10 (0x3a8) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_11 (0x1001c3ac) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_11 (0x3ac) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_0 (0x1001c3b0) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_0 (0x3b0) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_1 (0x1001c3b4) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_1 (0x3b4) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_2 (0x1001c3b8) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_2 (0x3b8) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_3 (0x1001c3bc) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_3 (0x3bc) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_4 (0x1001c3c0) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_4 (0x3c0) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_5 (0x1001c3c4) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_5 (0x3c4) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_6 (0x1001c3c8) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_6 (0x3c8) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_7 (0x1001c3cc) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_7 (0x3cc) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_8 (0x1001c3d0) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_8 (0x3d0) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_9 (0x1001c3d4) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_9 (0x3d4) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_10 (0x1001c3d8) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_10 (0x3d8) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_11 (0x1001c3dc) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_11 (0x3dc) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_0 (0x1001c3e0) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_0 (0x3e0) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_1 (0x1001c3e4) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_1 (0x3e4) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_2 (0x1001c3e8) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_2 (0x3e8) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_3 (0x1001c3ec) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_3 (0x3ec) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_4 (0x1001c3f0) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_4 (0x3f0) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_5 (0x1001c3f4) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_5 (0x3f4) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_6 (0x1001c3f8) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_6 (0x3f8) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_7 (0x1001c3fc) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_7 (0x3fc) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_8 (0x1001c400) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_8 (0x400) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_9 (0x1001c404) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_9 (0x404) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_10 (0x1001c408) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_10 (0x408) -#define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_11 (0x1001c40c) -#define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_11 (0x40c) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_0 (0x1001c410) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_0 (0x410) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_0_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_0_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_1 (0x1001c414) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_1 (0x414) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_1_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_1_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_2 (0x1001c418) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_2 (0x418) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_2_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_2_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_3 (0x1001c41c) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_3 (0x41c) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_3_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_3_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_4 (0x1001c420) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_4 (0x420) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_4_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_4_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_5 (0x1001c424) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_5 (0x424) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_5_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_5_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_6 (0x1001c428) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_6 (0x428) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_6_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_6_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_7 (0x1001c42c) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_7 (0x42c) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_7_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_7_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_8 (0x1001c430) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_8 (0x430) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_8_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_8_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_9 (0x1001c434) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_9 (0x434) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_9_LOCK_ENTRY_LOW (0) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_9_LOCK_ENTRY_MASK (0x1) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_0 (0x1001c438) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREG_0 (0x438) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_1 (0x1001c43c) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREG_1 (0x43c) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_2 (0x1001c440) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREG_2 (0x440) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_3 (0x1001c444) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREG_3 (0x444) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_4 (0x1001c448) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREG_4 (0x448) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_5 (0x1001c44c) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREG_5 (0x44c) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_6 (0x1001c450) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREG_6 (0x450) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_7 (0x1001c454) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREG_7 (0x454) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_8 (0x1001c458) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREG_8 (0x458) -#define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_9 (0x1001c45c) -#define DV_REG_NONSTICKYLOCKABLESCRATCHREG_9 (0x45c) +#define CLP_DV_REG_DATAVAULTCTRL_0 (0x1001c208) +#define DV_REG_DATAVAULTCTRL_0 (0x208) +#define DV_REG_DATAVAULTCTRL_0_LOCK_ENTRY_LOW (0) +#define DV_REG_DATAVAULTCTRL_0_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_DATAVAULTCTRL_1 (0x1001c20c) +#define DV_REG_DATAVAULTCTRL_1 (0x20c) +#define DV_REG_DATAVAULTCTRL_1_LOCK_ENTRY_LOW (0) +#define DV_REG_DATAVAULTCTRL_1_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_DATAVAULTCTRL_2 (0x1001c210) +#define DV_REG_DATAVAULTCTRL_2 (0x210) +#define DV_REG_DATAVAULTCTRL_2_LOCK_ENTRY_LOW (0) +#define DV_REG_DATAVAULTCTRL_2_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_DATAVAULTCTRL_3 (0x1001c214) +#define DV_REG_DATAVAULTCTRL_3 (0x214) +#define DV_REG_DATAVAULTCTRL_3_LOCK_ENTRY_LOW (0) +#define DV_REG_DATAVAULTCTRL_3_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_DATAVAULTCTRL_4 (0x1001c218) +#define DV_REG_DATAVAULTCTRL_4 (0x218) +#define DV_REG_DATAVAULTCTRL_4_LOCK_ENTRY_LOW (0) +#define DV_REG_DATAVAULTCTRL_4_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_DATAVAULTCTRL_5 (0x1001c21c) +#define DV_REG_DATAVAULTCTRL_5 (0x21c) +#define DV_REG_DATAVAULTCTRL_5_LOCK_ENTRY_LOW (0) +#define DV_REG_DATAVAULTCTRL_5_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_DATAVAULTCTRL_6 (0x1001c220) +#define DV_REG_DATAVAULTCTRL_6 (0x220) +#define DV_REG_DATAVAULTCTRL_6_LOCK_ENTRY_LOW (0) +#define DV_REG_DATAVAULTCTRL_6_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_DATAVAULTCTRL_7 (0x1001c224) +#define DV_REG_DATAVAULTCTRL_7 (0x224) +#define DV_REG_DATAVAULTCTRL_7_LOCK_ENTRY_LOW (0) +#define DV_REG_DATAVAULTCTRL_7_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_DATAVAULTCTRL_8 (0x1001c228) +#define DV_REG_DATAVAULTCTRL_8 (0x228) +#define DV_REG_DATAVAULTCTRL_8_LOCK_ENTRY_LOW (0) +#define DV_REG_DATAVAULTCTRL_8_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_DATAVAULTCTRL_9 (0x1001c22c) +#define DV_REG_DATAVAULTCTRL_9 (0x22c) +#define DV_REG_DATAVAULTCTRL_9_LOCK_ENTRY_LOW (0) +#define DV_REG_DATAVAULTCTRL_9_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_DATA_VAULT_ENTRY_0_0 (0x1001c230) +#define DV_REG_DATA_VAULT_ENTRY_0_0 (0x230) +#define CLP_DV_REG_DATA_VAULT_ENTRY_0_1 (0x1001c234) +#define DV_REG_DATA_VAULT_ENTRY_0_1 (0x234) +#define CLP_DV_REG_DATA_VAULT_ENTRY_0_2 (0x1001c238) +#define DV_REG_DATA_VAULT_ENTRY_0_2 (0x238) +#define CLP_DV_REG_DATA_VAULT_ENTRY_0_3 (0x1001c23c) +#define DV_REG_DATA_VAULT_ENTRY_0_3 (0x23c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_0_4 (0x1001c240) +#define DV_REG_DATA_VAULT_ENTRY_0_4 (0x240) +#define CLP_DV_REG_DATA_VAULT_ENTRY_0_5 (0x1001c244) +#define DV_REG_DATA_VAULT_ENTRY_0_5 (0x244) +#define CLP_DV_REG_DATA_VAULT_ENTRY_0_6 (0x1001c248) +#define DV_REG_DATA_VAULT_ENTRY_0_6 (0x248) +#define CLP_DV_REG_DATA_VAULT_ENTRY_0_7 (0x1001c24c) +#define DV_REG_DATA_VAULT_ENTRY_0_7 (0x24c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_0_8 (0x1001c250) +#define DV_REG_DATA_VAULT_ENTRY_0_8 (0x250) +#define CLP_DV_REG_DATA_VAULT_ENTRY_0_9 (0x1001c254) +#define DV_REG_DATA_VAULT_ENTRY_0_9 (0x254) +#define CLP_DV_REG_DATA_VAULT_ENTRY_0_10 (0x1001c258) +#define DV_REG_DATA_VAULT_ENTRY_0_10 (0x258) +#define CLP_DV_REG_DATA_VAULT_ENTRY_0_11 (0x1001c25c) +#define DV_REG_DATA_VAULT_ENTRY_0_11 (0x25c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_1_0 (0x1001c260) +#define DV_REG_DATA_VAULT_ENTRY_1_0 (0x260) +#define CLP_DV_REG_DATA_VAULT_ENTRY_1_1 (0x1001c264) +#define DV_REG_DATA_VAULT_ENTRY_1_1 (0x264) +#define CLP_DV_REG_DATA_VAULT_ENTRY_1_2 (0x1001c268) +#define DV_REG_DATA_VAULT_ENTRY_1_2 (0x268) +#define CLP_DV_REG_DATA_VAULT_ENTRY_1_3 (0x1001c26c) +#define DV_REG_DATA_VAULT_ENTRY_1_3 (0x26c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_1_4 (0x1001c270) +#define DV_REG_DATA_VAULT_ENTRY_1_4 (0x270) +#define CLP_DV_REG_DATA_VAULT_ENTRY_1_5 (0x1001c274) +#define DV_REG_DATA_VAULT_ENTRY_1_5 (0x274) +#define CLP_DV_REG_DATA_VAULT_ENTRY_1_6 (0x1001c278) +#define DV_REG_DATA_VAULT_ENTRY_1_6 (0x278) +#define CLP_DV_REG_DATA_VAULT_ENTRY_1_7 (0x1001c27c) +#define DV_REG_DATA_VAULT_ENTRY_1_7 (0x27c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_1_8 (0x1001c280) +#define DV_REG_DATA_VAULT_ENTRY_1_8 (0x280) +#define CLP_DV_REG_DATA_VAULT_ENTRY_1_9 (0x1001c284) +#define DV_REG_DATA_VAULT_ENTRY_1_9 (0x284) +#define CLP_DV_REG_DATA_VAULT_ENTRY_1_10 (0x1001c288) +#define DV_REG_DATA_VAULT_ENTRY_1_10 (0x288) +#define CLP_DV_REG_DATA_VAULT_ENTRY_1_11 (0x1001c28c) +#define DV_REG_DATA_VAULT_ENTRY_1_11 (0x28c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_2_0 (0x1001c290) +#define DV_REG_DATA_VAULT_ENTRY_2_0 (0x290) +#define CLP_DV_REG_DATA_VAULT_ENTRY_2_1 (0x1001c294) +#define DV_REG_DATA_VAULT_ENTRY_2_1 (0x294) +#define CLP_DV_REG_DATA_VAULT_ENTRY_2_2 (0x1001c298) +#define DV_REG_DATA_VAULT_ENTRY_2_2 (0x298) +#define CLP_DV_REG_DATA_VAULT_ENTRY_2_3 (0x1001c29c) +#define DV_REG_DATA_VAULT_ENTRY_2_3 (0x29c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_2_4 (0x1001c2a0) +#define DV_REG_DATA_VAULT_ENTRY_2_4 (0x2a0) +#define CLP_DV_REG_DATA_VAULT_ENTRY_2_5 (0x1001c2a4) +#define DV_REG_DATA_VAULT_ENTRY_2_5 (0x2a4) +#define CLP_DV_REG_DATA_VAULT_ENTRY_2_6 (0x1001c2a8) +#define DV_REG_DATA_VAULT_ENTRY_2_6 (0x2a8) +#define CLP_DV_REG_DATA_VAULT_ENTRY_2_7 (0x1001c2ac) +#define DV_REG_DATA_VAULT_ENTRY_2_7 (0x2ac) +#define CLP_DV_REG_DATA_VAULT_ENTRY_2_8 (0x1001c2b0) +#define DV_REG_DATA_VAULT_ENTRY_2_8 (0x2b0) +#define CLP_DV_REG_DATA_VAULT_ENTRY_2_9 (0x1001c2b4) +#define DV_REG_DATA_VAULT_ENTRY_2_9 (0x2b4) +#define CLP_DV_REG_DATA_VAULT_ENTRY_2_10 (0x1001c2b8) +#define DV_REG_DATA_VAULT_ENTRY_2_10 (0x2b8) +#define CLP_DV_REG_DATA_VAULT_ENTRY_2_11 (0x1001c2bc) +#define DV_REG_DATA_VAULT_ENTRY_2_11 (0x2bc) +#define CLP_DV_REG_DATA_VAULT_ENTRY_3_0 (0x1001c2c0) +#define DV_REG_DATA_VAULT_ENTRY_3_0 (0x2c0) +#define CLP_DV_REG_DATA_VAULT_ENTRY_3_1 (0x1001c2c4) +#define DV_REG_DATA_VAULT_ENTRY_3_1 (0x2c4) +#define CLP_DV_REG_DATA_VAULT_ENTRY_3_2 (0x1001c2c8) +#define DV_REG_DATA_VAULT_ENTRY_3_2 (0x2c8) +#define CLP_DV_REG_DATA_VAULT_ENTRY_3_3 (0x1001c2cc) +#define DV_REG_DATA_VAULT_ENTRY_3_3 (0x2cc) +#define CLP_DV_REG_DATA_VAULT_ENTRY_3_4 (0x1001c2d0) +#define DV_REG_DATA_VAULT_ENTRY_3_4 (0x2d0) +#define CLP_DV_REG_DATA_VAULT_ENTRY_3_5 (0x1001c2d4) +#define DV_REG_DATA_VAULT_ENTRY_3_5 (0x2d4) +#define CLP_DV_REG_DATA_VAULT_ENTRY_3_6 (0x1001c2d8) +#define DV_REG_DATA_VAULT_ENTRY_3_6 (0x2d8) +#define CLP_DV_REG_DATA_VAULT_ENTRY_3_7 (0x1001c2dc) +#define DV_REG_DATA_VAULT_ENTRY_3_7 (0x2dc) +#define CLP_DV_REG_DATA_VAULT_ENTRY_3_8 (0x1001c2e0) +#define DV_REG_DATA_VAULT_ENTRY_3_8 (0x2e0) +#define CLP_DV_REG_DATA_VAULT_ENTRY_3_9 (0x1001c2e4) +#define DV_REG_DATA_VAULT_ENTRY_3_9 (0x2e4) +#define CLP_DV_REG_DATA_VAULT_ENTRY_3_10 (0x1001c2e8) +#define DV_REG_DATA_VAULT_ENTRY_3_10 (0x2e8) +#define CLP_DV_REG_DATA_VAULT_ENTRY_3_11 (0x1001c2ec) +#define DV_REG_DATA_VAULT_ENTRY_3_11 (0x2ec) +#define CLP_DV_REG_DATA_VAULT_ENTRY_4_0 (0x1001c2f0) +#define DV_REG_DATA_VAULT_ENTRY_4_0 (0x2f0) +#define CLP_DV_REG_DATA_VAULT_ENTRY_4_1 (0x1001c2f4) +#define DV_REG_DATA_VAULT_ENTRY_4_1 (0x2f4) +#define CLP_DV_REG_DATA_VAULT_ENTRY_4_2 (0x1001c2f8) +#define DV_REG_DATA_VAULT_ENTRY_4_2 (0x2f8) +#define CLP_DV_REG_DATA_VAULT_ENTRY_4_3 (0x1001c2fc) +#define DV_REG_DATA_VAULT_ENTRY_4_3 (0x2fc) +#define CLP_DV_REG_DATA_VAULT_ENTRY_4_4 (0x1001c300) +#define DV_REG_DATA_VAULT_ENTRY_4_4 (0x300) +#define CLP_DV_REG_DATA_VAULT_ENTRY_4_5 (0x1001c304) +#define DV_REG_DATA_VAULT_ENTRY_4_5 (0x304) +#define CLP_DV_REG_DATA_VAULT_ENTRY_4_6 (0x1001c308) +#define DV_REG_DATA_VAULT_ENTRY_4_6 (0x308) +#define CLP_DV_REG_DATA_VAULT_ENTRY_4_7 (0x1001c30c) +#define DV_REG_DATA_VAULT_ENTRY_4_7 (0x30c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_4_8 (0x1001c310) +#define DV_REG_DATA_VAULT_ENTRY_4_8 (0x310) +#define CLP_DV_REG_DATA_VAULT_ENTRY_4_9 (0x1001c314) +#define DV_REG_DATA_VAULT_ENTRY_4_9 (0x314) +#define CLP_DV_REG_DATA_VAULT_ENTRY_4_10 (0x1001c318) +#define DV_REG_DATA_VAULT_ENTRY_4_10 (0x318) +#define CLP_DV_REG_DATA_VAULT_ENTRY_4_11 (0x1001c31c) +#define DV_REG_DATA_VAULT_ENTRY_4_11 (0x31c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_5_0 (0x1001c320) +#define DV_REG_DATA_VAULT_ENTRY_5_0 (0x320) +#define CLP_DV_REG_DATA_VAULT_ENTRY_5_1 (0x1001c324) +#define DV_REG_DATA_VAULT_ENTRY_5_1 (0x324) +#define CLP_DV_REG_DATA_VAULT_ENTRY_5_2 (0x1001c328) +#define DV_REG_DATA_VAULT_ENTRY_5_2 (0x328) +#define CLP_DV_REG_DATA_VAULT_ENTRY_5_3 (0x1001c32c) +#define DV_REG_DATA_VAULT_ENTRY_5_3 (0x32c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_5_4 (0x1001c330) +#define DV_REG_DATA_VAULT_ENTRY_5_4 (0x330) +#define CLP_DV_REG_DATA_VAULT_ENTRY_5_5 (0x1001c334) +#define DV_REG_DATA_VAULT_ENTRY_5_5 (0x334) +#define CLP_DV_REG_DATA_VAULT_ENTRY_5_6 (0x1001c338) +#define DV_REG_DATA_VAULT_ENTRY_5_6 (0x338) +#define CLP_DV_REG_DATA_VAULT_ENTRY_5_7 (0x1001c33c) +#define DV_REG_DATA_VAULT_ENTRY_5_7 (0x33c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_5_8 (0x1001c340) +#define DV_REG_DATA_VAULT_ENTRY_5_8 (0x340) +#define CLP_DV_REG_DATA_VAULT_ENTRY_5_9 (0x1001c344) +#define DV_REG_DATA_VAULT_ENTRY_5_9 (0x344) +#define CLP_DV_REG_DATA_VAULT_ENTRY_5_10 (0x1001c348) +#define DV_REG_DATA_VAULT_ENTRY_5_10 (0x348) +#define CLP_DV_REG_DATA_VAULT_ENTRY_5_11 (0x1001c34c) +#define DV_REG_DATA_VAULT_ENTRY_5_11 (0x34c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_6_0 (0x1001c350) +#define DV_REG_DATA_VAULT_ENTRY_6_0 (0x350) +#define CLP_DV_REG_DATA_VAULT_ENTRY_6_1 (0x1001c354) +#define DV_REG_DATA_VAULT_ENTRY_6_1 (0x354) +#define CLP_DV_REG_DATA_VAULT_ENTRY_6_2 (0x1001c358) +#define DV_REG_DATA_VAULT_ENTRY_6_2 (0x358) +#define CLP_DV_REG_DATA_VAULT_ENTRY_6_3 (0x1001c35c) +#define DV_REG_DATA_VAULT_ENTRY_6_3 (0x35c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_6_4 (0x1001c360) +#define DV_REG_DATA_VAULT_ENTRY_6_4 (0x360) +#define CLP_DV_REG_DATA_VAULT_ENTRY_6_5 (0x1001c364) +#define DV_REG_DATA_VAULT_ENTRY_6_5 (0x364) +#define CLP_DV_REG_DATA_VAULT_ENTRY_6_6 (0x1001c368) +#define DV_REG_DATA_VAULT_ENTRY_6_6 (0x368) +#define CLP_DV_REG_DATA_VAULT_ENTRY_6_7 (0x1001c36c) +#define DV_REG_DATA_VAULT_ENTRY_6_7 (0x36c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_6_8 (0x1001c370) +#define DV_REG_DATA_VAULT_ENTRY_6_8 (0x370) +#define CLP_DV_REG_DATA_VAULT_ENTRY_6_9 (0x1001c374) +#define DV_REG_DATA_VAULT_ENTRY_6_9 (0x374) +#define CLP_DV_REG_DATA_VAULT_ENTRY_6_10 (0x1001c378) +#define DV_REG_DATA_VAULT_ENTRY_6_10 (0x378) +#define CLP_DV_REG_DATA_VAULT_ENTRY_6_11 (0x1001c37c) +#define DV_REG_DATA_VAULT_ENTRY_6_11 (0x37c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_7_0 (0x1001c380) +#define DV_REG_DATA_VAULT_ENTRY_7_0 (0x380) +#define CLP_DV_REG_DATA_VAULT_ENTRY_7_1 (0x1001c384) +#define DV_REG_DATA_VAULT_ENTRY_7_1 (0x384) +#define CLP_DV_REG_DATA_VAULT_ENTRY_7_2 (0x1001c388) +#define DV_REG_DATA_VAULT_ENTRY_7_2 (0x388) +#define CLP_DV_REG_DATA_VAULT_ENTRY_7_3 (0x1001c38c) +#define DV_REG_DATA_VAULT_ENTRY_7_3 (0x38c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_7_4 (0x1001c390) +#define DV_REG_DATA_VAULT_ENTRY_7_4 (0x390) +#define CLP_DV_REG_DATA_VAULT_ENTRY_7_5 (0x1001c394) +#define DV_REG_DATA_VAULT_ENTRY_7_5 (0x394) +#define CLP_DV_REG_DATA_VAULT_ENTRY_7_6 (0x1001c398) +#define DV_REG_DATA_VAULT_ENTRY_7_6 (0x398) +#define CLP_DV_REG_DATA_VAULT_ENTRY_7_7 (0x1001c39c) +#define DV_REG_DATA_VAULT_ENTRY_7_7 (0x39c) +#define CLP_DV_REG_DATA_VAULT_ENTRY_7_8 (0x1001c3a0) +#define DV_REG_DATA_VAULT_ENTRY_7_8 (0x3a0) +#define CLP_DV_REG_DATA_VAULT_ENTRY_7_9 (0x1001c3a4) +#define DV_REG_DATA_VAULT_ENTRY_7_9 (0x3a4) +#define CLP_DV_REG_DATA_VAULT_ENTRY_7_10 (0x1001c3a8) +#define DV_REG_DATA_VAULT_ENTRY_7_10 (0x3a8) +#define CLP_DV_REG_DATA_VAULT_ENTRY_7_11 (0x1001c3ac) +#define DV_REG_DATA_VAULT_ENTRY_7_11 (0x3ac) +#define CLP_DV_REG_DATA_VAULT_ENTRY_8_0 (0x1001c3b0) +#define DV_REG_DATA_VAULT_ENTRY_8_0 (0x3b0) +#define CLP_DV_REG_DATA_VAULT_ENTRY_8_1 (0x1001c3b4) +#define DV_REG_DATA_VAULT_ENTRY_8_1 (0x3b4) +#define CLP_DV_REG_DATA_VAULT_ENTRY_8_2 (0x1001c3b8) +#define DV_REG_DATA_VAULT_ENTRY_8_2 (0x3b8) +#define CLP_DV_REG_DATA_VAULT_ENTRY_8_3 (0x1001c3bc) +#define DV_REG_DATA_VAULT_ENTRY_8_3 (0x3bc) +#define CLP_DV_REG_DATA_VAULT_ENTRY_8_4 (0x1001c3c0) +#define DV_REG_DATA_VAULT_ENTRY_8_4 (0x3c0) +#define CLP_DV_REG_DATA_VAULT_ENTRY_8_5 (0x1001c3c4) +#define DV_REG_DATA_VAULT_ENTRY_8_5 (0x3c4) +#define CLP_DV_REG_DATA_VAULT_ENTRY_8_6 (0x1001c3c8) +#define DV_REG_DATA_VAULT_ENTRY_8_6 (0x3c8) +#define CLP_DV_REG_DATA_VAULT_ENTRY_8_7 (0x1001c3cc) +#define DV_REG_DATA_VAULT_ENTRY_8_7 (0x3cc) +#define CLP_DV_REG_DATA_VAULT_ENTRY_8_8 (0x1001c3d0) +#define DV_REG_DATA_VAULT_ENTRY_8_8 (0x3d0) +#define CLP_DV_REG_DATA_VAULT_ENTRY_8_9 (0x1001c3d4) +#define DV_REG_DATA_VAULT_ENTRY_8_9 (0x3d4) +#define CLP_DV_REG_DATA_VAULT_ENTRY_8_10 (0x1001c3d8) +#define DV_REG_DATA_VAULT_ENTRY_8_10 (0x3d8) +#define CLP_DV_REG_DATA_VAULT_ENTRY_8_11 (0x1001c3dc) +#define DV_REG_DATA_VAULT_ENTRY_8_11 (0x3dc) +#define CLP_DV_REG_DATA_VAULT_ENTRY_9_0 (0x1001c3e0) +#define DV_REG_DATA_VAULT_ENTRY_9_0 (0x3e0) +#define CLP_DV_REG_DATA_VAULT_ENTRY_9_1 (0x1001c3e4) +#define DV_REG_DATA_VAULT_ENTRY_9_1 (0x3e4) +#define CLP_DV_REG_DATA_VAULT_ENTRY_9_2 (0x1001c3e8) +#define DV_REG_DATA_VAULT_ENTRY_9_2 (0x3e8) +#define CLP_DV_REG_DATA_VAULT_ENTRY_9_3 (0x1001c3ec) +#define DV_REG_DATA_VAULT_ENTRY_9_3 (0x3ec) +#define CLP_DV_REG_DATA_VAULT_ENTRY_9_4 (0x1001c3f0) +#define DV_REG_DATA_VAULT_ENTRY_9_4 (0x3f0) +#define CLP_DV_REG_DATA_VAULT_ENTRY_9_5 (0x1001c3f4) +#define DV_REG_DATA_VAULT_ENTRY_9_5 (0x3f4) +#define CLP_DV_REG_DATA_VAULT_ENTRY_9_6 (0x1001c3f8) +#define DV_REG_DATA_VAULT_ENTRY_9_6 (0x3f8) +#define CLP_DV_REG_DATA_VAULT_ENTRY_9_7 (0x1001c3fc) +#define DV_REG_DATA_VAULT_ENTRY_9_7 (0x3fc) +#define CLP_DV_REG_DATA_VAULT_ENTRY_9_8 (0x1001c400) +#define DV_REG_DATA_VAULT_ENTRY_9_8 (0x400) +#define CLP_DV_REG_DATA_VAULT_ENTRY_9_9 (0x1001c404) +#define DV_REG_DATA_VAULT_ENTRY_9_9 (0x404) +#define CLP_DV_REG_DATA_VAULT_ENTRY_9_10 (0x1001c408) +#define DV_REG_DATA_VAULT_ENTRY_9_10 (0x408) +#define CLP_DV_REG_DATA_VAULT_ENTRY_9_11 (0x1001c40c) +#define DV_REG_DATA_VAULT_ENTRY_9_11 (0x40c) +#define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_0 (0x1001c410) +#define DV_REG_LOCKABLESCRATCHREGCTRL_0 (0x410) +#define DV_REG_LOCKABLESCRATCHREGCTRL_0_LOCK_ENTRY_LOW (0) +#define DV_REG_LOCKABLESCRATCHREGCTRL_0_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_1 (0x1001c414) +#define DV_REG_LOCKABLESCRATCHREGCTRL_1 (0x414) +#define DV_REG_LOCKABLESCRATCHREGCTRL_1_LOCK_ENTRY_LOW (0) +#define DV_REG_LOCKABLESCRATCHREGCTRL_1_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_2 (0x1001c418) +#define DV_REG_LOCKABLESCRATCHREGCTRL_2 (0x418) +#define DV_REG_LOCKABLESCRATCHREGCTRL_2_LOCK_ENTRY_LOW (0) +#define DV_REG_LOCKABLESCRATCHREGCTRL_2_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_3 (0x1001c41c) +#define DV_REG_LOCKABLESCRATCHREGCTRL_3 (0x41c) +#define DV_REG_LOCKABLESCRATCHREGCTRL_3_LOCK_ENTRY_LOW (0) +#define DV_REG_LOCKABLESCRATCHREGCTRL_3_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_4 (0x1001c420) +#define DV_REG_LOCKABLESCRATCHREGCTRL_4 (0x420) +#define DV_REG_LOCKABLESCRATCHREGCTRL_4_LOCK_ENTRY_LOW (0) +#define DV_REG_LOCKABLESCRATCHREGCTRL_4_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_5 (0x1001c424) +#define DV_REG_LOCKABLESCRATCHREGCTRL_5 (0x424) +#define DV_REG_LOCKABLESCRATCHREGCTRL_5_LOCK_ENTRY_LOW (0) +#define DV_REG_LOCKABLESCRATCHREGCTRL_5_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_6 (0x1001c428) +#define DV_REG_LOCKABLESCRATCHREGCTRL_6 (0x428) +#define DV_REG_LOCKABLESCRATCHREGCTRL_6_LOCK_ENTRY_LOW (0) +#define DV_REG_LOCKABLESCRATCHREGCTRL_6_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_7 (0x1001c42c) +#define DV_REG_LOCKABLESCRATCHREGCTRL_7 (0x42c) +#define DV_REG_LOCKABLESCRATCHREGCTRL_7_LOCK_ENTRY_LOW (0) +#define DV_REG_LOCKABLESCRATCHREGCTRL_7_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_8 (0x1001c430) +#define DV_REG_LOCKABLESCRATCHREGCTRL_8 (0x430) +#define DV_REG_LOCKABLESCRATCHREGCTRL_8_LOCK_ENTRY_LOW (0) +#define DV_REG_LOCKABLESCRATCHREGCTRL_8_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_9 (0x1001c434) +#define DV_REG_LOCKABLESCRATCHREGCTRL_9 (0x434) +#define DV_REG_LOCKABLESCRATCHREGCTRL_9_LOCK_ENTRY_LOW (0) +#define DV_REG_LOCKABLESCRATCHREGCTRL_9_LOCK_ENTRY_MASK (0x1) +#define CLP_DV_REG_LOCKABLESCRATCHREG_0 (0x1001c438) +#define DV_REG_LOCKABLESCRATCHREG_0 (0x438) +#define CLP_DV_REG_LOCKABLESCRATCHREG_1 (0x1001c43c) +#define DV_REG_LOCKABLESCRATCHREG_1 (0x43c) +#define CLP_DV_REG_LOCKABLESCRATCHREG_2 (0x1001c440) +#define DV_REG_LOCKABLESCRATCHREG_2 (0x440) +#define CLP_DV_REG_LOCKABLESCRATCHREG_3 (0x1001c444) +#define DV_REG_LOCKABLESCRATCHREG_3 (0x444) +#define CLP_DV_REG_LOCKABLESCRATCHREG_4 (0x1001c448) +#define DV_REG_LOCKABLESCRATCHREG_4 (0x448) +#define CLP_DV_REG_LOCKABLESCRATCHREG_5 (0x1001c44c) +#define DV_REG_LOCKABLESCRATCHREG_5 (0x44c) +#define CLP_DV_REG_LOCKABLESCRATCHREG_6 (0x1001c450) +#define DV_REG_LOCKABLESCRATCHREG_6 (0x450) +#define CLP_DV_REG_LOCKABLESCRATCHREG_7 (0x1001c454) +#define DV_REG_LOCKABLESCRATCHREG_7 (0x454) +#define CLP_DV_REG_LOCKABLESCRATCHREG_8 (0x1001c458) +#define DV_REG_LOCKABLESCRATCHREG_8 (0x458) +#define CLP_DV_REG_LOCKABLESCRATCHREG_9 (0x1001c45c) +#define DV_REG_LOCKABLESCRATCHREG_9 (0x45c) #define CLP_DV_REG_NONSTICKYGENERICSCRATCHREG_0 (0x1001c460) #define DV_REG_NONSTICKYGENERICSCRATCHREG_0 (0x460) #define CLP_DV_REG_NONSTICKYGENERICSCRATCHREG_1 (0x1001c464) @@ -5385,7 +5385,9 @@ #define CLP_SOC_IFC_REG_CPTRA_FLOW_STATUS (0x3003003c) #define SOC_IFC_REG_CPTRA_FLOW_STATUS (0x3c) #define SOC_IFC_REG_CPTRA_FLOW_STATUS_STATUS_LOW (0) -#define SOC_IFC_REG_CPTRA_FLOW_STATUS_STATUS_MASK (0x1ffffff) +#define SOC_IFC_REG_CPTRA_FLOW_STATUS_STATUS_MASK (0xffffff) +#define SOC_IFC_REG_CPTRA_FLOW_STATUS_IDEVID_CSR_READY_LOW (24) +#define SOC_IFC_REG_CPTRA_FLOW_STATUS_IDEVID_CSR_READY_MASK (0x1000000) #define SOC_IFC_REG_CPTRA_FLOW_STATUS_BOOT_FSM_PS_LOW (25) #define SOC_IFC_REG_CPTRA_FLOW_STATUS_BOOT_FSM_PS_MASK (0xe000000) #define SOC_IFC_REG_CPTRA_FLOW_STATUS_READY_FOR_FW_LOW (28) diff --git a/src/integration/rtl/caliptra_reg_defines.svh b/src/integration/rtl/caliptra_reg_defines.svh index 8f9a16d67..1d4a75771 100644 --- a/src/integration/rtl/caliptra_reg_defines.svh +++ b/src/integration/rtl/caliptra_reg_defines.svh @@ -3482,346 +3482,346 @@ `define DV_REG_STICKY_DATA_VAULT_ENTRY_9_10 (32'h200) `define CLP_DV_REG_STICKY_DATA_VAULT_ENTRY_9_11 (32'h1001c204) `define DV_REG_STICKY_DATA_VAULT_ENTRY_9_11 (32'h204) -`define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_0 (32'h1001c208) -`define DV_REG_NONSTICKYDATAVAULTCTRL_0 (32'h208) -`define DV_REG_NONSTICKYDATAVAULTCTRL_0_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYDATAVAULTCTRL_0_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_1 (32'h1001c20c) -`define DV_REG_NONSTICKYDATAVAULTCTRL_1 (32'h20c) -`define DV_REG_NONSTICKYDATAVAULTCTRL_1_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYDATAVAULTCTRL_1_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_2 (32'h1001c210) -`define DV_REG_NONSTICKYDATAVAULTCTRL_2 (32'h210) -`define DV_REG_NONSTICKYDATAVAULTCTRL_2_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYDATAVAULTCTRL_2_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_3 (32'h1001c214) -`define DV_REG_NONSTICKYDATAVAULTCTRL_3 (32'h214) -`define DV_REG_NONSTICKYDATAVAULTCTRL_3_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYDATAVAULTCTRL_3_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_4 (32'h1001c218) -`define DV_REG_NONSTICKYDATAVAULTCTRL_4 (32'h218) -`define DV_REG_NONSTICKYDATAVAULTCTRL_4_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYDATAVAULTCTRL_4_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_5 (32'h1001c21c) -`define DV_REG_NONSTICKYDATAVAULTCTRL_5 (32'h21c) -`define DV_REG_NONSTICKYDATAVAULTCTRL_5_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYDATAVAULTCTRL_5_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_6 (32'h1001c220) -`define DV_REG_NONSTICKYDATAVAULTCTRL_6 (32'h220) -`define DV_REG_NONSTICKYDATAVAULTCTRL_6_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYDATAVAULTCTRL_6_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_7 (32'h1001c224) -`define DV_REG_NONSTICKYDATAVAULTCTRL_7 (32'h224) -`define DV_REG_NONSTICKYDATAVAULTCTRL_7_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYDATAVAULTCTRL_7_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_8 (32'h1001c228) -`define DV_REG_NONSTICKYDATAVAULTCTRL_8 (32'h228) -`define DV_REG_NONSTICKYDATAVAULTCTRL_8_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYDATAVAULTCTRL_8_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYDATAVAULTCTRL_9 (32'h1001c22c) -`define DV_REG_NONSTICKYDATAVAULTCTRL_9 (32'h22c) -`define DV_REG_NONSTICKYDATAVAULTCTRL_9_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYDATAVAULTCTRL_9_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_0 (32'h1001c230) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_0 (32'h230) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_1 (32'h1001c234) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_1 (32'h234) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_2 (32'h1001c238) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_2 (32'h238) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_3 (32'h1001c23c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_3 (32'h23c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_4 (32'h1001c240) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_4 (32'h240) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_5 (32'h1001c244) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_5 (32'h244) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_6 (32'h1001c248) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_6 (32'h248) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_7 (32'h1001c24c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_7 (32'h24c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_8 (32'h1001c250) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_8 (32'h250) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_9 (32'h1001c254) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_9 (32'h254) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_10 (32'h1001c258) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_10 (32'h258) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_11 (32'h1001c25c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_11 (32'h25c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_0 (32'h1001c260) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_0 (32'h260) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_1 (32'h1001c264) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_1 (32'h264) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_2 (32'h1001c268) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_2 (32'h268) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_3 (32'h1001c26c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_3 (32'h26c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_4 (32'h1001c270) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_4 (32'h270) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_5 (32'h1001c274) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_5 (32'h274) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_6 (32'h1001c278) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_6 (32'h278) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_7 (32'h1001c27c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_7 (32'h27c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_8 (32'h1001c280) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_8 (32'h280) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_9 (32'h1001c284) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_9 (32'h284) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_10 (32'h1001c288) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_10 (32'h288) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_11 (32'h1001c28c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_11 (32'h28c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_0 (32'h1001c290) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_0 (32'h290) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_1 (32'h1001c294) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_1 (32'h294) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_2 (32'h1001c298) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_2 (32'h298) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_3 (32'h1001c29c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_3 (32'h29c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_4 (32'h1001c2a0) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_4 (32'h2a0) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_5 (32'h1001c2a4) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_5 (32'h2a4) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_6 (32'h1001c2a8) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_6 (32'h2a8) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_7 (32'h1001c2ac) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_7 (32'h2ac) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_8 (32'h1001c2b0) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_8 (32'h2b0) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_9 (32'h1001c2b4) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_9 (32'h2b4) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_10 (32'h1001c2b8) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_10 (32'h2b8) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_11 (32'h1001c2bc) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_11 (32'h2bc) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_0 (32'h1001c2c0) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_0 (32'h2c0) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_1 (32'h1001c2c4) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_1 (32'h2c4) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_2 (32'h1001c2c8) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_2 (32'h2c8) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_3 (32'h1001c2cc) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_3 (32'h2cc) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_4 (32'h1001c2d0) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_4 (32'h2d0) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_5 (32'h1001c2d4) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_5 (32'h2d4) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_6 (32'h1001c2d8) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_6 (32'h2d8) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_7 (32'h1001c2dc) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_7 (32'h2dc) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_8 (32'h1001c2e0) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_8 (32'h2e0) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_9 (32'h1001c2e4) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_9 (32'h2e4) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_10 (32'h1001c2e8) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_10 (32'h2e8) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_11 (32'h1001c2ec) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_11 (32'h2ec) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_0 (32'h1001c2f0) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_0 (32'h2f0) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_1 (32'h1001c2f4) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_1 (32'h2f4) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_2 (32'h1001c2f8) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_2 (32'h2f8) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_3 (32'h1001c2fc) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_3 (32'h2fc) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_4 (32'h1001c300) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_4 (32'h300) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_5 (32'h1001c304) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_5 (32'h304) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_6 (32'h1001c308) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_6 (32'h308) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_7 (32'h1001c30c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_7 (32'h30c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_8 (32'h1001c310) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_8 (32'h310) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_9 (32'h1001c314) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_9 (32'h314) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_10 (32'h1001c318) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_10 (32'h318) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_11 (32'h1001c31c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_11 (32'h31c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_0 (32'h1001c320) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_0 (32'h320) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_1 (32'h1001c324) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_1 (32'h324) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_2 (32'h1001c328) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_2 (32'h328) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_3 (32'h1001c32c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_3 (32'h32c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_4 (32'h1001c330) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_4 (32'h330) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_5 (32'h1001c334) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_5 (32'h334) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_6 (32'h1001c338) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_6 (32'h338) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_7 (32'h1001c33c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_7 (32'h33c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_8 (32'h1001c340) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_8 (32'h340) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_9 (32'h1001c344) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_9 (32'h344) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_10 (32'h1001c348) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_10 (32'h348) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_11 (32'h1001c34c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_11 (32'h34c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_0 (32'h1001c350) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_0 (32'h350) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_1 (32'h1001c354) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_1 (32'h354) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_2 (32'h1001c358) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_2 (32'h358) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_3 (32'h1001c35c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_3 (32'h35c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_4 (32'h1001c360) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_4 (32'h360) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_5 (32'h1001c364) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_5 (32'h364) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_6 (32'h1001c368) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_6 (32'h368) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_7 (32'h1001c36c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_7 (32'h36c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_8 (32'h1001c370) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_8 (32'h370) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_9 (32'h1001c374) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_9 (32'h374) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_10 (32'h1001c378) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_10 (32'h378) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_11 (32'h1001c37c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_11 (32'h37c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_0 (32'h1001c380) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_0 (32'h380) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_1 (32'h1001c384) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_1 (32'h384) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_2 (32'h1001c388) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_2 (32'h388) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_3 (32'h1001c38c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_3 (32'h38c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_4 (32'h1001c390) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_4 (32'h390) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_5 (32'h1001c394) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_5 (32'h394) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_6 (32'h1001c398) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_6 (32'h398) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_7 (32'h1001c39c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_7 (32'h39c) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_8 (32'h1001c3a0) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_8 (32'h3a0) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_9 (32'h1001c3a4) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_9 (32'h3a4) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_10 (32'h1001c3a8) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_10 (32'h3a8) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_11 (32'h1001c3ac) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_11 (32'h3ac) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_0 (32'h1001c3b0) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_0 (32'h3b0) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_1 (32'h1001c3b4) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_1 (32'h3b4) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_2 (32'h1001c3b8) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_2 (32'h3b8) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_3 (32'h1001c3bc) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_3 (32'h3bc) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_4 (32'h1001c3c0) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_4 (32'h3c0) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_5 (32'h1001c3c4) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_5 (32'h3c4) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_6 (32'h1001c3c8) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_6 (32'h3c8) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_7 (32'h1001c3cc) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_7 (32'h3cc) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_8 (32'h1001c3d0) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_8 (32'h3d0) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_9 (32'h1001c3d4) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_9 (32'h3d4) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_10 (32'h1001c3d8) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_10 (32'h3d8) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_11 (32'h1001c3dc) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_11 (32'h3dc) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_0 (32'h1001c3e0) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_0 (32'h3e0) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_1 (32'h1001c3e4) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_1 (32'h3e4) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_2 (32'h1001c3e8) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_2 (32'h3e8) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_3 (32'h1001c3ec) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_3 (32'h3ec) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_4 (32'h1001c3f0) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_4 (32'h3f0) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_5 (32'h1001c3f4) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_5 (32'h3f4) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_6 (32'h1001c3f8) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_6 (32'h3f8) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_7 (32'h1001c3fc) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_7 (32'h3fc) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_8 (32'h1001c400) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_8 (32'h400) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_9 (32'h1001c404) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_9 (32'h404) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_10 (32'h1001c408) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_10 (32'h408) -`define CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_11 (32'h1001c40c) -`define DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_11 (32'h40c) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_0 (32'h1001c410) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_0 (32'h410) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_0_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_0_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_1 (32'h1001c414) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_1 (32'h414) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_1_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_1_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_2 (32'h1001c418) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_2 (32'h418) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_2_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_2_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_3 (32'h1001c41c) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_3 (32'h41c) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_3_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_3_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_4 (32'h1001c420) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_4 (32'h420) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_4_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_4_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_5 (32'h1001c424) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_5 (32'h424) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_5_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_5_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_6 (32'h1001c428) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_6 (32'h428) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_6_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_6_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_7 (32'h1001c42c) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_7 (32'h42c) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_7_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_7_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_8 (32'h1001c430) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_8 (32'h430) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_8_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_8_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_9 (32'h1001c434) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_9 (32'h434) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_9_LOCK_ENTRY_LOW (0) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_9_LOCK_ENTRY_MASK (32'h1) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_0 (32'h1001c438) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREG_0 (32'h438) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_1 (32'h1001c43c) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREG_1 (32'h43c) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_2 (32'h1001c440) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREG_2 (32'h440) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_3 (32'h1001c444) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREG_3 (32'h444) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_4 (32'h1001c448) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREG_4 (32'h448) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_5 (32'h1001c44c) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREG_5 (32'h44c) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_6 (32'h1001c450) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREG_6 (32'h450) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_7 (32'h1001c454) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREG_7 (32'h454) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_8 (32'h1001c458) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREG_8 (32'h458) -`define CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_9 (32'h1001c45c) -`define DV_REG_NONSTICKYLOCKABLESCRATCHREG_9 (32'h45c) +`define CLP_DV_REG_DATAVAULTCTRL_0 (32'h1001c208) +`define DV_REG_DATAVAULTCTRL_0 (32'h208) +`define DV_REG_DATAVAULTCTRL_0_LOCK_ENTRY_LOW (0) +`define DV_REG_DATAVAULTCTRL_0_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_DATAVAULTCTRL_1 (32'h1001c20c) +`define DV_REG_DATAVAULTCTRL_1 (32'h20c) +`define DV_REG_DATAVAULTCTRL_1_LOCK_ENTRY_LOW (0) +`define DV_REG_DATAVAULTCTRL_1_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_DATAVAULTCTRL_2 (32'h1001c210) +`define DV_REG_DATAVAULTCTRL_2 (32'h210) +`define DV_REG_DATAVAULTCTRL_2_LOCK_ENTRY_LOW (0) +`define DV_REG_DATAVAULTCTRL_2_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_DATAVAULTCTRL_3 (32'h1001c214) +`define DV_REG_DATAVAULTCTRL_3 (32'h214) +`define DV_REG_DATAVAULTCTRL_3_LOCK_ENTRY_LOW (0) +`define DV_REG_DATAVAULTCTRL_3_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_DATAVAULTCTRL_4 (32'h1001c218) +`define DV_REG_DATAVAULTCTRL_4 (32'h218) +`define DV_REG_DATAVAULTCTRL_4_LOCK_ENTRY_LOW (0) +`define DV_REG_DATAVAULTCTRL_4_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_DATAVAULTCTRL_5 (32'h1001c21c) +`define DV_REG_DATAVAULTCTRL_5 (32'h21c) +`define DV_REG_DATAVAULTCTRL_5_LOCK_ENTRY_LOW (0) +`define DV_REG_DATAVAULTCTRL_5_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_DATAVAULTCTRL_6 (32'h1001c220) +`define DV_REG_DATAVAULTCTRL_6 (32'h220) +`define DV_REG_DATAVAULTCTRL_6_LOCK_ENTRY_LOW (0) +`define DV_REG_DATAVAULTCTRL_6_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_DATAVAULTCTRL_7 (32'h1001c224) +`define DV_REG_DATAVAULTCTRL_7 (32'h224) +`define DV_REG_DATAVAULTCTRL_7_LOCK_ENTRY_LOW (0) +`define DV_REG_DATAVAULTCTRL_7_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_DATAVAULTCTRL_8 (32'h1001c228) +`define DV_REG_DATAVAULTCTRL_8 (32'h228) +`define DV_REG_DATAVAULTCTRL_8_LOCK_ENTRY_LOW (0) +`define DV_REG_DATAVAULTCTRL_8_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_DATAVAULTCTRL_9 (32'h1001c22c) +`define DV_REG_DATAVAULTCTRL_9 (32'h22c) +`define DV_REG_DATAVAULTCTRL_9_LOCK_ENTRY_LOW (0) +`define DV_REG_DATAVAULTCTRL_9_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_DATA_VAULT_ENTRY_0_0 (32'h1001c230) +`define DV_REG_DATA_VAULT_ENTRY_0_0 (32'h230) +`define CLP_DV_REG_DATA_VAULT_ENTRY_0_1 (32'h1001c234) +`define DV_REG_DATA_VAULT_ENTRY_0_1 (32'h234) +`define CLP_DV_REG_DATA_VAULT_ENTRY_0_2 (32'h1001c238) +`define DV_REG_DATA_VAULT_ENTRY_0_2 (32'h238) +`define CLP_DV_REG_DATA_VAULT_ENTRY_0_3 (32'h1001c23c) +`define DV_REG_DATA_VAULT_ENTRY_0_3 (32'h23c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_0_4 (32'h1001c240) +`define DV_REG_DATA_VAULT_ENTRY_0_4 (32'h240) +`define CLP_DV_REG_DATA_VAULT_ENTRY_0_5 (32'h1001c244) +`define DV_REG_DATA_VAULT_ENTRY_0_5 (32'h244) +`define CLP_DV_REG_DATA_VAULT_ENTRY_0_6 (32'h1001c248) +`define DV_REG_DATA_VAULT_ENTRY_0_6 (32'h248) +`define CLP_DV_REG_DATA_VAULT_ENTRY_0_7 (32'h1001c24c) +`define DV_REG_DATA_VAULT_ENTRY_0_7 (32'h24c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_0_8 (32'h1001c250) +`define DV_REG_DATA_VAULT_ENTRY_0_8 (32'h250) +`define CLP_DV_REG_DATA_VAULT_ENTRY_0_9 (32'h1001c254) +`define DV_REG_DATA_VAULT_ENTRY_0_9 (32'h254) +`define CLP_DV_REG_DATA_VAULT_ENTRY_0_10 (32'h1001c258) +`define DV_REG_DATA_VAULT_ENTRY_0_10 (32'h258) +`define CLP_DV_REG_DATA_VAULT_ENTRY_0_11 (32'h1001c25c) +`define DV_REG_DATA_VAULT_ENTRY_0_11 (32'h25c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_1_0 (32'h1001c260) +`define DV_REG_DATA_VAULT_ENTRY_1_0 (32'h260) +`define CLP_DV_REG_DATA_VAULT_ENTRY_1_1 (32'h1001c264) +`define DV_REG_DATA_VAULT_ENTRY_1_1 (32'h264) +`define CLP_DV_REG_DATA_VAULT_ENTRY_1_2 (32'h1001c268) +`define DV_REG_DATA_VAULT_ENTRY_1_2 (32'h268) +`define CLP_DV_REG_DATA_VAULT_ENTRY_1_3 (32'h1001c26c) +`define DV_REG_DATA_VAULT_ENTRY_1_3 (32'h26c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_1_4 (32'h1001c270) +`define DV_REG_DATA_VAULT_ENTRY_1_4 (32'h270) +`define CLP_DV_REG_DATA_VAULT_ENTRY_1_5 (32'h1001c274) +`define DV_REG_DATA_VAULT_ENTRY_1_5 (32'h274) +`define CLP_DV_REG_DATA_VAULT_ENTRY_1_6 (32'h1001c278) +`define DV_REG_DATA_VAULT_ENTRY_1_6 (32'h278) +`define CLP_DV_REG_DATA_VAULT_ENTRY_1_7 (32'h1001c27c) +`define DV_REG_DATA_VAULT_ENTRY_1_7 (32'h27c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_1_8 (32'h1001c280) +`define DV_REG_DATA_VAULT_ENTRY_1_8 (32'h280) +`define CLP_DV_REG_DATA_VAULT_ENTRY_1_9 (32'h1001c284) +`define DV_REG_DATA_VAULT_ENTRY_1_9 (32'h284) +`define CLP_DV_REG_DATA_VAULT_ENTRY_1_10 (32'h1001c288) +`define DV_REG_DATA_VAULT_ENTRY_1_10 (32'h288) +`define CLP_DV_REG_DATA_VAULT_ENTRY_1_11 (32'h1001c28c) +`define DV_REG_DATA_VAULT_ENTRY_1_11 (32'h28c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_2_0 (32'h1001c290) +`define DV_REG_DATA_VAULT_ENTRY_2_0 (32'h290) +`define CLP_DV_REG_DATA_VAULT_ENTRY_2_1 (32'h1001c294) +`define DV_REG_DATA_VAULT_ENTRY_2_1 (32'h294) +`define CLP_DV_REG_DATA_VAULT_ENTRY_2_2 (32'h1001c298) +`define DV_REG_DATA_VAULT_ENTRY_2_2 (32'h298) +`define CLP_DV_REG_DATA_VAULT_ENTRY_2_3 (32'h1001c29c) +`define DV_REG_DATA_VAULT_ENTRY_2_3 (32'h29c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_2_4 (32'h1001c2a0) +`define DV_REG_DATA_VAULT_ENTRY_2_4 (32'h2a0) +`define CLP_DV_REG_DATA_VAULT_ENTRY_2_5 (32'h1001c2a4) +`define DV_REG_DATA_VAULT_ENTRY_2_5 (32'h2a4) +`define CLP_DV_REG_DATA_VAULT_ENTRY_2_6 (32'h1001c2a8) +`define DV_REG_DATA_VAULT_ENTRY_2_6 (32'h2a8) +`define CLP_DV_REG_DATA_VAULT_ENTRY_2_7 (32'h1001c2ac) +`define DV_REG_DATA_VAULT_ENTRY_2_7 (32'h2ac) +`define CLP_DV_REG_DATA_VAULT_ENTRY_2_8 (32'h1001c2b0) +`define DV_REG_DATA_VAULT_ENTRY_2_8 (32'h2b0) +`define CLP_DV_REG_DATA_VAULT_ENTRY_2_9 (32'h1001c2b4) +`define DV_REG_DATA_VAULT_ENTRY_2_9 (32'h2b4) +`define CLP_DV_REG_DATA_VAULT_ENTRY_2_10 (32'h1001c2b8) +`define DV_REG_DATA_VAULT_ENTRY_2_10 (32'h2b8) +`define CLP_DV_REG_DATA_VAULT_ENTRY_2_11 (32'h1001c2bc) +`define DV_REG_DATA_VAULT_ENTRY_2_11 (32'h2bc) +`define CLP_DV_REG_DATA_VAULT_ENTRY_3_0 (32'h1001c2c0) +`define DV_REG_DATA_VAULT_ENTRY_3_0 (32'h2c0) +`define CLP_DV_REG_DATA_VAULT_ENTRY_3_1 (32'h1001c2c4) +`define DV_REG_DATA_VAULT_ENTRY_3_1 (32'h2c4) +`define CLP_DV_REG_DATA_VAULT_ENTRY_3_2 (32'h1001c2c8) +`define DV_REG_DATA_VAULT_ENTRY_3_2 (32'h2c8) +`define CLP_DV_REG_DATA_VAULT_ENTRY_3_3 (32'h1001c2cc) +`define DV_REG_DATA_VAULT_ENTRY_3_3 (32'h2cc) +`define CLP_DV_REG_DATA_VAULT_ENTRY_3_4 (32'h1001c2d0) +`define DV_REG_DATA_VAULT_ENTRY_3_4 (32'h2d0) +`define CLP_DV_REG_DATA_VAULT_ENTRY_3_5 (32'h1001c2d4) +`define DV_REG_DATA_VAULT_ENTRY_3_5 (32'h2d4) +`define CLP_DV_REG_DATA_VAULT_ENTRY_3_6 (32'h1001c2d8) +`define DV_REG_DATA_VAULT_ENTRY_3_6 (32'h2d8) +`define CLP_DV_REG_DATA_VAULT_ENTRY_3_7 (32'h1001c2dc) +`define DV_REG_DATA_VAULT_ENTRY_3_7 (32'h2dc) +`define CLP_DV_REG_DATA_VAULT_ENTRY_3_8 (32'h1001c2e0) +`define DV_REG_DATA_VAULT_ENTRY_3_8 (32'h2e0) +`define CLP_DV_REG_DATA_VAULT_ENTRY_3_9 (32'h1001c2e4) +`define DV_REG_DATA_VAULT_ENTRY_3_9 (32'h2e4) +`define CLP_DV_REG_DATA_VAULT_ENTRY_3_10 (32'h1001c2e8) +`define DV_REG_DATA_VAULT_ENTRY_3_10 (32'h2e8) +`define CLP_DV_REG_DATA_VAULT_ENTRY_3_11 (32'h1001c2ec) +`define DV_REG_DATA_VAULT_ENTRY_3_11 (32'h2ec) +`define CLP_DV_REG_DATA_VAULT_ENTRY_4_0 (32'h1001c2f0) +`define DV_REG_DATA_VAULT_ENTRY_4_0 (32'h2f0) +`define CLP_DV_REG_DATA_VAULT_ENTRY_4_1 (32'h1001c2f4) +`define DV_REG_DATA_VAULT_ENTRY_4_1 (32'h2f4) +`define CLP_DV_REG_DATA_VAULT_ENTRY_4_2 (32'h1001c2f8) +`define DV_REG_DATA_VAULT_ENTRY_4_2 (32'h2f8) +`define CLP_DV_REG_DATA_VAULT_ENTRY_4_3 (32'h1001c2fc) +`define DV_REG_DATA_VAULT_ENTRY_4_3 (32'h2fc) +`define CLP_DV_REG_DATA_VAULT_ENTRY_4_4 (32'h1001c300) +`define DV_REG_DATA_VAULT_ENTRY_4_4 (32'h300) +`define CLP_DV_REG_DATA_VAULT_ENTRY_4_5 (32'h1001c304) +`define DV_REG_DATA_VAULT_ENTRY_4_5 (32'h304) +`define CLP_DV_REG_DATA_VAULT_ENTRY_4_6 (32'h1001c308) +`define DV_REG_DATA_VAULT_ENTRY_4_6 (32'h308) +`define CLP_DV_REG_DATA_VAULT_ENTRY_4_7 (32'h1001c30c) +`define DV_REG_DATA_VAULT_ENTRY_4_7 (32'h30c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_4_8 (32'h1001c310) +`define DV_REG_DATA_VAULT_ENTRY_4_8 (32'h310) +`define CLP_DV_REG_DATA_VAULT_ENTRY_4_9 (32'h1001c314) +`define DV_REG_DATA_VAULT_ENTRY_4_9 (32'h314) +`define CLP_DV_REG_DATA_VAULT_ENTRY_4_10 (32'h1001c318) +`define DV_REG_DATA_VAULT_ENTRY_4_10 (32'h318) +`define CLP_DV_REG_DATA_VAULT_ENTRY_4_11 (32'h1001c31c) +`define DV_REG_DATA_VAULT_ENTRY_4_11 (32'h31c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_5_0 (32'h1001c320) +`define DV_REG_DATA_VAULT_ENTRY_5_0 (32'h320) +`define CLP_DV_REG_DATA_VAULT_ENTRY_5_1 (32'h1001c324) +`define DV_REG_DATA_VAULT_ENTRY_5_1 (32'h324) +`define CLP_DV_REG_DATA_VAULT_ENTRY_5_2 (32'h1001c328) +`define DV_REG_DATA_VAULT_ENTRY_5_2 (32'h328) +`define CLP_DV_REG_DATA_VAULT_ENTRY_5_3 (32'h1001c32c) +`define DV_REG_DATA_VAULT_ENTRY_5_3 (32'h32c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_5_4 (32'h1001c330) +`define DV_REG_DATA_VAULT_ENTRY_5_4 (32'h330) +`define CLP_DV_REG_DATA_VAULT_ENTRY_5_5 (32'h1001c334) +`define DV_REG_DATA_VAULT_ENTRY_5_5 (32'h334) +`define CLP_DV_REG_DATA_VAULT_ENTRY_5_6 (32'h1001c338) +`define DV_REG_DATA_VAULT_ENTRY_5_6 (32'h338) +`define CLP_DV_REG_DATA_VAULT_ENTRY_5_7 (32'h1001c33c) +`define DV_REG_DATA_VAULT_ENTRY_5_7 (32'h33c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_5_8 (32'h1001c340) +`define DV_REG_DATA_VAULT_ENTRY_5_8 (32'h340) +`define CLP_DV_REG_DATA_VAULT_ENTRY_5_9 (32'h1001c344) +`define DV_REG_DATA_VAULT_ENTRY_5_9 (32'h344) +`define CLP_DV_REG_DATA_VAULT_ENTRY_5_10 (32'h1001c348) +`define DV_REG_DATA_VAULT_ENTRY_5_10 (32'h348) +`define CLP_DV_REG_DATA_VAULT_ENTRY_5_11 (32'h1001c34c) +`define DV_REG_DATA_VAULT_ENTRY_5_11 (32'h34c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_6_0 (32'h1001c350) +`define DV_REG_DATA_VAULT_ENTRY_6_0 (32'h350) +`define CLP_DV_REG_DATA_VAULT_ENTRY_6_1 (32'h1001c354) +`define DV_REG_DATA_VAULT_ENTRY_6_1 (32'h354) +`define CLP_DV_REG_DATA_VAULT_ENTRY_6_2 (32'h1001c358) +`define DV_REG_DATA_VAULT_ENTRY_6_2 (32'h358) +`define CLP_DV_REG_DATA_VAULT_ENTRY_6_3 (32'h1001c35c) +`define DV_REG_DATA_VAULT_ENTRY_6_3 (32'h35c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_6_4 (32'h1001c360) +`define DV_REG_DATA_VAULT_ENTRY_6_4 (32'h360) +`define CLP_DV_REG_DATA_VAULT_ENTRY_6_5 (32'h1001c364) +`define DV_REG_DATA_VAULT_ENTRY_6_5 (32'h364) +`define CLP_DV_REG_DATA_VAULT_ENTRY_6_6 (32'h1001c368) +`define DV_REG_DATA_VAULT_ENTRY_6_6 (32'h368) +`define CLP_DV_REG_DATA_VAULT_ENTRY_6_7 (32'h1001c36c) +`define DV_REG_DATA_VAULT_ENTRY_6_7 (32'h36c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_6_8 (32'h1001c370) +`define DV_REG_DATA_VAULT_ENTRY_6_8 (32'h370) +`define CLP_DV_REG_DATA_VAULT_ENTRY_6_9 (32'h1001c374) +`define DV_REG_DATA_VAULT_ENTRY_6_9 (32'h374) +`define CLP_DV_REG_DATA_VAULT_ENTRY_6_10 (32'h1001c378) +`define DV_REG_DATA_VAULT_ENTRY_6_10 (32'h378) +`define CLP_DV_REG_DATA_VAULT_ENTRY_6_11 (32'h1001c37c) +`define DV_REG_DATA_VAULT_ENTRY_6_11 (32'h37c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_7_0 (32'h1001c380) +`define DV_REG_DATA_VAULT_ENTRY_7_0 (32'h380) +`define CLP_DV_REG_DATA_VAULT_ENTRY_7_1 (32'h1001c384) +`define DV_REG_DATA_VAULT_ENTRY_7_1 (32'h384) +`define CLP_DV_REG_DATA_VAULT_ENTRY_7_2 (32'h1001c388) +`define DV_REG_DATA_VAULT_ENTRY_7_2 (32'h388) +`define CLP_DV_REG_DATA_VAULT_ENTRY_7_3 (32'h1001c38c) +`define DV_REG_DATA_VAULT_ENTRY_7_3 (32'h38c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_7_4 (32'h1001c390) +`define DV_REG_DATA_VAULT_ENTRY_7_4 (32'h390) +`define CLP_DV_REG_DATA_VAULT_ENTRY_7_5 (32'h1001c394) +`define DV_REG_DATA_VAULT_ENTRY_7_5 (32'h394) +`define CLP_DV_REG_DATA_VAULT_ENTRY_7_6 (32'h1001c398) +`define DV_REG_DATA_VAULT_ENTRY_7_6 (32'h398) +`define CLP_DV_REG_DATA_VAULT_ENTRY_7_7 (32'h1001c39c) +`define DV_REG_DATA_VAULT_ENTRY_7_7 (32'h39c) +`define CLP_DV_REG_DATA_VAULT_ENTRY_7_8 (32'h1001c3a0) +`define DV_REG_DATA_VAULT_ENTRY_7_8 (32'h3a0) +`define CLP_DV_REG_DATA_VAULT_ENTRY_7_9 (32'h1001c3a4) +`define DV_REG_DATA_VAULT_ENTRY_7_9 (32'h3a4) +`define CLP_DV_REG_DATA_VAULT_ENTRY_7_10 (32'h1001c3a8) +`define DV_REG_DATA_VAULT_ENTRY_7_10 (32'h3a8) +`define CLP_DV_REG_DATA_VAULT_ENTRY_7_11 (32'h1001c3ac) +`define DV_REG_DATA_VAULT_ENTRY_7_11 (32'h3ac) +`define CLP_DV_REG_DATA_VAULT_ENTRY_8_0 (32'h1001c3b0) +`define DV_REG_DATA_VAULT_ENTRY_8_0 (32'h3b0) +`define CLP_DV_REG_DATA_VAULT_ENTRY_8_1 (32'h1001c3b4) +`define DV_REG_DATA_VAULT_ENTRY_8_1 (32'h3b4) +`define CLP_DV_REG_DATA_VAULT_ENTRY_8_2 (32'h1001c3b8) +`define DV_REG_DATA_VAULT_ENTRY_8_2 (32'h3b8) +`define CLP_DV_REG_DATA_VAULT_ENTRY_8_3 (32'h1001c3bc) +`define DV_REG_DATA_VAULT_ENTRY_8_3 (32'h3bc) +`define CLP_DV_REG_DATA_VAULT_ENTRY_8_4 (32'h1001c3c0) +`define DV_REG_DATA_VAULT_ENTRY_8_4 (32'h3c0) +`define CLP_DV_REG_DATA_VAULT_ENTRY_8_5 (32'h1001c3c4) +`define DV_REG_DATA_VAULT_ENTRY_8_5 (32'h3c4) +`define CLP_DV_REG_DATA_VAULT_ENTRY_8_6 (32'h1001c3c8) +`define DV_REG_DATA_VAULT_ENTRY_8_6 (32'h3c8) +`define CLP_DV_REG_DATA_VAULT_ENTRY_8_7 (32'h1001c3cc) +`define DV_REG_DATA_VAULT_ENTRY_8_7 (32'h3cc) +`define CLP_DV_REG_DATA_VAULT_ENTRY_8_8 (32'h1001c3d0) +`define DV_REG_DATA_VAULT_ENTRY_8_8 (32'h3d0) +`define CLP_DV_REG_DATA_VAULT_ENTRY_8_9 (32'h1001c3d4) +`define DV_REG_DATA_VAULT_ENTRY_8_9 (32'h3d4) +`define CLP_DV_REG_DATA_VAULT_ENTRY_8_10 (32'h1001c3d8) +`define DV_REG_DATA_VAULT_ENTRY_8_10 (32'h3d8) +`define CLP_DV_REG_DATA_VAULT_ENTRY_8_11 (32'h1001c3dc) +`define DV_REG_DATA_VAULT_ENTRY_8_11 (32'h3dc) +`define CLP_DV_REG_DATA_VAULT_ENTRY_9_0 (32'h1001c3e0) +`define DV_REG_DATA_VAULT_ENTRY_9_0 (32'h3e0) +`define CLP_DV_REG_DATA_VAULT_ENTRY_9_1 (32'h1001c3e4) +`define DV_REG_DATA_VAULT_ENTRY_9_1 (32'h3e4) +`define CLP_DV_REG_DATA_VAULT_ENTRY_9_2 (32'h1001c3e8) +`define DV_REG_DATA_VAULT_ENTRY_9_2 (32'h3e8) +`define CLP_DV_REG_DATA_VAULT_ENTRY_9_3 (32'h1001c3ec) +`define DV_REG_DATA_VAULT_ENTRY_9_3 (32'h3ec) +`define CLP_DV_REG_DATA_VAULT_ENTRY_9_4 (32'h1001c3f0) +`define DV_REG_DATA_VAULT_ENTRY_9_4 (32'h3f0) +`define CLP_DV_REG_DATA_VAULT_ENTRY_9_5 (32'h1001c3f4) +`define DV_REG_DATA_VAULT_ENTRY_9_5 (32'h3f4) +`define CLP_DV_REG_DATA_VAULT_ENTRY_9_6 (32'h1001c3f8) +`define DV_REG_DATA_VAULT_ENTRY_9_6 (32'h3f8) +`define CLP_DV_REG_DATA_VAULT_ENTRY_9_7 (32'h1001c3fc) +`define DV_REG_DATA_VAULT_ENTRY_9_7 (32'h3fc) +`define CLP_DV_REG_DATA_VAULT_ENTRY_9_8 (32'h1001c400) +`define DV_REG_DATA_VAULT_ENTRY_9_8 (32'h400) +`define CLP_DV_REG_DATA_VAULT_ENTRY_9_9 (32'h1001c404) +`define DV_REG_DATA_VAULT_ENTRY_9_9 (32'h404) +`define CLP_DV_REG_DATA_VAULT_ENTRY_9_10 (32'h1001c408) +`define DV_REG_DATA_VAULT_ENTRY_9_10 (32'h408) +`define CLP_DV_REG_DATA_VAULT_ENTRY_9_11 (32'h1001c40c) +`define DV_REG_DATA_VAULT_ENTRY_9_11 (32'h40c) +`define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_0 (32'h1001c410) +`define DV_REG_LOCKABLESCRATCHREGCTRL_0 (32'h410) +`define DV_REG_LOCKABLESCRATCHREGCTRL_0_LOCK_ENTRY_LOW (0) +`define DV_REG_LOCKABLESCRATCHREGCTRL_0_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_1 (32'h1001c414) +`define DV_REG_LOCKABLESCRATCHREGCTRL_1 (32'h414) +`define DV_REG_LOCKABLESCRATCHREGCTRL_1_LOCK_ENTRY_LOW (0) +`define DV_REG_LOCKABLESCRATCHREGCTRL_1_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_2 (32'h1001c418) +`define DV_REG_LOCKABLESCRATCHREGCTRL_2 (32'h418) +`define DV_REG_LOCKABLESCRATCHREGCTRL_2_LOCK_ENTRY_LOW (0) +`define DV_REG_LOCKABLESCRATCHREGCTRL_2_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_3 (32'h1001c41c) +`define DV_REG_LOCKABLESCRATCHREGCTRL_3 (32'h41c) +`define DV_REG_LOCKABLESCRATCHREGCTRL_3_LOCK_ENTRY_LOW (0) +`define DV_REG_LOCKABLESCRATCHREGCTRL_3_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_4 (32'h1001c420) +`define DV_REG_LOCKABLESCRATCHREGCTRL_4 (32'h420) +`define DV_REG_LOCKABLESCRATCHREGCTRL_4_LOCK_ENTRY_LOW (0) +`define DV_REG_LOCKABLESCRATCHREGCTRL_4_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_5 (32'h1001c424) +`define DV_REG_LOCKABLESCRATCHREGCTRL_5 (32'h424) +`define DV_REG_LOCKABLESCRATCHREGCTRL_5_LOCK_ENTRY_LOW (0) +`define DV_REG_LOCKABLESCRATCHREGCTRL_5_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_6 (32'h1001c428) +`define DV_REG_LOCKABLESCRATCHREGCTRL_6 (32'h428) +`define DV_REG_LOCKABLESCRATCHREGCTRL_6_LOCK_ENTRY_LOW (0) +`define DV_REG_LOCKABLESCRATCHREGCTRL_6_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_7 (32'h1001c42c) +`define DV_REG_LOCKABLESCRATCHREGCTRL_7 (32'h42c) +`define DV_REG_LOCKABLESCRATCHREGCTRL_7_LOCK_ENTRY_LOW (0) +`define DV_REG_LOCKABLESCRATCHREGCTRL_7_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_8 (32'h1001c430) +`define DV_REG_LOCKABLESCRATCHREGCTRL_8 (32'h430) +`define DV_REG_LOCKABLESCRATCHREGCTRL_8_LOCK_ENTRY_LOW (0) +`define DV_REG_LOCKABLESCRATCHREGCTRL_8_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_LOCKABLESCRATCHREGCTRL_9 (32'h1001c434) +`define DV_REG_LOCKABLESCRATCHREGCTRL_9 (32'h434) +`define DV_REG_LOCKABLESCRATCHREGCTRL_9_LOCK_ENTRY_LOW (0) +`define DV_REG_LOCKABLESCRATCHREGCTRL_9_LOCK_ENTRY_MASK (32'h1) +`define CLP_DV_REG_LOCKABLESCRATCHREG_0 (32'h1001c438) +`define DV_REG_LOCKABLESCRATCHREG_0 (32'h438) +`define CLP_DV_REG_LOCKABLESCRATCHREG_1 (32'h1001c43c) +`define DV_REG_LOCKABLESCRATCHREG_1 (32'h43c) +`define CLP_DV_REG_LOCKABLESCRATCHREG_2 (32'h1001c440) +`define DV_REG_LOCKABLESCRATCHREG_2 (32'h440) +`define CLP_DV_REG_LOCKABLESCRATCHREG_3 (32'h1001c444) +`define DV_REG_LOCKABLESCRATCHREG_3 (32'h444) +`define CLP_DV_REG_LOCKABLESCRATCHREG_4 (32'h1001c448) +`define DV_REG_LOCKABLESCRATCHREG_4 (32'h448) +`define CLP_DV_REG_LOCKABLESCRATCHREG_5 (32'h1001c44c) +`define DV_REG_LOCKABLESCRATCHREG_5 (32'h44c) +`define CLP_DV_REG_LOCKABLESCRATCHREG_6 (32'h1001c450) +`define DV_REG_LOCKABLESCRATCHREG_6 (32'h450) +`define CLP_DV_REG_LOCKABLESCRATCHREG_7 (32'h1001c454) +`define DV_REG_LOCKABLESCRATCHREG_7 (32'h454) +`define CLP_DV_REG_LOCKABLESCRATCHREG_8 (32'h1001c458) +`define DV_REG_LOCKABLESCRATCHREG_8 (32'h458) +`define CLP_DV_REG_LOCKABLESCRATCHREG_9 (32'h1001c45c) +`define DV_REG_LOCKABLESCRATCHREG_9 (32'h45c) `define CLP_DV_REG_NONSTICKYGENERICSCRATCHREG_0 (32'h1001c460) `define DV_REG_NONSTICKYGENERICSCRATCHREG_0 (32'h460) `define CLP_DV_REG_NONSTICKYGENERICSCRATCHREG_1 (32'h1001c464) @@ -5385,7 +5385,9 @@ `define CLP_SOC_IFC_REG_CPTRA_FLOW_STATUS (32'h3003003c) `define SOC_IFC_REG_CPTRA_FLOW_STATUS (32'h3c) `define SOC_IFC_REG_CPTRA_FLOW_STATUS_STATUS_LOW (0) -`define SOC_IFC_REG_CPTRA_FLOW_STATUS_STATUS_MASK (32'h1ffffff) +`define SOC_IFC_REG_CPTRA_FLOW_STATUS_STATUS_MASK (32'hffffff) +`define SOC_IFC_REG_CPTRA_FLOW_STATUS_IDEVID_CSR_READY_LOW (24) +`define SOC_IFC_REG_CPTRA_FLOW_STATUS_IDEVID_CSR_READY_MASK (32'h1000000) `define SOC_IFC_REG_CPTRA_FLOW_STATUS_BOOT_FSM_PS_LOW (25) `define SOC_IFC_REG_CPTRA_FLOW_STATUS_BOOT_FSM_PS_MASK (32'he000000) `define SOC_IFC_REG_CPTRA_FLOW_STATUS_READY_FOR_FW_LOW (28) diff --git a/src/integration/rtl/caliptra_top.sv b/src/integration/rtl/caliptra_top.sv index f408a2c94..b100bcb39 100755 --- a/src/integration/rtl/caliptra_top.sv +++ b/src/integration/rtl/caliptra_top.sv @@ -188,6 +188,7 @@ module caliptra_top logic [6:0] cptra_uncore_dmi_reg_addr; logic [31:0] cptra_uncore_dmi_reg_wdata; security_state_t cptra_security_state_Latched; + logic cptra_dmi_reg_en_preQ; logic fw_update_rst_window; @@ -503,6 +504,7 @@ el2_veer_wrapper rvtop ( .cptra_uncore_dmi_reg_addr ( cptra_uncore_dmi_reg_addr ), .cptra_uncore_dmi_reg_wdata ( cptra_uncore_dmi_reg_wdata ), .cptra_security_state_Latched ( cptra_security_state_Latched), + .cptra_dmi_reg_en_preQ ( cptra_dmi_reg_en_preQ ), .mpc_debug_halt_ack ( mpc_debug_halt_ack), .mpc_debug_halt_req ( 1'b0), @@ -637,7 +639,8 @@ clk_gate cg ( .rdc_clk_cg (rdc_clk_cg), .generic_input_wires(generic_input_wires), .cptra_error_fatal(cptra_error_fatal), - .cptra_in_debug_scan_mode(cptra_in_debug_scan_mode) + .cptra_in_debug_scan_mode(cptra_in_debug_scan_mode), + .cptra_dmi_reg_en_preQ(cptra_dmi_reg_en_preQ) ); //=========================================================================- // AHB I$ instance diff --git a/src/integration/tb/caliptra_top_tb_services.sv b/src/integration/tb/caliptra_top_tb_services.sv index 38a066fed..69349e3ff 100644 --- a/src/integration/tb/caliptra_top_tb_services.sv +++ b/src/integration/tb/caliptra_top_tb_services.sv @@ -170,6 +170,8 @@ module caliptra_top_tb_services logic inject_zero_sign_r; logic inject_zero_sign_r_needs_release; + logic en_jtag_access; + typedef bit [0:11][31:0] operand_t; typedef struct packed { @@ -243,6 +245,7 @@ module caliptra_top_tb_services // 8'he6 - Request TB to initiate Mailbox flow with out-of-order accesses (violation) // 8'he7 - Reset mailbox out-of-order flag when non-fatal error is masked (allows the test to continue) // 8'he8 - Enable scan mode when DOE fsm transitions to done state + // 8'he9 - Force dmi_reg_en input to clk gate to emulate JTAG accesses // 8'heb - Inject fatal error // 8'hec - Inject randomized UDS test vector // 8'hed - Inject randomized FE test vector @@ -542,6 +545,20 @@ endgenerate //IV_NO end end + always@(negedge clk) begin + if ((WriteData == 'he9) && mailbox_write) begin + cycleCnt_ff <= cycleCnt; + en_jtag_access <= 'b1; + end + else if(en_jtag_access && (cycleCnt == (cycleCnt_ff + 'd100))) begin + force caliptra_top_dut.cptra_dmi_reg_en_preQ = 1; + end + else if(en_jtag_access && (cycleCnt == (cycleCnt_ff + 'd150))) begin + release caliptra_top_dut.cptra_dmi_reg_en_preQ; + en_jtag_access <= 'b0; + end + end + //Inject fatal error after a delay logic inject_fatal_error; always@(negedge clk) begin @@ -1088,6 +1105,7 @@ endgenerate //IV_NO set_wdt_timer1_period = 0; assert_ss_tran = 0; + en_jtag_access = 0; `ifndef VERILATOR if (!UVM_TB) begin diff --git a/src/integration/test_suites/libs/datavault/datavault.c b/src/integration/test_suites/libs/datavault/datavault.c index 11cc90207..c9646e6ff 100644 --- a/src/integration/test_suites/libs/datavault/datavault.c +++ b/src/integration/test_suites/libs/datavault/datavault.c @@ -22,11 +22,11 @@ widereg_t dv_regs [DV_PFX_COUNT] = { { "STICKYDATAVAULTCTRL", (uint32_t *) CLP_DV_REG_STICKYDATAVAULTCTRL_0, 2, 0x1, 0x0 }, // 0. (0x1001c000) { "STICKY_DATA_VAULT_ENTRY_0", (uint32_t *) CLP_DV_REG_STICKY_DATA_VAULT_ENTRY_0_0, 3, DV_ONES, 0x0 }, // 1. (0x1001c028) { "STICKY_DATA_VAULT_ENTRY_1", (uint32_t *) CLP_DV_REG_STICKY_DATA_VAULT_ENTRY_1_0, 3, DV_ONES, 0x0 }, // 2. (0x1001c058) - { "NONSTICKYDATAVAULTCTRL", (uint32_t *) CLP_DV_REG_NONSTICKYDATAVAULTCTRL_0, 2, 0x0, 0x0 }, // 3. (0x1001c208) - { "NONSTICKY_DATA_VAULT_ENTRY_0", (uint32_t *) CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_0, 3, 0x0, 0x0 }, // 4. (0x1001c230) - { "NONSTICKY_DATA_VAULT_ENTRY_1", (uint32_t *) CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_0, 3, 0x0, 0x0 }, // 5. (0x1001c260) - { "NONSTICKY_LOCKABLE_SCRATCHREG_CTRL", (uint32_t *) CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_0, 2, 0x0, 0x0 }, // 6. (0x1001c410) - { "NONSTICKY_LOCKABLE_SCRATCHREG", (uint32_t *) CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_0, 2, 0x0, 0x0 }, // 7. (0x1001c438) + { "DATAVAULTCTRL", (uint32_t *) CLP_DV_REG_DATAVAULTCTRL_0, 2, 0x0, 0x0 }, // 3. (0x1001c208) + { "DATA_VAULT_ENTRY_0", (uint32_t *) CLP_DV_REG_DATA_VAULT_ENTRY_0_0, 3, DV_ONES, 0x0 }, // 4. (0x1001c230) + { "DATA_VAULT_ENTRY_1", (uint32_t *) CLP_DV_REG_DATA_VAULT_ENTRY_1_0, 3, DV_ONES, 0x0 }, // 5. (0x1001c260) + { "LOCKABLE_SCRATCHREG_CTRL", (uint32_t *) CLP_DV_REG_LOCKABLESCRATCHREGCTRL_0, 2, 0x0, 0x0 }, // 6. (0x1001c410) + { "LOCKABLE_SCRATCHREG", (uint32_t *) CLP_DV_REG_LOCKABLESCRATCHREG_0, 2, DV_ONES, 0x0 }, // 7. (0x1001c438) { "STICKY_LOCKABLE_SCRATCHREGCTRL", (uint32_t *) CLP_DV_REG_STICKYLOCKABLESCRATCHREGCTRL_0, 2, 0x1, 0x0 }, // 8. (0x1001c480) { "STICKY_LOCKABLE_SCRATCHREG", (uint32_t *) CLP_DV_REG_STICKYLOCKABLESCRATCHREG_0, 2, DV_ONES, 0x0 } // 9. (0x1001c4a0) }; @@ -61,21 +61,21 @@ int lock_status_bitmap [DV_PFX_COUNT] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; // ea STICKY_DATA_VAULT_ENTRY_1[1] STICKY_DATA_VAULT_ENTRY_1[2] -------------------------------------------------------------- - NONSTICKYDATAVAULTCTRL[0] locks: - NONSTICKY_DATA_VAULT_ENTRY_0[0] - NONSTICKY_DATA_VAULT_ENTRY_0[1] - NONSTICKY_DATA_VAULT_ENTRY_0[2] - - NONSTICKYDATAVAULTCTRL[1] locks: - NONSTICKY_DATA_VAULT_ENTRY_1[0] - NONSTICKY_DATA_VAULT_ENTRY_1[1] - NONSTICKY_DATA_VAULT_ENTRY_1[2] + DATAVAULTCTRL[0] locks: + DATA_VAULT_ENTRY_0[0] + DATA_VAULT_ENTRY_0[1] + DATA_VAULT_ENTRY_0[2] + + DATAVAULTCTRL[1] locks: + DATA_VAULT_ENTRY_1[0] + DATA_VAULT_ENTRY_1[1] + DATA_VAULT_ENTRY_1[2] -------------------------------------------------------------- - NONSTICKY_LOCKABLE_SCRATCHREG_CTRL[0] locks: - NONSTICKY_LOCKABLE_SCRATCHREG[0] + LOCKABLE_SCRATCHREG_CTRL[0] locks: + LOCKABLE_SCRATCHREG[0] - NONSTICKY_LOCKABLE_SCRATCHREG_CTRL[1] locks: - NONSTICKY_LOCKABLE_SCRATCHREG[1] + LOCKABLE_SCRATCHREG_CTRL[1] locks: + LOCKABLE_SCRATCHREG[1] -------------------------------------------------------------- STICKY_LOCKABLE_SCRATCHREG_CTRL[0] locks: STICKY_LOCKABLE_SCRATCHREG[0] @@ -99,19 +99,19 @@ widereg_t dv_regs [DV_PFX_COUNT] = { { "STICKY_DATA_VAULT_ENTRY_7", (uint32_t *) CLP_DV_REG_STICKY_DATA_VAULT_ENTRY_7_0, 12, DV_ONES, 0x0 }, // 8. (0x1001c178) { "STICKY_DATA_VAULT_ENTRY_8", (uint32_t *) CLP_DV_REG_STICKY_DATA_VAULT_ENTRY_8_0, 12, DV_ONES, 0x0 }, // 9. (0x1001c1a8) { "STICKY_DATA_VAULT_ENTRY_9", (uint32_t *) CLP_DV_REG_STICKY_DATA_VAULT_ENTRY_9_0, 12, DV_ONES, 0x0 }, // 10. (0x1001c1d8) - { "NONSTICKYDATAVAULTCTRL", (uint32_t *) CLP_DV_REG_NONSTICKYDATAVAULTCTRL_0, 10, 0x0, 0x0 }, // 11. (0x1001c208) - { "NONSTICKY_DATA_VAULT_ENTRY_0", (uint32_t *) CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_0, 12, 0x0, 0x0 }, // 12. (0x1001c230) - { "NONSTICKY_DATA_VAULT_ENTRY_1", (uint32_t *) CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_0, 12, 0x0, 0x0 }, // 13. (0x1001c260) - { "NONSTICKY_DATA_VAULT_ENTRY_2", (uint32_t *) CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_2_0, 12, 0x0, 0x0 }, // 14. (0x1001c290) - { "NONSTICKY_DATA_VAULT_ENTRY_3", (uint32_t *) CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_3_0, 12, 0x0, 0x0 }, // 15. (0x1001c2c0) - { "NONSTICKY_DATA_VAULT_ENTRY_4", (uint32_t *) CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_4_0, 12, 0x0, 0x0 }, // 16. (0x1001c2f0) - { "NONSTICKY_DATA_VAULT_ENTRY_5", (uint32_t *) CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_5_0, 12, 0x0, 0x0 }, // 17. (0x1001c320) - { "NONSTICKY_DATA_VAULT_ENTRY_6", (uint32_t *) CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_6_0, 12, 0x0, 0x0 }, // 18. (0x1001c350) - { "NONSTICKY_DATA_VAULT_ENTRY_7", (uint32_t *) CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_7_0, 12, 0x0, 0x0 }, // 19. (0x1001c380) - { "NONSTICKY_DATA_VAULT_ENTRY_8", (uint32_t *) CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_8_0, 12, 0x0, 0x0 }, // 20. (0x1001c3b0) - { "NONSTICKY_DATA_VAULT_ENTRY_9", (uint32_t *) CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_9_0, 12, 0x0, 0x0 }, // 21. (0x1001c3e0) - { "NONSTICKY_LOCKABLE_SCRATCHREG_CTRL", (uint32_t *) CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_0, 10, 0x0, 0x0 }, // 22. (0x1001c410) - { "NONSTICKY_LOCKABLE_SCRATCHREG", (uint32_t *) CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_0, 10, 0x0, 0x0 }, // 23. (0x1001c438) + { "DATAVAULTCTRL", (uint32_t *) CLP_DV_REG_DATAVAULTCTRL_0, 10, 0x0, 0x0 }, // 11. (0x1001c208) + { "DATA_VAULT_ENTRY_0", (uint32_t *) CLP_DV_REG_DATA_VAULT_ENTRY_0_0, 12, DV_ONES, 0x0 }, // 12. (0x1001c230) + { "DATA_VAULT_ENTRY_1", (uint32_t *) CLP_DV_REG_DATA_VAULT_ENTRY_1_0, 12, DV_ONES, 0x0 }, // 13. (0x1001c260) + { "DATA_VAULT_ENTRY_2", (uint32_t *) CLP_DV_REG_DATA_VAULT_ENTRY_2_0, 12, DV_ONES, 0x0 }, // 14. (0x1001c290) + { "DATA_VAULT_ENTRY_3", (uint32_t *) CLP_DV_REG_DATA_VAULT_ENTRY_3_0, 12, DV_ONES, 0x0 }, // 15. (0x1001c2c0) + { "DATA_VAULT_ENTRY_4", (uint32_t *) CLP_DV_REG_DATA_VAULT_ENTRY_4_0, 12, DV_ONES, 0x0 }, // 16. (0x1001c2f0) + { "DATA_VAULT_ENTRY_5", (uint32_t *) CLP_DV_REG_DATA_VAULT_ENTRY_5_0, 12, DV_ONES, 0x0 }, // 17. (0x1001c320) + { "DATA_VAULT_ENTRY_6", (uint32_t *) CLP_DV_REG_DATA_VAULT_ENTRY_6_0, 12, DV_ONES, 0x0 }, // 18. (0x1001c350) + { "DATA_VAULT_ENTRY_7", (uint32_t *) CLP_DV_REG_DATA_VAULT_ENTRY_7_0, 12, DV_ONES, 0x0 }, // 19. (0x1001c380) + { "DATA_VAULT_ENTRY_8", (uint32_t *) CLP_DV_REG_DATA_VAULT_ENTRY_8_0, 12, DV_ONES, 0x0 }, // 20. (0x1001c3b0) + { "DATA_VAULT_ENTRY_9", (uint32_t *) CLP_DV_REG_DATA_VAULT_ENTRY_9_0, 12, DV_ONES, 0x0 }, // 21. (0x1001c3e0) + { "LOCKABLE_SCRATCHREG_CTRL", (uint32_t *) CLP_DV_REG_LOCKABLESCRATCHREGCTRL_0, 10, 0x0, 0x0 }, // 22. (0x1001c410) + { "LOCKABLE_SCRATCHREG", (uint32_t *) CLP_DV_REG_LOCKABLESCRATCHREG_0, 10, DV_ONES, 0x0 }, // 23. (0x1001c438) { "NONSTICKY_GENERIC_SCRATCHREG", (uint32_t *) CLP_DV_REG_NONSTICKYGENERICSCRATCHREG_0, 8 , 0x0, 0x0 }, // 24. (0x1001c460) { "STICKY_LOCKABLE_SCRATCHREG_CTRL", (uint32_t *) CLP_DV_REG_STICKYLOCKABLESCRATCHREGCTRL_0, 8 , 0x1, 0x0 }, // 25. (0x1001c480) { "STICKY_LOCKABLE_SCRATCHREG", (uint32_t *) CLP_DV_REG_STICKYLOCKABLESCRATCHREG_0, 8 , DV_ONES, 0x0 } // 26. (0x1001c4a0) diff --git a/src/integration/test_suites/smoke_test_clk_gating/smoke_test_clk_gating.c b/src/integration/test_suites/smoke_test_clk_gating/smoke_test_clk_gating.c index 99afcbae6..114abc7d3 100644 --- a/src/integration/test_suites/smoke_test_clk_gating/smoke_test_clk_gating.c +++ b/src/integration/test_suites/smoke_test_clk_gating/smoke_test_clk_gating.c @@ -18,6 +18,7 @@ #include #include #include "printf.h" +#include "clk_gate.h" volatile char* stdout = (char *)STDOUT; volatile uint32_t intr_count = 0; @@ -59,9 +60,11 @@ void main() { volatile uint32_t * soc_ifc_flow_status = (uint32_t *) CLP_SOC_IFC_REG_CPTRA_FLOW_STATUS; volatile uint32_t * soc_ifc_clk_gating_en = (uint32_t *) CLP_SOC_IFC_REG_CPTRA_CLK_GATING_EN; uint32_t mitb0 = 0x00000020; + uint32_t mitb0_1 = 0x00000500; uint32_t mie_timer0_en = 0x20000000; uint32_t mie_machinetimer_en = 0x00000080; uint32_t mie_external_int_en = 0x00000800; + uint32_t mie_timer0_ext_int_en = 0x20000800; printf("----------------------------------\n"); printf(" CLK GATING smoke test !!\n" ); @@ -167,5 +170,13 @@ void main() { : "i" (0x7c6), "i" (0x03) /* input : immediate */ \ : /* clobbers: none */); + //------------------------------------------------------ + //Wake up using JTAG accesses and then mit0 timer intr + //------------------------------------------------------ + printf("Wake up clks on JTAG accesses and later wake up core on t0 timer intr\n"); + set_mit0(mitb0_1, mie_timer0_en); + SEND_STDOUT_CTRL(0xe9); //Force dmi_reg_en input to clk_gate after a delay + halt_core(); + } diff --git a/src/integration/test_suites/smoke_test_datavault_mini/smoke_test_datavault_mini.c b/src/integration/test_suites/smoke_test_datavault_mini/smoke_test_datavault_mini.c index 74bc23163..b402e7a68 100644 --- a/src/integration/test_suites/smoke_test_datavault_mini/smoke_test_datavault_mini.c +++ b/src/integration/test_suites/smoke_test_datavault_mini/smoke_test_datavault_mini.c @@ -89,11 +89,11 @@ widereg_t sm_dv_regs [SM_DV_PFX_COUNT] = { { "STICKYDATAVAULTCTRL", (uint32_t *) CLP_DV_REG_STICKYDATAVAULTCTRL_0, 2, 0x1, 0x0 }, // 0. (0x1001c000) { "STICKY_DATA_VAULT_ENTRY_0", (uint32_t *) CLP_DV_REG_STICKY_DATA_VAULT_ENTRY_0_0, 3, DV_ONES, 0x0 }, // 1. (0x1001c028) { "STICKY_DATA_VAULT_ENTRY_1", (uint32_t *) CLP_DV_REG_STICKY_DATA_VAULT_ENTRY_1_0, 3, DV_ONES, 0x0 }, // 2. (0x1001c058) - { "NONSTICKYDATAVAULTCTRL", (uint32_t *) CLP_DV_REG_NONSTICKYDATAVAULTCTRL_0, 2, 0x0, 0x0 }, // 3. (0x1001c208) - { "NONSTICKY_DATA_VAULT_ENTRY_0", (uint32_t *) CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_0_0, 3, 0x0, 0x0 }, // 4. (0x1001c230) - { "NONSTICKY_DATA_VAULT_ENTRY_1", (uint32_t *) CLP_DV_REG_NONSTICKY_DATA_VAULT_ENTRY_1_0, 3, 0x0, 0x0 }, // 5. (0x1001c260) - { "NONSTICKY_LOCKABLE_SCRATCHREG_CTRL", (uint32_t *) CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREGCTRL_0, 2, 0x0, 0x0 }, // 6. (0x1001c410) - { "NONSTICKY_LOCKABLE_SCRATCHREG", (uint32_t *) CLP_DV_REG_NONSTICKYLOCKABLESCRATCHREG_0, 2, 0x0, 0x0 }, // 7. (0x1001c438) + { "DATAVAULTCTRL", (uint32_t *) CLP_DV_REG_DATAVAULTCTRL_0, 2, 0x0, 0x0 }, // 3. (0x1001c208) + { "DATA_VAULT_ENTRY_0", (uint32_t *) CLP_DV_REG_DATA_VAULT_ENTRY_0_0, 3, DV_ONES, 0x0 }, // 4. (0x1001c230) + { "DATA_VAULT_ENTRY_1", (uint32_t *) CLP_DV_REG_DATA_VAULT_ENTRY_1_0, 3, DV_ONES, 0x0 }, // 5. (0x1001c260) + { "LOCKABLE_SCRATCHREG_CTRL", (uint32_t *) CLP_DV_REG_LOCKABLESCRATCHREGCTRL_0, 2, 0x0, 0x0 }, // 6. (0x1001c410) + { "LOCKABLE_SCRATCHREG", (uint32_t *) CLP_DV_REG_LOCKABLESCRATCHREG_0, 2, DV_ONES, 0x0 }, // 7. (0x1001c438) { "STICKY_LOCKABLE_SCRATCHREGCTRL", (uint32_t *) CLP_DV_REG_STICKYLOCKABLESCRATCHREGCTRL_0, 2, 0x1, 0x0 }, // 8. (0x1001c480) { "STICKY_LOCKABLE_SCRATCHREG", (uint32_t *) CLP_DV_REG_STICKYLOCKABLESCRATCHREG_0, 2, DV_ONES, 0x0 } // 9. (0x1001c4a0) }; diff --git a/src/libs/rtl/clk_gate.sv b/src/libs/rtl/clk_gate.sv index b7df9fd09..f4916668a 100644 --- a/src/libs/rtl/clk_gate.sv +++ b/src/libs/rtl/clk_gate.sv @@ -24,13 +24,15 @@ module clk_gate ( input logic cptra_in_debug_scan_mode, output logic clk_cg, output logic soc_ifc_clk_cg, - output logic rdc_clk_cg + output logic rdc_clk_cg, + input logic cptra_dmi_reg_en_preQ //JTAG access ); logic disable_clk; logic disable_soc_ifc_clk; logic [63:0] generic_input_wires_f; logic change_in_generic_wires; +logic sleep_condition; /********************************************************************** @@ -66,8 +68,9 @@ end //Generate clk disable signal always_comb begin change_in_generic_wires = ((generic_input_wires ^ generic_input_wires_f) != 'h0); - disable_clk = (clk_gate_en && (cpu_halt_status && !change_in_generic_wires && !cptra_error_fatal && !cptra_in_debug_scan_mode)) | rdc_clk_dis; - disable_soc_ifc_clk = (clk_gate_en && (cpu_halt_status && !psel && !change_in_generic_wires && !cptra_error_fatal && !cptra_in_debug_scan_mode)) | rdc_clk_dis; + sleep_condition = (cpu_halt_status && !change_in_generic_wires && !cptra_error_fatal && !cptra_in_debug_scan_mode && !cptra_dmi_reg_en_preQ); + disable_clk = (clk_gate_en && sleep_condition) | rdc_clk_dis; + disable_soc_ifc_clk = (clk_gate_en && (sleep_condition && !psel)) | rdc_clk_dis; end diff --git a/src/riscv_core/veer_el2/rtl/el2_veer_wrapper.sv b/src/riscv_core/veer_el2/rtl/el2_veer_wrapper.sv index 7bd0a85c0..7295a5ffe 100755 --- a/src/riscv_core/veer_el2/rtl/el2_veer_wrapper.sv +++ b/src/riscv_core/veer_el2/rtl/el2_veer_wrapper.sv @@ -314,6 +314,7 @@ import soc_ifc_pkg::*; output logic [6:0] cptra_uncore_dmi_reg_addr, output logic [31:0] cptra_uncore_dmi_reg_wdata, input security_state_t cptra_security_state_Latched, + output logic cptra_dmi_reg_en_preQ, input logic [31:4] core_id, @@ -747,6 +748,7 @@ import soc_ifc_pkg::*; assign cptra_dmi_reg_en_jtag_acccess_allowed = dmi_reg_en_preQ & cptra_jtag_access_allowed; assign cptra_dmi_reg_wr_en_jtag_acccess_allowed = dmi_reg_wr_en_preQ & cptra_jtag_access_allowed; + assign cptra_dmi_reg_en_preQ = dmi_reg_en_preQ; // Driving core vs uncore enables based on the right aperture assign dmi_reg_en = cptra_uncore_tap_aperture ? '0 : cptra_dmi_reg_en_jtag_acccess_allowed; diff --git a/src/soc_ifc/rtl/caliptra_top_reg.h b/src/soc_ifc/rtl/caliptra_top_reg.h index bf9028ba2..d19f44338 100644 --- a/src/soc_ifc/rtl/caliptra_top_reg.h +++ b/src/soc_ifc/rtl/caliptra_top_reg.h @@ -162,7 +162,9 @@ #define CALIPTRA_TOP_REG_GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS (0x3003003c) #define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS (0x3c) #define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_STATUS_LOW (0) -#define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_STATUS_MASK (0x1ffffff) +#define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_STATUS_MASK (0xffffff) +#define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_IDEVID_CSR_READY_LOW (24) +#define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_IDEVID_CSR_READY_MASK (0x1000000) #define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_BOOT_FSM_PS_LOW (25) #define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_BOOT_FSM_PS_MASK (0xe000000) #define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_READY_FOR_FW_LOW (28) diff --git a/src/soc_ifc/rtl/caliptra_top_reg_defines.svh b/src/soc_ifc/rtl/caliptra_top_reg_defines.svh index cd654e49d..e0b646a47 100644 --- a/src/soc_ifc/rtl/caliptra_top_reg_defines.svh +++ b/src/soc_ifc/rtl/caliptra_top_reg_defines.svh @@ -163,7 +163,9 @@ `define CALIPTRA_TOP_REG_GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS (32'h3003003c) `define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS (32'h3c) `define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_STATUS_LOW (0) -`define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_STATUS_MASK (32'h1ffffff) +`define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_STATUS_MASK (32'hffffff) +`define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_IDEVID_CSR_READY_LOW (24) +`define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_IDEVID_CSR_READY_MASK (32'h1000000) `define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_BOOT_FSM_PS_LOW (25) `define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_BOOT_FSM_PS_MASK (32'he000000) `define GENERIC_AND_FUSE_REG_CPTRA_FLOW_STATUS_READY_FOR_FW_LOW (28) diff --git a/src/soc_ifc/rtl/soc_ifc_external_reg.rdl b/src/soc_ifc/rtl/soc_ifc_external_reg.rdl index 0c2a90e1a..0507b4a73 100644 --- a/src/soc_ifc/rtl/soc_ifc_external_reg.rdl +++ b/src/soc_ifc/rtl/soc_ifc_external_reg.rdl @@ -82,10 +82,11 @@ reg { desc = "Reports the status of the firmware flows. [br]Caliptra Access: RW [br]SOC Access: RO"; - rw_ro status[25]=0; + rw_ro status[24]=0; + field {desc="DEV ID CSR ready"; sw=rw; swwel = soc_req; hw=r ; resetsignal = cptra_rst_b;} idevid_csr_ready[1]=0; field {desc="Boot FSM State"; sw=r; hw=w ; resetsignal = cptra_rst_b;} boot_fsm_ps[3]; field {desc="Indicates Caliptra is ready for Firmware Download"; sw=rw; swwel = soc_req; hw=r ; resetsignal = cptra_rst_b;} ready_for_fw[1]=0; - field {desc="Indicates Caliptra is ready for Runtime Firmware Download"; sw=rw; swwel = soc_req; hw=r ; resetsignal = cptra_rst_b;} ready_for_runtime[1]=0; + field {desc="Indicates Caliptra is ready for RT flows"; sw=rw; swwel = soc_req; hw=r ; resetsignal = cptra_rst_b;} ready_for_runtime[1]=0; field {desc="Indicates Caliptra is ready for Fuses to be programmed. Read-only to both Caliptra and SOC."; sw=r; hw=w ; resetsignal = cptra_rst_b;} ready_for_fuses[1]; field {desc="Indicates Caliptra is has completed Mailbox Flow."; sw=rw; swwel = soc_req; hw=r ; resetsignal = cptra_rst_b;} mailbox_flow_done[1]=0; diff --git a/src/soc_ifc/rtl/soc_ifc_reg.sv b/src/soc_ifc/rtl/soc_ifc_reg.sv index 5c6d71d9d..03fb36139 100644 --- a/src/soc_ifc/rtl/soc_ifc_reg.sv +++ b/src/soc_ifc/rtl/soc_ifc_reg.sv @@ -388,9 +388,13 @@ module soc_ifc_reg ( } CPTRA_BOOT_STATUS; struct packed{ struct packed{ - logic [24:0] next; + logic [23:0] next; logic load_next; } status; + struct packed{ + logic next; + logic load_next; + } idevid_csr_ready; struct packed{ logic next; logic load_next; @@ -1222,8 +1226,11 @@ module soc_ifc_reg ( } CPTRA_BOOT_STATUS; struct packed{ struct packed{ - logic [24:0] value; + logic [23:0] value; } status; + struct packed{ + logic value; + } idevid_csr_ready; struct packed{ logic value; } ready_for_fw; @@ -2064,10 +2071,10 @@ module soc_ifc_reg ( assign hwif_out.CPTRA_BOOT_STATUS.status.value = field_storage.CPTRA_BOOT_STATUS.status.value; // Field: soc_ifc_reg.CPTRA_FLOW_STATUS.status always_comb begin - automatic logic [24:0] next_c = field_storage.CPTRA_FLOW_STATUS.status.value; + automatic logic [23:0] next_c = field_storage.CPTRA_FLOW_STATUS.status.value; automatic logic load_next_c = '0; if(decoded_reg_strb.CPTRA_FLOW_STATUS && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write - next_c = (field_storage.CPTRA_FLOW_STATUS.status.value & ~decoded_wr_biten[24:0]) | (decoded_wr_data[24:0] & decoded_wr_biten[24:0]); + next_c = (field_storage.CPTRA_FLOW_STATUS.status.value & ~decoded_wr_biten[23:0]) | (decoded_wr_data[23:0] & decoded_wr_biten[23:0]); load_next_c = '1; end field_combo.CPTRA_FLOW_STATUS.status.next = next_c; @@ -2080,6 +2087,25 @@ module soc_ifc_reg ( field_storage.CPTRA_FLOW_STATUS.status.value <= field_combo.CPTRA_FLOW_STATUS.status.next; end end + // Field: soc_ifc_reg.CPTRA_FLOW_STATUS.idevid_csr_ready + always_comb begin + automatic logic [0:0] next_c = field_storage.CPTRA_FLOW_STATUS.idevid_csr_ready.value; + automatic logic load_next_c = '0; + if(decoded_reg_strb.CPTRA_FLOW_STATUS && decoded_req_is_wr && !(hwif_in.soc_req)) begin // SW write + next_c = (field_storage.CPTRA_FLOW_STATUS.idevid_csr_ready.value & ~decoded_wr_biten[24:24]) | (decoded_wr_data[24:24] & decoded_wr_biten[24:24]); + load_next_c = '1; + end + field_combo.CPTRA_FLOW_STATUS.idevid_csr_ready.next = next_c; + field_combo.CPTRA_FLOW_STATUS.idevid_csr_ready.load_next = load_next_c; + end + always_ff @(posedge clk or negedge hwif_in.cptra_rst_b) begin + if(~hwif_in.cptra_rst_b) begin + field_storage.CPTRA_FLOW_STATUS.idevid_csr_ready.value <= 'h0; + end else if(field_combo.CPTRA_FLOW_STATUS.idevid_csr_ready.load_next) begin + field_storage.CPTRA_FLOW_STATUS.idevid_csr_ready.value <= field_combo.CPTRA_FLOW_STATUS.idevid_csr_ready.next; + end + end + assign hwif_out.CPTRA_FLOW_STATUS.idevid_csr_ready.value = field_storage.CPTRA_FLOW_STATUS.idevid_csr_ready.value; // Field: soc_ifc_reg.CPTRA_FLOW_STATUS.ready_for_fw always_comb begin automatic logic [0:0] next_c = field_storage.CPTRA_FLOW_STATUS.ready_for_fw.value; @@ -5161,7 +5187,8 @@ module soc_ifc_reg ( assign readback_array[i0*1 + 6][31:0] = (decoded_reg_strb.CPTRA_FW_EXTENDED_ERROR_INFO[i0] && !decoded_req_is_wr) ? field_storage.CPTRA_FW_EXTENDED_ERROR_INFO[i0].error_info.value : '0; end assign readback_array[14][31:0] = (decoded_reg_strb.CPTRA_BOOT_STATUS && !decoded_req_is_wr) ? field_storage.CPTRA_BOOT_STATUS.status.value : '0; - assign readback_array[15][24:0] = (decoded_reg_strb.CPTRA_FLOW_STATUS && !decoded_req_is_wr) ? field_storage.CPTRA_FLOW_STATUS.status.value : '0; + assign readback_array[15][23:0] = (decoded_reg_strb.CPTRA_FLOW_STATUS && !decoded_req_is_wr) ? field_storage.CPTRA_FLOW_STATUS.status.value : '0; + assign readback_array[15][24:24] = (decoded_reg_strb.CPTRA_FLOW_STATUS && !decoded_req_is_wr) ? field_storage.CPTRA_FLOW_STATUS.idevid_csr_ready.value : '0; assign readback_array[15][27:25] = (decoded_reg_strb.CPTRA_FLOW_STATUS && !decoded_req_is_wr) ? hwif_in.CPTRA_FLOW_STATUS.boot_fsm_ps.next : '0; assign readback_array[15][28:28] = (decoded_reg_strb.CPTRA_FLOW_STATUS && !decoded_req_is_wr) ? field_storage.CPTRA_FLOW_STATUS.ready_for_fw.value : '0; assign readback_array[15][29:29] = (decoded_reg_strb.CPTRA_FLOW_STATUS && !decoded_req_is_wr) ? field_storage.CPTRA_FLOW_STATUS.ready_for_runtime.value : '0; diff --git a/src/soc_ifc/rtl/soc_ifc_reg_covergroups.svh b/src/soc_ifc/rtl/soc_ifc_reg_covergroups.svh index 7e67ffbbd..16c22099c 100644 --- a/src/soc_ifc/rtl/soc_ifc_reg_covergroups.svh +++ b/src/soc_ifc/rtl/soc_ifc_reg_covergroups.svh @@ -196,7 +196,8 @@ endgroup covergroup soc_ifc_reg__CPTRA_FLOW_STATUS_fld_cg with function sample( - input bit [25-1:0] status, + input bit [24-1:0] status, + input bit [1-1:0] idevid_csr_ready, input bit [3-1:0] boot_fsm_ps, input bit [1-1:0] ready_for_fw, input bit [1-1:0] ready_for_runtime, @@ -205,6 +206,7 @@ ); option.per_instance = 1; status_cp : coverpoint status; + idevid_csr_ready_cp : coverpoint idevid_csr_ready; boot_fsm_ps_cp : coverpoint boot_fsm_ps; ready_for_fw_cp : coverpoint ready_for_fw; ready_for_runtime_cp : coverpoint ready_for_runtime; diff --git a/src/soc_ifc/rtl/soc_ifc_reg_pkg.sv b/src/soc_ifc/rtl/soc_ifc_reg_pkg.sv index 92a5303dd..a5c7db83a 100644 --- a/src/soc_ifc/rtl/soc_ifc_reg_pkg.sv +++ b/src/soc_ifc/rtl/soc_ifc_reg_pkg.sv @@ -507,6 +507,10 @@ package soc_ifc_reg_pkg; soc_ifc_reg__CPTRA_BOOT_STATUS__status__out_t status; } soc_ifc_reg__CPTRA_BOOT_STATUS__out_t; + typedef struct packed{ + logic value; + } soc_ifc_reg__CPTRA_FLOW_STATUS__idevid_csr_ready__out_t; + typedef struct packed{ logic value; } soc_ifc_reg__CPTRA_FLOW_STATUS__ready_for_fw__out_t; @@ -520,6 +524,7 @@ package soc_ifc_reg_pkg; } soc_ifc_reg__CPTRA_FLOW_STATUS__mailbox_flow_done__out_t; typedef struct packed{ + soc_ifc_reg__CPTRA_FLOW_STATUS__idevid_csr_ready__out_t idevid_csr_ready; soc_ifc_reg__CPTRA_FLOW_STATUS__ready_for_fw__out_t ready_for_fw; soc_ifc_reg__CPTRA_FLOW_STATUS__ready_for_runtime__out_t ready_for_runtime; soc_ifc_reg__CPTRA_FLOW_STATUS__mailbox_flow_done__out_t mailbox_flow_done; diff --git a/src/soc_ifc/rtl/soc_ifc_reg_sample.svh b/src/soc_ifc/rtl/soc_ifc_reg_sample.svh index 70d5eb1de..d8cf13de7 100644 --- a/src/soc_ifc/rtl/soc_ifc_reg_sample.svh +++ b/src/soc_ifc/rtl/soc_ifc_reg_sample.svh @@ -233,6 +233,7 @@ m_is_read = is_read; if (get_coverage(UVM_CVR_REG_BITS)) begin foreach(status_bit_cg[bt]) this.status_bit_cg[bt].sample(data[0 + bt]); + foreach(idevid_csr_ready_bit_cg[bt]) this.idevid_csr_ready_bit_cg[bt].sample(data[24 + bt]); foreach(boot_fsm_ps_bit_cg[bt]) this.boot_fsm_ps_bit_cg[bt].sample(data[25 + bt]); foreach(ready_for_fw_bit_cg[bt]) this.ready_for_fw_bit_cg[bt].sample(data[28 + bt]); foreach(ready_for_runtime_bit_cg[bt]) this.ready_for_runtime_bit_cg[bt].sample(data[29 + bt]); @@ -240,13 +241,14 @@ foreach(mailbox_flow_done_bit_cg[bt]) this.mailbox_flow_done_bit_cg[bt].sample(data[31 + bt]); end if (get_coverage(UVM_CVR_FIELD_VALS)) begin - this.fld_cg.sample( data[24:0]/*status*/ , data[27:25]/*boot_fsm_ps*/ , data[28:28]/*ready_for_fw*/ , data[29:29]/*ready_for_runtime*/ , data[30:30]/*ready_for_fuses*/ , data[31:31]/*mailbox_flow_done*/ ); + this.fld_cg.sample( data[23:0]/*status*/ , data[24:24]/*idevid_csr_ready*/ , data[27:25]/*boot_fsm_ps*/ , data[28:28]/*ready_for_fw*/ , data[29:29]/*ready_for_runtime*/ , data[30:30]/*ready_for_fuses*/ , data[31:31]/*mailbox_flow_done*/ ); end endfunction function void soc_ifc_reg__CPTRA_FLOW_STATUS::sample_values(); if (get_coverage(UVM_CVR_REG_BITS)) begin foreach(status_bit_cg[bt]) this.status_bit_cg[bt].sample(status.get_mirrored_value() >> bt); + foreach(idevid_csr_ready_bit_cg[bt]) this.idevid_csr_ready_bit_cg[bt].sample(idevid_csr_ready.get_mirrored_value() >> bt); foreach(boot_fsm_ps_bit_cg[bt]) this.boot_fsm_ps_bit_cg[bt].sample(boot_fsm_ps.get_mirrored_value() >> bt); foreach(ready_for_fw_bit_cg[bt]) this.ready_for_fw_bit_cg[bt].sample(ready_for_fw.get_mirrored_value() >> bt); foreach(ready_for_runtime_bit_cg[bt]) this.ready_for_runtime_bit_cg[bt].sample(ready_for_runtime.get_mirrored_value() >> bt); @@ -254,7 +256,7 @@ foreach(mailbox_flow_done_bit_cg[bt]) this.mailbox_flow_done_bit_cg[bt].sample(mailbox_flow_done.get_mirrored_value() >> bt); end if (get_coverage(UVM_CVR_FIELD_VALS)) begin - this.fld_cg.sample( status.get_mirrored_value() , boot_fsm_ps.get_mirrored_value() , ready_for_fw.get_mirrored_value() , ready_for_runtime.get_mirrored_value() , ready_for_fuses.get_mirrored_value() , mailbox_flow_done.get_mirrored_value() ); + this.fld_cg.sample( status.get_mirrored_value() , idevid_csr_ready.get_mirrored_value() , boot_fsm_ps.get_mirrored_value() , ready_for_fw.get_mirrored_value() , ready_for_runtime.get_mirrored_value() , ready_for_fuses.get_mirrored_value() , mailbox_flow_done.get_mirrored_value() ); end endfunction diff --git a/src/soc_ifc/rtl/soc_ifc_reg_uvm.sv b/src/soc_ifc/rtl/soc_ifc_reg_uvm.sv index a53dd8a4f..9bb39ab57 100644 --- a/src/soc_ifc/rtl/soc_ifc_reg_uvm.sv +++ b/src/soc_ifc/rtl/soc_ifc_reg_uvm.sv @@ -270,7 +270,8 @@ package soc_ifc_reg_uvm; protected uvm_reg_data_t m_data; protected bit m_is_read; - soc_ifc_reg__CPTRA_FLOW_STATUS_bit_cg status_bit_cg[25]; + soc_ifc_reg__CPTRA_FLOW_STATUS_bit_cg status_bit_cg[24]; + soc_ifc_reg__CPTRA_FLOW_STATUS_bit_cg idevid_csr_ready_bit_cg[1]; soc_ifc_reg__CPTRA_FLOW_STATUS_bit_cg boot_fsm_ps_bit_cg[3]; soc_ifc_reg__CPTRA_FLOW_STATUS_bit_cg ready_for_fw_bit_cg[1]; soc_ifc_reg__CPTRA_FLOW_STATUS_bit_cg ready_for_runtime_bit_cg[1]; @@ -278,6 +279,7 @@ package soc_ifc_reg_uvm; soc_ifc_reg__CPTRA_FLOW_STATUS_bit_cg mailbox_flow_done_bit_cg[1]; soc_ifc_reg__CPTRA_FLOW_STATUS_fld_cg fld_cg; rand uvm_reg_field status; + rand uvm_reg_field idevid_csr_ready; rand uvm_reg_field boot_fsm_ps; rand uvm_reg_field ready_for_fw; rand uvm_reg_field ready_for_runtime; @@ -295,7 +297,9 @@ package soc_ifc_reg_uvm; virtual function void build(); this.status = new("status"); - this.status.configure(this, 25, 0, "RW", 0, 'h0, 1, 1, 0); + this.status.configure(this, 24, 0, "RW", 0, 'h0, 1, 1, 0); + this.idevid_csr_ready = new("idevid_csr_ready"); + this.idevid_csr_ready.configure(this, 1, 24, "RW", 0, 'h0, 1, 1, 0); this.boot_fsm_ps = new("boot_fsm_ps"); this.boot_fsm_ps.configure(this, 3, 25, "RO", 1, 'h0, 0, 1, 0); this.ready_for_fw = new("ready_for_fw"); @@ -308,6 +312,7 @@ package soc_ifc_reg_uvm; this.mailbox_flow_done.configure(this, 1, 31, "RW", 0, 'h0, 1, 1, 0); if (has_coverage(UVM_CVR_REG_BITS)) begin foreach(status_bit_cg[bt]) status_bit_cg[bt] = new(); + foreach(idevid_csr_ready_bit_cg[bt]) idevid_csr_ready_bit_cg[bt] = new(); foreach(boot_fsm_ps_bit_cg[bt]) boot_fsm_ps_bit_cg[bt] = new(); foreach(ready_for_fw_bit_cg[bt]) ready_for_fw_bit_cg[bt] = new(); foreach(ready_for_runtime_bit_cg[bt]) ready_for_runtime_bit_cg[bt] = new(); diff --git a/src/soc_ifc/uvmf_soc_ifc/uvmf_template_output/verification_ip/environment_packages/soc_ifc_env_pkg/registers/soc_ifc_reg_model_top_pkg.sv b/src/soc_ifc/uvmf_soc_ifc/uvmf_template_output/verification_ip/environment_packages/soc_ifc_env_pkg/registers/soc_ifc_reg_model_top_pkg.sv index 5057e4435..30fdb7d4e 100644 --- a/src/soc_ifc/uvmf_soc_ifc/uvmf_template_output/verification_ip/environment_packages/soc_ifc_env_pkg/registers/soc_ifc_reg_model_top_pkg.sv +++ b/src/soc_ifc/uvmf_soc_ifc/uvmf_template_output/verification_ip/environment_packages/soc_ifc_env_pkg/registers/soc_ifc_reg_model_top_pkg.sv @@ -166,6 +166,7 @@ package soc_ifc_reg_model_top_pkg; // this.CPTRA_FW_EXTENDED_ERROR_INFO[8]. set_reset(this.CPTRA_FW_EXTENDED_ERROR_INFO[8]. get_reset("HARD"), "SOFT"); if ( this.CPTRA_BOOT_STATUS. has_reset("HARD" )) this.CPTRA_BOOT_STATUS. set_reset(this.CPTRA_BOOT_STATUS. get_reset("HARD"), "SOFT"); if ( this.CPTRA_FLOW_STATUS.status. has_reset("HARD" )) this.CPTRA_FLOW_STATUS.status. set_reset(this.CPTRA_FLOW_STATUS.status. get_reset("HARD"), "SOFT"); + if ( this.CPTRA_FLOW_STATUS.idevid_csr_ready. has_reset("HARD" )) this.CPTRA_FLOW_STATUS.idevid_csr_ready. set_reset(this.CPTRA_FLOW_STATUS.idevid_csr_ready. get_reset("HARD"), "SOFT"); if ( this.CPTRA_FLOW_STATUS.boot_fsm_ps. has_reset("HARD" )) this.CPTRA_FLOW_STATUS.boot_fsm_ps. set_reset(this.CPTRA_FLOW_STATUS.boot_fsm_ps. get_reset("HARD"), "SOFT"); if ( this.CPTRA_FLOW_STATUS.ready_for_fw. has_reset("HARD" )) this.CPTRA_FLOW_STATUS.ready_for_fw. set_reset(this.CPTRA_FLOW_STATUS.ready_for_fw. get_reset("HARD"), "SOFT"); if ( this.CPTRA_FLOW_STATUS.ready_for_runtime. has_reset("HARD" )) this.CPTRA_FLOW_STATUS.ready_for_runtime. set_reset(this.CPTRA_FLOW_STATUS.ready_for_runtime. get_reset("HARD"), "SOFT");