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we should probably always report INTX as maskable, and actually respect that.
For MSI-X, as need to do #807 and also handle a trigger while masked. I think that looks like:
setting the pending bit into the PBA on vfu_trigger_irq(msix index)
accept mask/unmask operations
on unmask, trigger eventfd for any pending bits
In theory API user could do this too, but seems better handled in the library. And perhaps we need a better MSI-X set up API than we currently have for this.
We have some plumbing for mask/unmask (see #694) but never report VFIO_IRQ_INFO_MASKABLE, so in theory we should never hit that code.
However, it appears that qemu vfio-user client is doing it anyway for INTX, although not for msix
Need to figure out what the proper behaviour should be.
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