consider consolidating sidecar b/c/d fpga images

[nathanaelhuffman]

R11 had an issue where b images got put in to the c/d slots due to human-in-the-loop errors.

The major change here is that the C+ images have a 36th ignition target.
This is tricker because the FPGA on sidecar knows nothing about its version as it can't see the version resistors. We could, however have the SP set which sidecar it is after fpga programming and build functions in the fpga to disable this feature on older sidecars.