init_scif.c

/*
 * Copyright (c) 2018, Renesas Electronics Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 *   - Redistributions of source code must retain the above copyright notice,
 *     this list of conditions and the following disclaimer.
 *
 *   - Redistributions in binary form must reproduce the above copyright
 *     notice, this list of conditions and the following disclaimer in the
 *     documentation and/or other materials provided with the distribution.
 *
 *   - Neither the name of Renesas nor the names of its contributors may be
 *     used to endorse or promote products derived from this software without
 *     specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */


#include "reg_rcarh3.h"
#include "common.h"
#include "scifdrv.h"
#include "init_scif.h"


void InitScif(void)
{
	uint32_t product;

	product = *((volatile uint32_t*)PRR) & PRR_PRODUCT_MASK;
	switch (product) {
#ifdef RCAR_GEN3_SALVATOR
	case PRR_PRODUCT_H3:	/* H3 and M3 setting values are same */
	case PRR_PRODUCT_M3:
	case PRR_PRODUCT_M3N:
		InitScif2_SCIFCLK();
		break;
#endif /* RCAR_GEN3_SALVATOR */
#ifdef RCAR_GEN3_EBISU
	case PRR_PRODUCT_E3:
		InitScif2_SCIFCLK_E3();
		break;
#endif /* RCAR_GEN3_EBISU */
#ifdef RCAR_GEN3_DRAAK
	case PRR_PRODUCT_D3:
		InitScif2_SCIFCLK_D3();
		break;
#endif /* RCAR_GEN3_DRAAK */
	default:
		break;
	}
}