From 3bb45511fa8b4dd0256f4b0a365559dfeaf65924 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 13 Feb 2018 12:26:34 +0700 Subject: [PATCH] add feather52840 board --- ports/nrf/boards/feather52/board.c | 14 +- .../bluefruit_nrf52840_s140_6.0.0.ld | 47 +++++ ports/nrf/boards/feather52840/board.c | 44 ++++ ports/nrf/boards/feather52840/mpconfigboard.h | 87 ++++++++ .../nrf/boards/feather52840/mpconfigboard.mk | 13 ++ .../boards/feather52840/mpconfigboard_s140.mk | 8 + .../nrf/boards/feather52840/nrf52_hal_conf.h | 18 ++ ports/nrf/boards/feather52840/pins.c | 191 ++++++++++++++++++ ports/nrf/boards/feather52840/pins.csv | 48 +++++ ports/nrf/boards/feather52840/pins.h | 51 +++++ 10 files changed, 515 insertions(+), 6 deletions(-) create mode 100644 ports/nrf/boards/feather52840/bluefruit_nrf52840_s140_6.0.0.ld create mode 100644 ports/nrf/boards/feather52840/board.c create mode 100644 ports/nrf/boards/feather52840/mpconfigboard.h create mode 100644 ports/nrf/boards/feather52840/mpconfigboard.mk create mode 100644 ports/nrf/boards/feather52840/mpconfigboard_s140.mk create mode 100644 ports/nrf/boards/feather52840/nrf52_hal_conf.h create mode 100644 ports/nrf/boards/feather52840/pins.c create mode 100644 ports/nrf/boards/feather52840/pins.csv create mode 100644 ports/nrf/boards/feather52840/pins.h diff --git a/ports/nrf/boards/feather52/board.c b/ports/nrf/boards/feather52/board.c index c0f344597aa2..50dde14d8148 100644 --- a/ports/nrf/boards/feather52/board.c +++ b/ports/nrf/boards/feather52/board.c @@ -35,15 +35,16 @@ #define BOOTLOADER_VERSION_REGISTER NRF_TIMER2->CC[0] uint32_t bootloaderVersion = 0; -void board_init(void) +void board_init (void) { - // Retrieve bootloader version - bootloaderVersion = BOOTLOADER_VERSION_REGISTER; + // Retrieve bootloader version + bootloaderVersion = BOOTLOADER_VERSION_REGISTER; } // Check the status of the two buttons on CircuitPlayground Express. If both are // pressed, then boot into user safe mode. -bool board_requests_safe_mode(void) { +bool board_requests_safe_mode (void) +{ // gpio_set_pin_function(PIN_PA14, GPIO_PIN_FUNCTION_OFF); // gpio_set_pin_direction(PIN_PA14, GPIO_DIRECTION_IN); // gpio_set_pin_pull_mode(PIN_PA14, GPIO_PULL_DOWN); @@ -57,10 +58,11 @@ bool board_requests_safe_mode(void) { // reset_pin(PIN_PA28); // return safe_mode; - return false; + return false; } -void reset_board(void) { +void reset_board (void) +{ // uint8_t empty[30]; // memset(empty, 0, 30); // digitalio_digitalinout_obj_t neopixel_pin; diff --git a/ports/nrf/boards/feather52840/bluefruit_nrf52840_s140_6.0.0.ld b/ports/nrf/boards/feather52840/bluefruit_nrf52840_s140_6.0.0.ld new file mode 100644 index 000000000000..23c0c1e03542 --- /dev/null +++ b/ports/nrf/boards/feather52840/bluefruit_nrf52840_s140_6.0.0.ld @@ -0,0 +1,47 @@ +/* + GNU linker script for NRF52 w/ s132 5.0.0 SoftDevice + + MEMORY MAP + ------------------------------------------------------------------------ + START ADDR END ADDR SIZE DESCRIPTION + ---------- ---------- ------- ----------------------------------------- + 0x000FF000..0x000FFFFF ( 4KB) Bootloader Settings + 0x000FE000..0x000FEFFF ( 4KB) Master Boot Record Params + 0x000F4000..0x000FDFFF ( 40KB) Serial + OTA Bootloader + + 0x000F3000..0x000F3FFF ( 4KB ) Private Config Data (Bonding, Keys, etc.) + 0x000F2000..0x000F2FFF ( 4KB ) User NVM data + 0x000D9000..0x000F1FFF ( 100KB) User Filesystem + + 0x00025000..0x000D8FFF (720KB) Application Code (including ISR vector) + 0x00001000..0x00024FFF (144KB) SoftDevice + 0x00000000..0x00000FFF (4KB) Master Boot Record +*/ + +/* Specify the memory areas (S132 5.0.0) */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x100000 + + FLASH_ISR (rx) : ORIGIN = 0x00025000, LENGTH = 0x001000 + FLASH_TEXT (rx) : ORIGIN = 0x00026000, LENGTH = 0x0B3000 + FLASH_FATFS (r) : ORIGIN = 0x000D9000, LENGTH = 0x019000 + + /* 0x2000000 - RAM:ORGIGIN is reserved for Softdevice */ + RAM (xrw) : ORIGIN = 0x20004000, LENGTH = 0x20040000 - 0x20004000 +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 0 /*16K Circuit Python use static variable for HEAP */; + +/* top end of the stack */ + +/*_stack_end = ORIGIN(RAM) + LENGTH(RAM);*/ +_estack = ORIGIN(RAM) + LENGTH(RAM); + +/* RAM extents for the garbage collector */ +_ram_end = ORIGIN(RAM) + LENGTH(RAM); +_heap_end = 0x20007000; /* tunable */ + +INCLUDE "boards/common.ld" diff --git a/ports/nrf/boards/feather52840/board.c b/ports/nrf/boards/feather52840/board.c new file mode 100644 index 000000000000..5ad81c21d7b5 --- /dev/null +++ b/ports/nrf/boards/feather52840/board.c @@ -0,0 +1,44 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include +#include + +#include "nrf.h" + +#include "boards/board.h" + +void board_init(void) { + +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/feather52840/mpconfigboard.h b/ports/nrf/boards/feather52840/mpconfigboard.h new file mode 100644 index 000000000000..3d3cf5fbd5ef --- /dev/null +++ b/ports/nrf/boards/feather52840/mpconfigboard.h @@ -0,0 +1,87 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#define PCA10056 + +#define MICROPY_HW_BOARD_NAME "PCA10056" +#define MICROPY_HW_MCU_NAME "NRF52840" +#define MICROPY_PY_SYS_PLATFORM "nrf52840-PDK" + +#define MICROPY_PY_MACHINE_HW_PWM (1) +#define MICROPY_PY_MACHINE_HW_SPI (1) +#define MICROPY_PY_MACHINE_TIMER (1) +#define MICROPY_PY_MACHINE_RTC (1) +#define MICROPY_PY_MACHINE_I2C (1) +#define MICROPY_PY_MACHINE_ADC (1) +#define MICROPY_PY_MACHINE_TEMP (1) + +#define MICROPY_HW_HAS_LED (1) +#define MICROPY_HW_HAS_SWITCH (0) +#define MICROPY_HW_HAS_FLASH (0) +#define MICROPY_HW_HAS_SDCARD (0) +#define MICROPY_HW_HAS_MMA7660 (0) +#define MICROPY_HW_HAS_LIS3DSH (0) +#define MICROPY_HW_HAS_LCD (0) +#define MICROPY_HW_ENABLE_RNG (0) +#define MICROPY_HW_ENABLE_RTC (0) +#define MICROPY_HW_ENABLE_TIMER (0) +#define MICROPY_HW_ENABLE_SERVO (0) +#define MICROPY_HW_ENABLE_DAC (0) +#define MICROPY_HW_ENABLE_CAN (0) + +#define MICROPY_HW_LED_COUNT (4) +#define MICROPY_HW_LED_PULLUP (1) + +#define MICROPY_HW_LED1 (13) // LED1 +#define MICROPY_HW_LED2 (14) // LED2 +#define MICROPY_HW_LED3 (15) // LED3 +#define MICROPY_HW_LED4 (16) // LED4 + +// UART config +#define MICROPY_HW_UART1_RX (pin_A8) +#define MICROPY_HW_UART1_TX (pin_A6) +#define MICROPY_HW_UART1_CTS (pin_A7) +#define MICROPY_HW_UART1_RTS (pin_A5) +#define MICROPY_HW_UART1_HWFC (1) + +// SPI0 config +#define MICROPY_HW_SPI0_NAME "SPI0" + +#define MICROPY_HW_SPI0_SCK (pin_B15) +#define MICROPY_HW_SPI0_MOSI (pin_B13) +#define MICROPY_HW_SPI0_MISO (pin_B14) + +#define MICROPY_HW_PWM0_NAME "PWM0" +#define MICROPY_HW_PWM1_NAME "PWM1" +#define MICROPY_HW_PWM2_NAME "PWM2" +#if 0 +#define MICROPY_HW_PWM3_NAME "PWM3" +#endif + +#define HELP_TEXT_BOARD_LED "1,2,3,4" + +#define PORT_HEAP_SIZE (128*1024) +#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 diff --git a/ports/nrf/boards/feather52840/mpconfigboard.mk b/ports/nrf/boards/feather52840/mpconfigboard.mk new file mode 100644 index 000000000000..49df644b20be --- /dev/null +++ b/ports/nrf/boards/feather52840/mpconfigboard.mk @@ -0,0 +1,13 @@ +MCU_SERIES = m4 +MCU_VARIANT = nrf52 +MCU_SUB_VARIANT = nrf52840 +SOFTDEV_VERSION ?= 6.0.0-6.alpha + +LD_FILE = boards/nrf52840_1M_256k.ld + +NRF_DEFINES += -DNRF52840_XXAA + +ifeq ($(SD), ) +INC += -Idrivers/bluetooth/s140_$(MCU_VARIANT)_$(SOFTDEV_VERSION)/s140_$(MCU_SUB_VARIANT)_$(SOFTDEV_VERSION)_API/include +INC += -Idrivers/bluetooth/s140_$(MCU_VARIANT)_$(SOFTDEV_VERSION)/s140_$(MCU_SUB_VARIANT)_$(SOFTDEV_VERSION)_API/include/$(MCU_VARIANT) +endif diff --git a/ports/nrf/boards/feather52840/mpconfigboard_s140.mk b/ports/nrf/boards/feather52840/mpconfigboard_s140.mk new file mode 100644 index 000000000000..fbff1f6d8bb6 --- /dev/null +++ b/ports/nrf/boards/feather52840/mpconfigboard_s140.mk @@ -0,0 +1,8 @@ +MCU_SERIES = m4 +MCU_VARIANT = nrf52 +MCU_SUB_VARIANT = nrf52840 +SOFTDEV_VERSION ?= 6.0.0-6.alpha + +LD_FILE = boards/nrf52840_1M_256k_s140_$(SOFTDEV_VERSION).ld + +NRF_DEFINES += -DNRF52840_XXAA diff --git a/ports/nrf/boards/feather52840/nrf52_hal_conf.h b/ports/nrf/boards/feather52840/nrf52_hal_conf.h new file mode 100644 index 000000000000..fd6073a187b7 --- /dev/null +++ b/ports/nrf/boards/feather52840/nrf52_hal_conf.h @@ -0,0 +1,18 @@ +#ifndef NRF52_HAL_CONF_H__ +#define NRF52_HAL_CONF_H__ + +#define HAL_UART_MODULE_ENABLED +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIME_MODULE_ENABLED +#define HAL_PWM_MODULE_ENABLED +#define HAL_RTC_MODULE_ENABLED +#define HAL_TIMER_MODULE_ENABLED +#define HAL_TWI_MODULE_ENABLED +#define HAL_ADCE_MODULE_ENABLED +#define HAL_TEMP_MODULE_ENABLED +#define HAL_RNG_MODULE_ENABLED +// #define HAL_UARTE_MODULE_ENABLED +// #define HAL_SPIE_MODULE_ENABLED +// #define HAL_TWIE_MODULE_ENABLED + +#endif // NRF52_HAL_CONF_H__ diff --git a/ports/nrf/boards/feather52840/pins.c b/ports/nrf/boards/feather52840/pins.c new file mode 100644 index 000000000000..30e9a365c800 --- /dev/null +++ b/ports/nrf/boards/feather52840/pins.c @@ -0,0 +1,191 @@ +// This file was automatically generated by make-pins.py +// +// --af nrf52_af.csv +// --board boards/pca10056/pins.csv +// --prefix boards/nrf52_prefix.c + +// nrf52_prefix.c becomes the initial portion of the generated pins file. + +#include + +#include "py/obj.h" +#include "py/mphal.h" +#include "pin.h" + +#define AF(af_idx, af_fn, af_unit, af_type, af_ptr) \ +{ \ + { &pin_af_type }, \ + .name = MP_QSTR_AF ## af_idx ## _ ## af_fn ## af_unit, \ + .idx = (af_idx), \ + .fn = AF_FN_ ## af_fn, \ + .unit = (af_unit), \ + .type = AF_PIN_TYPE_ ## af_fn ## _ ## af_type, \ + .af_fn = (af_ptr) \ +} + +#define PIN(p_port, p_pin, p_af, p_adc_channel) \ +{ \ + { &mcu_pin_type }, \ + .name = MP_QSTR_ ## p_port ## p_pin, \ + .port = PORT_ ## p_port, \ + .pin = (p_pin), \ + .num_af = (sizeof(p_af) / sizeof(pin_af_obj_t)), \ + /*.pin_mask = (1 << p_pin), */\ + .af = p_af, \ + .adc_channel = p_adc_channel,\ +} + +#define NO_ADC 0 + +const pin_obj_t pin_A0 = PIN(A, 0, NULL, 0); +const pin_obj_t pin_A1 = PIN(A, 1, NULL, 0); +const pin_obj_t pin_A2 = PIN(A, 2, NULL, SAADC_CH_PSELP_PSELP_AnalogInput0); +const pin_obj_t pin_A3 = PIN(A, 3, NULL, SAADC_CH_PSELP_PSELP_AnalogInput1); +const pin_obj_t pin_A4 = PIN(A, 4, NULL, SAADC_CH_PSELP_PSELP_AnalogInput2); +const pin_obj_t pin_A5 = PIN(A, 5, NULL, SAADC_CH_PSELP_PSELP_AnalogInput3); +const pin_obj_t pin_A6 = PIN(A, 6, NULL, 0); +const pin_obj_t pin_A7 = PIN(A, 7, NULL, 0); +const pin_obj_t pin_A8 = PIN(A, 8, NULL, 0); +const pin_obj_t pin_A9 = PIN(A, 9, NULL, 0); +const pin_obj_t pin_A10 = PIN(A, 10, NULL, 0); +const pin_obj_t pin_A11 = PIN(A, 11, NULL, 0); +const pin_obj_t pin_A12 = PIN(A, 12, NULL, 0); +const pin_obj_t pin_A13 = PIN(A, 13, NULL, 0); +const pin_obj_t pin_A14 = PIN(A, 14, NULL, 0); +const pin_obj_t pin_A15 = PIN(A, 15, NULL, 0); +const pin_obj_t pin_A16 = PIN(A, 16, NULL, 0); +const pin_obj_t pin_A17 = PIN(A, 17, NULL, 0); +const pin_obj_t pin_A18 = PIN(A, 18, NULL, 0); +const pin_obj_t pin_A19 = PIN(A, 19, NULL, 0); +const pin_obj_t pin_A20 = PIN(A, 20, NULL, 0); +const pin_obj_t pin_A21 = PIN(A, 21, NULL, 0); +const pin_obj_t pin_A22 = PIN(A, 22, NULL, 0); +const pin_obj_t pin_A23 = PIN(A, 23, NULL, 0); +const pin_obj_t pin_A24 = PIN(A, 24, NULL, 0); +const pin_obj_t pin_A25 = PIN(A, 25, NULL, 0); +const pin_obj_t pin_A26 = PIN(A, 26, NULL, 0); +const pin_obj_t pin_A27 = PIN(A, 27, NULL, 0); +const pin_obj_t pin_A28 = PIN(A, 28, NULL, SAADC_CH_PSELP_PSELP_AnalogInput4); +const pin_obj_t pin_A29 = PIN(A, 29, NULL, SAADC_CH_PSELP_PSELP_AnalogInput5); +const pin_obj_t pin_A30 = PIN(A, 30, NULL, SAADC_CH_PSELP_PSELP_AnalogInput6); +const pin_obj_t pin_A31 = PIN(A, 31, NULL, SAADC_CH_PSELP_PSELP_AnalogInput7); +const pin_obj_t pin_B0 = PIN(B, 0, NULL, 0); +const pin_obj_t pin_B1 = PIN(B, 1, NULL, 0); +const pin_obj_t pin_B2 = PIN(B, 2, NULL, 0); +const pin_obj_t pin_B3 = PIN(B, 3, NULL, 0); +const pin_obj_t pin_B4 = PIN(B, 4, NULL, 0); +const pin_obj_t pin_B5 = PIN(B, 5, NULL, 0); +const pin_obj_t pin_B6 = PIN(B, 6, NULL, 0); +const pin_obj_t pin_B7 = PIN(B, 7, NULL, 0); +const pin_obj_t pin_B8 = PIN(B, 8, NULL, 0); +const pin_obj_t pin_B9 = PIN(B, 9, NULL, 0); +const pin_obj_t pin_B10 = PIN(B, 10, NULL, 0); +const pin_obj_t pin_B11 = PIN(B, 11, NULL, 0); +const pin_obj_t pin_B12 = PIN(B, 12, NULL, 0); +const pin_obj_t pin_B13 = PIN(B, 13, NULL, 0); +const pin_obj_t pin_B14 = PIN(B, 14, NULL, 0); +const pin_obj_t pin_B15 = PIN(B, 15, NULL, 0); + +STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_A0) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_A1) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_A2) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_A3) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_A4) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_A5) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_A6) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_A7) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_A8) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_A9) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_A10) }, + { MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_A11) }, + { MP_ROM_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_A12) }, + { MP_ROM_QSTR(MP_QSTR_A13), MP_ROM_PTR(&pin_A13) }, + { MP_ROM_QSTR(MP_QSTR_A14), MP_ROM_PTR(&pin_A14) }, + { MP_ROM_QSTR(MP_QSTR_A15), MP_ROM_PTR(&pin_A15) }, + { MP_ROM_QSTR(MP_QSTR_A16), MP_ROM_PTR(&pin_A16) }, + { MP_ROM_QSTR(MP_QSTR_A17), MP_ROM_PTR(&pin_A17) }, + { MP_ROM_QSTR(MP_QSTR_A18), MP_ROM_PTR(&pin_A18) }, + { MP_ROM_QSTR(MP_QSTR_A19), MP_ROM_PTR(&pin_A19) }, + { MP_ROM_QSTR(MP_QSTR_A20), MP_ROM_PTR(&pin_A20) }, + { MP_ROM_QSTR(MP_QSTR_A21), MP_ROM_PTR(&pin_A21) }, + { MP_ROM_QSTR(MP_QSTR_A22), MP_ROM_PTR(&pin_A22) }, + { MP_ROM_QSTR(MP_QSTR_A23), MP_ROM_PTR(&pin_A23) }, + { MP_ROM_QSTR(MP_QSTR_A24), MP_ROM_PTR(&pin_A24) }, + { MP_ROM_QSTR(MP_QSTR_A25), MP_ROM_PTR(&pin_A25) }, + { MP_ROM_QSTR(MP_QSTR_A26), MP_ROM_PTR(&pin_A26) }, + { MP_ROM_QSTR(MP_QSTR_A27), MP_ROM_PTR(&pin_A27) }, + { MP_ROM_QSTR(MP_QSTR_A28), MP_ROM_PTR(&pin_A28) }, + { MP_ROM_QSTR(MP_QSTR_A29), MP_ROM_PTR(&pin_A29) }, + { MP_ROM_QSTR(MP_QSTR_A30), MP_ROM_PTR(&pin_A30) }, + { MP_ROM_QSTR(MP_QSTR_A31), MP_ROM_PTR(&pin_A31) }, + { MP_ROM_QSTR(MP_QSTR_B0), MP_ROM_PTR(&pin_B0) }, + { MP_ROM_QSTR(MP_QSTR_B1), MP_ROM_PTR(&pin_B1) }, + { MP_ROM_QSTR(MP_QSTR_B2), MP_ROM_PTR(&pin_B2) }, + { MP_ROM_QSTR(MP_QSTR_B3), MP_ROM_PTR(&pin_B3) }, + { MP_ROM_QSTR(MP_QSTR_B4), MP_ROM_PTR(&pin_B4) }, + { MP_ROM_QSTR(MP_QSTR_B5), MP_ROM_PTR(&pin_B5) }, + { MP_ROM_QSTR(MP_QSTR_B6), MP_ROM_PTR(&pin_B6) }, + { MP_ROM_QSTR(MP_QSTR_B7), MP_ROM_PTR(&pin_B7) }, + { MP_ROM_QSTR(MP_QSTR_B8), MP_ROM_PTR(&pin_B8) }, + { MP_ROM_QSTR(MP_QSTR_B9), MP_ROM_PTR(&pin_B9) }, + { MP_ROM_QSTR(MP_QSTR_B10), MP_ROM_PTR(&pin_B10) }, + { MP_ROM_QSTR(MP_QSTR_B11), MP_ROM_PTR(&pin_B11) }, + { MP_ROM_QSTR(MP_QSTR_B12), MP_ROM_PTR(&pin_B12) }, + { MP_ROM_QSTR(MP_QSTR_B13), MP_ROM_PTR(&pin_B13) }, + { MP_ROM_QSTR(MP_QSTR_B14), MP_ROM_PTR(&pin_B14) }, + { MP_ROM_QSTR(MP_QSTR_B15), MP_ROM_PTR(&pin_B15) }, +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_PA0), MP_ROM_PTR(&pin_A0) }, + { MP_ROM_QSTR(MP_QSTR_PA1), MP_ROM_PTR(&pin_A1) }, + { MP_ROM_QSTR(MP_QSTR_PA2), MP_ROM_PTR(&pin_A2) }, + { MP_ROM_QSTR(MP_QSTR_PA3), MP_ROM_PTR(&pin_A3) }, + { MP_ROM_QSTR(MP_QSTR_PA4), MP_ROM_PTR(&pin_A4) }, + { MP_ROM_QSTR(MP_QSTR_PA5), MP_ROM_PTR(&pin_A5) }, + { MP_ROM_QSTR(MP_QSTR_PA6), MP_ROM_PTR(&pin_A6) }, + { MP_ROM_QSTR(MP_QSTR_PA7), MP_ROM_PTR(&pin_A7) }, + { MP_ROM_QSTR(MP_QSTR_PA8), MP_ROM_PTR(&pin_A8) }, + { MP_ROM_QSTR(MP_QSTR_PA9), MP_ROM_PTR(&pin_A9) }, + { MP_ROM_QSTR(MP_QSTR_PA10), MP_ROM_PTR(&pin_A10) }, + { MP_ROM_QSTR(MP_QSTR_PA11), MP_ROM_PTR(&pin_A11) }, + { MP_ROM_QSTR(MP_QSTR_PA12), MP_ROM_PTR(&pin_A12) }, + { MP_ROM_QSTR(MP_QSTR_PA13), MP_ROM_PTR(&pin_A13) }, + { MP_ROM_QSTR(MP_QSTR_PA14), MP_ROM_PTR(&pin_A14) }, + { MP_ROM_QSTR(MP_QSTR_PA15), MP_ROM_PTR(&pin_A15) }, + { MP_ROM_QSTR(MP_QSTR_PA16), MP_ROM_PTR(&pin_A16) }, + { MP_ROM_QSTR(MP_QSTR_PA17), MP_ROM_PTR(&pin_A17) }, + { MP_ROM_QSTR(MP_QSTR_PA18), MP_ROM_PTR(&pin_A18) }, + { MP_ROM_QSTR(MP_QSTR_PA19), MP_ROM_PTR(&pin_A19) }, + { MP_ROM_QSTR(MP_QSTR_PA20), MP_ROM_PTR(&pin_A20) }, + { MP_ROM_QSTR(MP_QSTR_PA21), MP_ROM_PTR(&pin_A21) }, + { MP_ROM_QSTR(MP_QSTR_PA22), MP_ROM_PTR(&pin_A22) }, + { MP_ROM_QSTR(MP_QSTR_PA23), MP_ROM_PTR(&pin_A23) }, + { MP_ROM_QSTR(MP_QSTR_PA24), MP_ROM_PTR(&pin_A24) }, + { MP_ROM_QSTR(MP_QSTR_PA25), MP_ROM_PTR(&pin_A25) }, + { MP_ROM_QSTR(MP_QSTR_PA26), MP_ROM_PTR(&pin_A26) }, + { MP_ROM_QSTR(MP_QSTR_PA27), MP_ROM_PTR(&pin_A27) }, + { MP_ROM_QSTR(MP_QSTR_PA28), MP_ROM_PTR(&pin_A28) }, + { MP_ROM_QSTR(MP_QSTR_PA29), MP_ROM_PTR(&pin_A29) }, + { MP_ROM_QSTR(MP_QSTR_PA30), MP_ROM_PTR(&pin_A30) }, + { MP_ROM_QSTR(MP_QSTR_PA31), MP_ROM_PTR(&pin_A31) }, + { MP_ROM_QSTR(MP_QSTR_PB0), MP_ROM_PTR(&pin_B0) }, + { MP_ROM_QSTR(MP_QSTR_PB1), MP_ROM_PTR(&pin_B1) }, + { MP_ROM_QSTR(MP_QSTR_PB2), MP_ROM_PTR(&pin_B2) }, + { MP_ROM_QSTR(MP_QSTR_PB3), MP_ROM_PTR(&pin_B3) }, + { MP_ROM_QSTR(MP_QSTR_PB4), MP_ROM_PTR(&pin_B4) }, + { MP_ROM_QSTR(MP_QSTR_PB5), MP_ROM_PTR(&pin_B5) }, + { MP_ROM_QSTR(MP_QSTR_PB6), MP_ROM_PTR(&pin_B6) }, + { MP_ROM_QSTR(MP_QSTR_PB7), MP_ROM_PTR(&pin_B7) }, + { MP_ROM_QSTR(MP_QSTR_PB8), MP_ROM_PTR(&pin_B8) }, + { MP_ROM_QSTR(MP_QSTR_PB9), MP_ROM_PTR(&pin_B9) }, + { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_B10) }, + { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_B11) }, + { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_B12) }, + { MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_B13) }, + { MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_B14) }, + { MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_B15) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/feather52840/pins.csv b/ports/nrf/boards/feather52840/pins.csv new file mode 100644 index 000000000000..f2f7f19672b3 --- /dev/null +++ b/ports/nrf/boards/feather52840/pins.csv @@ -0,0 +1,48 @@ +PA0,PA0 +PA1,PA1 +PA2,PA2,ADC0_IN0 +PA3,PA3,ADC0_IN1 +PA4,PA4,ADC0_IN2 +PA5,PA5,ADC0_IN3 +PA6,PA6 +PA7,PA7 +PA8,PA8 +PA9,PA9 +PA10,PA10 +PA11,PA11 +PA12,PA12 +PA13,PA13 +PA14,PA14 +PA15,PA15 +PA16,PA16 +PA17,PA17 +PA18,PA18 +PA19,PA19 +PA20,PA20 +PA21,PA21 +PA22,PA22 +PA23,PA23 +PA24,PA24 +PA25,PA25 +PA26,PA26 +PA27,PA27 +PA28,PA28,ADC0_IN4 +PA29,PA29,ADC0_IN5 +PA30,PA30,ADC0_IN6 +PA31,PA31,ADC0_IN7 +PB0,PB0 +PB1,PB1 +PB2,PB2 +PB3,PB3 +PB4,PB4 +PB5,PB5 +PB6,PB6 +PB7,PB7 +PB8,PB8 +PB9,PB9 +PB10,PB10 +PB11,PB11 +PB12,PB12 +PB13,PB13 +PB14,PB14 +PB15,PB15 diff --git a/ports/nrf/boards/feather52840/pins.h b/ports/nrf/boards/feather52840/pins.h new file mode 100644 index 000000000000..0ea1f0450a1c --- /dev/null +++ b/ports/nrf/boards/feather52840/pins.h @@ -0,0 +1,51 @@ +extern const pin_obj_t pin_A0; +extern const pin_obj_t pin_A1; +extern const pin_obj_t pin_A2; +extern const pin_obj_t pin_A3; +extern const pin_obj_t pin_A4; +extern const pin_obj_t pin_A5; +extern const pin_obj_t pin_A6; +extern const pin_obj_t pin_A7; +extern const pin_obj_t pin_A8; +extern const pin_obj_t pin_A9; +extern const pin_obj_t pin_A10; +extern const pin_obj_t pin_A11; +extern const pin_obj_t pin_A12; +extern const pin_obj_t pin_A13; +extern const pin_obj_t pin_A14; +extern const pin_obj_t pin_A15; +extern const pin_obj_t pin_A16; +extern const pin_obj_t pin_A17; +extern const pin_obj_t pin_A18; +extern const pin_obj_t pin_A19; +extern const pin_obj_t pin_A20; +extern const pin_obj_t pin_A21; +extern const pin_obj_t pin_A22; +extern const pin_obj_t pin_A23; +extern const pin_obj_t pin_A24; +extern const pin_obj_t pin_A25; +extern const pin_obj_t pin_A26; +extern const pin_obj_t pin_A27; +extern const pin_obj_t pin_A28; +extern const pin_obj_t pin_A29; +extern const pin_obj_t pin_A30; +extern const pin_obj_t pin_A31; +extern const pin_obj_t pin_B0; +extern const pin_obj_t pin_B1; +extern const pin_obj_t pin_B2; +extern const pin_obj_t pin_B3; +extern const pin_obj_t pin_B4; +extern const pin_obj_t pin_B5; +extern const pin_obj_t pin_B6; +extern const pin_obj_t pin_B7; +extern const pin_obj_t pin_B8; +extern const pin_obj_t pin_B9; +extern const pin_obj_t pin_B10; +extern const pin_obj_t pin_B11; +extern const pin_obj_t pin_B12; +extern const pin_obj_t pin_B13; +extern const pin_obj_t pin_B14; +extern const pin_obj_t pin_B15; +extern const pin_obj_t * const pin_adc1[]; +extern const pin_obj_t * const pin_adc2[]; +extern const pin_obj_t * const pin_adc3[];