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does isa yaml spec have options to be able to support Smclic #133

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dansmathers opened this issue Jul 27, 2023 · 7 comments
Open

does isa yaml spec have options to be able to support Smclic #133

dansmathers opened this issue Jul 27, 2023 · 7 comments

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@dansmathers
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I'm trying to create ACT tests for clint and clic (ratified AIA will have the same issue). neither extension adds any instructions so does not need to be passed to the toolchain (toolchain won't recognize these instructions). but I need a way to tell riscof to select these tests. Is there a way to pass this info to either isa yaml or platform yaml so that Smclic, Smclint tests will be selected without passing that to the toolchain?

The clint tests I developed also use msip (software interrupts) but riscof generated an error when I included that in the platform yaml. riscof only currently expects mtime?

@pawks
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pawks commented Jul 27, 2023

There is no support for clic in riscv-config right now.

@dansmathers
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dansmathers commented Jul 27, 2023

I don't need support for clic. I'm developing that. FYI, I'm the chair of fast interrupts task group - clic, and I'm going to be developing ACT tests for clic. clic (and other extensions like clint/aia) just need a way for ricvof to select the correct tests without passing the same extension command to the toolchain. I assume that doesn't exist currently?

@pawks
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pawks commented Jul 31, 2023

The isa to compile the test(described by RVTEST_ISA) can be different than the ISA which describes the hardware. The filtering happens based on the latter while the former is used to compile the test.

@dansmathers
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Can you point me to documentation on how and where to specify RVTEST_ISA? Do I add it to spike_isa.yaml or spike_platform.yaml like this?
hart0:
RVTEST_ISA: RV32IMCZicsr_Zifencei_Smclint
ISA: RV32IMCZicsr_Zifencei

I get this error when I try validateyaml:

~/riscof$ riscof validateyaml --config=config.ini
INFO | ****** RISCOF: RISC-V Architectural Test Framework 1.25.3 *******
INFO | using riscv_isac version : 0.17.0
INFO | using riscv_config version : 3.9.1
INFO | Reading configuration from: /riscof/config.ini
INFO | Preparing Models
INFO | Input-ISA file
INFO | Loading input file: /riscof/spike/spike_isa.yaml
INFO | Load Schema /.local/lib/python3.8/site-packages/riscv_config/schemas/schema_isa.yaml
INFO | Processing Hart: hart0
INFO | Initiating Validation
ERROR | Error in /riscof/spike/spike_isa.yaml.
ERROR | RVTEST_ISA:
ERROR | - unknown field

@dansmathers
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or do you mean
spike_isa.yaml should look like:
hart0:
ISA: RV32IMCZicsr_Zifencei_Smclint

Smclint tests should look like:
RVTEST_ISA("RV32I_Zicsr")
...
#ifdef TEST_CASE_1
RVTEST_CASE(1,"//check ISA:=regex(.32.); check ISA:=regex(.*I.*Zicsr.Smclint.); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ebreak)

and modifications need to be made to constants.py and isa_validator.py? If you add support for Smclint in constants.py and isa_validator.py, I can imitate and add support for Ssclint, Smclic, Ssclic, Smaia, Ssaia. (or if you don't mind doing them all.

thanks

@neelgala
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neelgala commented Aug 1, 2023

@dansmathers would be great if you could raise a PR for the extensions you mentioned. You could simply add the list of S* extensions here. Updates in the ISA validator.py are required if there are certain constraints on combination/exclusivity for the extensions you are adding.

dansmathers added a commit to dansmathers/riscv-config that referenced this issue Aug 3, 2023
Update constants.py to include Sxclint/Sxclic/Sxaia  for issue: riscv-software-src#133
@dansmathers
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this change is needed for the Smclint/Ssclint tests proposed in riscv-non-isa/riscv-arch-test#372

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