nes-nrom-128.cfg

SYMBOLS {
    # See STACK below in MEMORY section
    __STACK_START__: type = weak, value = $0600;
    __STACK_SIZE__:  type = weak, value = $200;
}

MEMORY {
    # The NES CPU has 2 KiB of RAM in eight 256-byte pages. The first page is
    # called the zero page as the first byte of its addresses are alway $00.
    # There are special instructions for dealing with zero page RAM that are
    # faster than those that operate on the other pages, as the first byte of
    # the address is implicit.
    ZP: start = $00, size = $100;

    # Page one ($0100-$01ff) is the 6502 CPU stack

    # We'll use page two for OAM
    OAM: start = $0200, size = $100;

    # We'll use the last five pages for general RAM and the C stack
    RAM: start = $0300, size = $300;
    STACK: start = __STACK_START__, size = __STACK_SIZE__;

    # We'll put a 16-byte iNES header at the beginning of our ROM.
    # This is used by emulators to determine which hardware to emulate.
    HEADER: start = $0, size = $10, file = %O, fill = yes;

    # We'll use a simple NROM cartridge with 16KiB of PRG ROM.
    # The 16KiB ROM bank is mapped to CPU addresses $8000-$bfff (and mirrored
    # to CPU addresses $c000-$ffff). Notice we're setting it's size to $3ffa,
    # which is actually 6 bytes less than 16KiB ($4000). This is to leave room
    # for the three 2-byte interrupt vector addresses at the end of the ROM.
    PRG: start = $8000, size = $3ffa, file = %O, fill = yes;

    # The CPU expects interrupt vectors at fixed addresses:
    # $fffa-$fffb NMI vector
    # $fffc-$fffd Reset vector
    # $fffe-$ffff IRQ vector
    VECTORS: start = $fffa, size = $6, file = %O, fill = yes;

    # We'll use a simple NROM cartridge with one 8 KiB bank of CHR ROM.
    CHR: start = $0000, size = $2000, file = %O, fill = yes;
}

SEGMENTS {
    # iNES header at beginning of file
    HEADER:   load = HEADER,         type = ro;

    # PRG ROM
    STARTUP:  load = PRG,            type = ro,  define = yes;
    CODE:     load = PRG,            type = ro,  define = yes;
    RODATA:   load = PRG,            type = ro,  define = yes;
    DATA:     load = PRG, run = RAM, type = rw,  define = yes;
    VECTORS:  load = VECTORS,        type = ro;

    # CHR ROM
    CHARS:    load = CHR,            type = ro;

    # CPU RAM
    ZEROPAGE:  load = ZP,            type = zp;
    OAM:       load = OAM,           type = bss, define = yes;
    BSS:       load = RAM,           type = bss, define = yes;
}