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riscv32
platform support
#117874
riscv32
platform support
#117874
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r? @cjgillot (rustbot has picked a reviewer for you, use r? to override) |
These commits modify compiler targets. |
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The PR description is missing the answers to the Tier 3 (maybe even Tier 2) target policy, example here.
This is also missing the mandatory platform support page (even if the other RISC-V targets don't have them yet).
Don't forget to also update the src/doc/rustc/src/SUMMARY.md
file
I don't have enough knowledge to review this, and no time to acquire it. |
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These commits modify compiler targets. |
riscv{32|64}-imafc
bare metal targets riscv32-imafc
bare metal targets
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riscv32-imafc
bare metal targets riscv32
platform support
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I've dropped support for the 64bit target, added (retroactively) platform support documents for the existing RISCV32 targets and updated the original description with tier 2 policy requirements. |
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r? compiler |
r? compiler |
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This looks good to me - I suggest that you first add these at tier three, then I can just approve this and get the target specifications merged quickly for you.
For tier two, we require the team's sign-off, which we'd do with a major change proposal - if you submit one of these then I can second it as soon as I see it, but it still takes 10 days or so until it goes through, so other members of the team have time to see it.
Up to you whether you want to do that now and wait then merge this, or merge this first as tier three and update to tier two in a later PR.
- riscv32imac-unknown-none-elf - Add platform support docs for rv32
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Thanks for the review @davidtwco! I've reverted the |
@bors r+ rollup |
…iaskrgr Rollup of 7 pull requests Successful merges: - rust-lang#116496 (Provide context when `?` can't be called because of `Result<_, E>`) - rust-lang#117563 (docs: clarify explicitly freeing heap allocated memory) - rust-lang#117874 (`riscv32` platform support) - rust-lang#118516 (Add ADT variant infomation to StableMIR and finish implementing TyKind::internal()) - rust-lang#118650 (add comment about keeping flags in sync between bootstrap.py and bootstrap.rs) - rust-lang#118664 (docs: remove rust-lang#110800 from release notes) - rust-lang#118669 (library: fix comment about const assert in win api) r? `@ghost` `@rustbot` modify labels: rollup
Rollup merge of rust-lang#117874 - esp-rs:riscv3264imafc-unknown-none-elf, r=davidtwco `riscv32` platform support This PR adds the following RISCV targets to the tier 2 list of targets: - riscv32imafc-unknown-none-elf - riscv32im-unknown-none-elf The rationale behind adding them directly to tier 2, is that the other bare metal targets already exist at tier 2, and these new targets are the same with an additional target feature enabled. As well as the additional targets, this PR fills out the platform support document(s) that were previously missing. ~~The RISC-V bare metal targets don't currently have a platform support document, but this will change soon as the RISC-V team from the Rust-embedded working group will maintain these once davidtwco#1 is merged (and `@davidtwco's` upstream PR is merged after). For the time being you can cc myself or any other member of the RISC-V team: https://github.com/orgs/rust-embedded/teams/riscv.~~ > A tier 2 target must have value to people other than its maintainers. (It may still be a niche target, but it must not be exclusively useful for an inherently closed group.) RISC-V is an open specification, used and accessible to anyone including individuals. > A tier 2 target must have a designated team of developers (the "target maintainers") available to consult on target-specific build-breaking issues, or if necessary to develop target-specific language or library implementation details. This team must have at least 2 developers. This rust-embedded working group's [RISCV team](https://github.com/orgs/rust-embedded/teams/riscv) will maintain these targets. > The target must not place undue burden on Rust developers not specifically concerned with that target. Rust developers are expected to not gratuitously break a tier 2 target, but are not expected to become experts in every tier 2 target, and are not expected to provide target-specific implementations for every tier 2 target. I don't forsee this being an issue, the RISCV team will ensure we avoid undue burden for the general Rust community. > The target must provide documentation for the Rust community explaining how to build for the target using cross-compilation, and explaining how to run tests for the target. If at all possible, this documentation should show how to run Rust programs and tests for the target using emulation, to allow anyone to do so. If the target cannot be feasibly emulated, the documentation should explain how to obtain and work with physical hardware, cloud systems, or equivalent. There are links to resources we maintain in the re wg org in the platform support document. > The target must document its baseline expectations for the features or versions of CPUs, operating systems, libraries, runtime environments, and similar. Documented in the platform support document. > If introducing a new tier 2 or higher target that is identical to an existing Rust target except for the baseline expectations for the features or versions of CPUs, operating systems, libraries, runtime environments, and similar, then the proposed target must document to the satisfaction of the approving teams why the specific difference in baseline expectations provides sufficient value to justify a separate target. New target features in RISCV can drastically change the capability of a CPU, hence the need for a separate target to support different variants. We aim to support any ratified RISCV extensions. > Tier 2 targets must not leave any significant portions of core or the standard library unimplemented or stubbed out, unless they cannot possibly be supported on the target. `core` is fully implemented. > The code generation backend for the target should not have deficiencies that invalidate Rust safety properties, as evaluated by the Rust compiler team. (This requirement does not apply to arbitrary security enhancements or mitigations provided by code generation backends, only to those properties needed to ensure safe Rust code cannot cause undefined behavior or other unsoundness.) If this requirement does not hold, the target must clearly and prominently document any such limitations as part of the target's entry in the target tier list, and ideally also via a failing test in the testsuite. The Rust compiler team must be satisfied with the balance between these limitations and the difficulty of implementing the necessary features. RISCV is a well-established and well-maintained LLVM backend. To the best of my knowledge, the backend won't cause the generated code to have undefined behaviour. > If the target supports C code, and the target has an interoperable calling convention for C code, the Rust target must support that C calling convention for the platform via extern "C". The C calling convention does not need to be the default Rust calling convention for the target, however. The C calling convention is supported by RISCV. > The target must build reliably in CI, for all components that Rust's CI considers mandatory. For the last 4-5 years many of these RISCV targets have been building in CI without any known issues. > The approving teams may additionally require that a subset of tests pass in CI, such as enough to build a functional "hello world" program, ./x.py test --no-run, or equivalent "smoke tests". In particular, this requirement may apply if the target builds host tools, or if the tests in question provide substantial value via early detection of critical problems. Not applicable, in the future we may wish to add qemu tests but this is out of scope for now. > Building the target in CI must not take substantially longer than the current slowest target in CI, and should not substantially raise the maintenance burden of the CI infrastructure. This requirement is subjective, to be evaluated by the infrastructure team, and will take the community importance of the target into account. To the best of my knowledge, this will not induce a burden on the current CI infra. > Tier 2 targets should, if at all possible, support cross-compiling. Tier 2 targets should not require using the target as the host for builds, even if the target supports host tools. Cross-compilation is supported and documented in the platform support document. > In addition to the legal requirements for all targets (specified in the tier 3 requirements), because a tier 2 target typically involves the Rust project building and supplying various compiled binaries, incorporating the target and redistributing any resulting compiled binaries (e.g. built libraries, host tools if any) must not impose any onerous license requirements on any members of the Rust project, including infrastructure team members and those operating CI systems. This is a subjective requirement, to be evaluated by the approving teams. There are no additional license issues to worry about. > Tier 2 targets must not impose burden on the authors of pull requests, or other developers in the community, to ensure that tests pass for the target. In particular, do not post comments (automated or manual) on a PR that derail or suggest a block on the PR based on tests failing for the target. Do not send automated messages or notifications (via any medium, including via `@)` to a PR author or others involved with a PR regarding the PR breaking tests on a tier 2 target, unless they have opted into such messages. The RISCV team agrees not to do this. > The target maintainers should regularly run the testsuite for the target, and should fix any test failures in a reasonably timely fashion. The RISCV team will fix any issues in a timely manner.
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riscv32imac-unknown-none-elf.md |
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I did not know about this quirk of mdbook that turns it into a symlink. Cute.
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Hmm, wait, the table links to the same file... no, I think this is just not getting used at all...?
@MabezDev Was this intentional?
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Oops, you're right. I will fix that now.
…jubilee Remove redundant files, rename base riscv32 file Fixes a mistake I made in rust-lang#117874.
…jubilee Remove redundant files, rename base riscv32 file Fixes a mistake I made in rust-lang#117874.
…jubilee Remove redundant files, rename base riscv32 file Fixes a mistake I made in rust-lang#117874.
Rollup merge of rust-lang#122700 - esp-rs:remove-old-files, r=workingjubilee Remove redundant files, rename base riscv32 file Fixes a mistake I made in rust-lang#117874.
Remove redundant files, rename base riscv32 file Fixes a mistake I made in rust-lang/rust#117874.
…crum Enable building tier2 target riscv32im-unknown-none-elf riscv32im-unknown-none-elf was promoted to tier2 in rust-lang#117874 but it has not yet been added to the list of build targets. By adding riscv32im-unknown-none-elf to the list of build targets, this PR enables end-users to install this target via rustup.
Rollup merge of rust-lang#123530 - 9names:build-rv32im, r=Mark-Simulacrum Enable building tier2 target riscv32im-unknown-none-elf riscv32im-unknown-none-elf was promoted to tier2 in rust-lang#117874 but it has not yet been added to the list of build targets. By adding riscv32im-unknown-none-elf to the list of build targets, this PR enables end-users to install this target via rustup.
Enable building tier2 target riscv32im-unknown-none-elf riscv32im-unknown-none-elf was promoted to tier2 in rust-lang/rust#117874 but it has not yet been added to the list of build targets. By adding riscv32im-unknown-none-elf to the list of build targets, this PR enables end-users to install this target via rustup.
This PR adds the following RISCV targets to the tier 2 list of targets:
The rationale behind adding them directly to tier 2, is that the other bare metal targets already exist at tier 2, and these new targets are the same with an additional target feature enabled.
As well as the additional targets, this PR fills out the platform support document(s) that were previously missing.
The RISC-V bare metal targets don't currently have a platform support document, but this will change soon as the RISC-V team from the Rust-embedded working group will maintain these once davidtwco#1 is merged (and @davidtwco's upstream PR is merged after). For the time being you can cc myself or any other member of the RISC-V team: https://github.com/orgs/rust-embedded/teams/riscv.RISC-V is an open specification, used and accessible to anyone including individuals.
This rust-embedded working group's RISCV team will maintain these targets.
I don't forsee this being an issue, the RISCV team will ensure we avoid undue burden for the general Rust community.
There are links to resources we maintain in the re wg org in the platform support document.
Documented in the platform support document.
New target features in RISCV can drastically change the capability of a CPU, hence the need for a separate target to support different variants. We aim to support any ratified RISCV extensions.
core
is fully implemented.RISCV is a well-established and well-maintained LLVM backend. To the best of my knowledge, the backend won't cause the generated code to have undefined behaviour.
The C calling convention is supported by RISCV.
For the last 4-5 years many of these RISCV targets have been building in CI without any known issues.
Not applicable, in the future we may wish to add qemu tests but this is out of scope for now.
To the best of my knowledge, this will not induce a burden on the current CI infra.
Cross-compilation is supported and documented in the platform support document.
There are no additional license issues to worry about.
The RISCV team agrees not to do this.
The RISCV team will fix any issues in a timely manner.