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Fewer refereces
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matthiasgoergens committed Dec 12, 2024
1 parent 0a11f3a commit 3c9e297
Showing 1 changed file with 2 additions and 2 deletions.
4 changes: 2 additions & 2 deletions ceno_zkvm/src/instructions/riscv/shift_imm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -106,8 +106,8 @@ impl<E: ExtensionField, I: RIVInstruction> Instruction<E> for ShiftImmInstructio
let (inflow, is_lt_config) = match I::INST_KIND {
InsnKind::SRAI => {
let is_rs1_neg = rs1_read.is_negative(circuit_builder)?;
let ones = imm.expr() - 1;
((&is_rs1_neg).expr() * ones, Some(is_rs1_neg))
let ones: Expression<E> = imm.expr() - 1;
(is_rs1_neg.expr() * ones, Some(is_rs1_neg))
}
InsnKind::SRLI => (Expression::ZERO, None),
_ => unreachable!(),
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