From 3c9e297ee15c6bfc4dacc91f6feef5c2d627ca81 Mon Sep 17 00:00:00 2001
From: Matthias Goergens <matthias.goergens@gmail.com>
Date: Thu, 12 Dec 2024 18:25:40 +0800
Subject: [PATCH] Fewer refereces

---
 ceno_zkvm/src/instructions/riscv/shift_imm.rs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/ceno_zkvm/src/instructions/riscv/shift_imm.rs b/ceno_zkvm/src/instructions/riscv/shift_imm.rs
index 166d18875..3f02b5603 100644
--- a/ceno_zkvm/src/instructions/riscv/shift_imm.rs
+++ b/ceno_zkvm/src/instructions/riscv/shift_imm.rs
@@ -106,8 +106,8 @@ impl<E: ExtensionField, I: RIVInstruction> Instruction<E> for ShiftImmInstructio
                 let (inflow, is_lt_config) = match I::INST_KIND {
                     InsnKind::SRAI => {
                         let is_rs1_neg = rs1_read.is_negative(circuit_builder)?;
-                        let ones = imm.expr() - 1;
-                        ((&is_rs1_neg).expr() * ones, Some(is_rs1_neg))
+                        let ones: Expression<E> = imm.expr() - 1;
+                        (is_rs1_neg.expr() * ones, Some(is_rs1_neg))
                     }
                     InsnKind::SRLI => (Expression::ZERO, None),
                     _ => unreachable!(),