shizun_ge_resume.tex

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  pdfkeywords={shizun resume software},
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\begin{document}
\thispagestyle{empty}
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% HEADER
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%\centerline{{\Huge\bf{Shizun Ge}}} % fontsize for Huge is 24.88
\centerline{{\fontsize{35}{60}\selectfont \rg{Shizun Ge}}}
\vspace{2em}
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  \headerleft{Contact}{
    +1-857-891-7998\\
    \href{mailto:resume@shizunge.com}{resume@shizunge.com}\\
    \href{https://github.com/shizunge}{github.com/shizunge}\\
  }

  \headerleft{Skills}{
    \skills{Software}{
      C++\\
      C\\
      Go\\
      Bash\\
      Docker\\
      Tcl\\
      Python\\
      Embedded\\
      Linux device driver\\
    }
    \vspace{0.5em}
    \skills{FPGA}{
      Verilog\\
      SystemVerilog\\
      Static Timing Analysis\\
      FPGA-based prototyping\\
      Protocompiler\\
      Synplify\\
      VCS-MX\\
      Verdi\\
      Xilinx Vivado\\
    }
  }

  \headerleft{Recent coursework}{
    \rb{Effective Leadership and Management}
    \rb{IO Concepts and Protocols: PCI Express, Ethernet, and Fibre Channel}
    \rb{Linux Device Drivers, Advanced}
    \rb{Linux Performance in the Cloud and Data Center}
    \rb{System Virtualization Fundamentals}
  }

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  \headerright{Career summary}{
    \begin{flushleft}
    \begin{itemize}
      \item Experienced {\kw software engineer}, leading a team to deliver verification and validation solutions to lower the barrier to designing semiconductor chips
    \end{itemize}
    \end{flushleft}
  } % Career summary

  \headerright{Experience}{
    \job{Senior Software Engineer}{9/2018}{Present}{Google}{Sunnyvale, CA}{
      \begin{itemize}
        \item Led a software team developing simulators for the next generation TPU, while being a solid individual contributor proficient in {\kw C++}
        \begin{itemize}
          \item Scoped, planned, delegated and executed tasks
          \item Collaborated with multiple hardware and software teams, prioritizing tasks, and delivering features on time to unblock tape-out
          \item Defined a roadmap and provided insights for improved architecture
          \item Mentored and tutored new hires and junior team members
        \end{itemize}
        \item Designed and developed a co-simulation framework for a FPGA product using {\kw C++} and {\kw SystemVerilog}
        \item Developed tools and test cases for hardware diagnostics in the platform infrastructure team, using {\kw Go}, {\kw C++} and {\kw Python}
      \end{itemize}
    }

    \job{Staff R\&D Engineer}{8/2013}{9/2018}{Synopsys}{Mountain View, CA}{
      \begin{itemize}
        \item Led projects of HSTDM, a distinguishing technology for HAPS prototyping system, resulting in full adoption of HSTDM and success at customer sites
        \begin{itemize}
          \item Designed and implemented time-division multiplexing (TDM) IP in {\kw Verilog} based on Xilinx Select IO on {\kw Xilinx Virtex7} and {\kw Ultrascale} platform
          \item Developed an IP insertion software flow using {\kw C++} and {\kw C}
          \item Developed various {\kw Tcl} {\kw scripts} helping internal and external customers develop, debug, bringup and monitor FPGA prototyping system
        \end{itemize}
        \item Designed and implemented a runtime software framework and IPs for SystemVerilog DPI on HAPS, using {\kw C++} and {\kw Verilog}
        \item Coordinated multiple teams cross geographical coordinations, including software, firmware, hardware, testing, vendors and customers
      \end{itemize}
    }

    \job{Software Engineer}{10/2012}{8/2013}{Minor Studios Interactive LLC}{Los Angeles, CA}{
      \begin{itemize}
        \item Developed real time HD video processing programs on GPU
      \end{itemize}
    }
    
    \job{Research Assistant}{9/2011}{9/2012}{Boston University}{Boston, MA}{
      \begin{itemize}
        \item Developed error control codes algorithm to prevent side-channel attacks
      \end{itemize}
    }
  } % Experience

  \headerright{Education}{
    \education{Certificate}{Leadership and Management}{2025 (Expected)}
      {UC Berkeley Extension}{Online}
    \education{Certificate}{Embedded Systems}{5/2019}
      {UCSC Silicon Valley Extension}{Santa Clara, CA}
    \education{Master of Science}{in Computer Engineering}{9/2012}
      {Boston University College of Engineering}{Boston, MA}
    \education{Bachelor of Engineering}{in Electronic Engineering}{5/2010}
      {The Chinese University of Hong Kong}{Hong Kong SAR}
  } % Education

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\end{document}