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Change aon block reg-name to "control"
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sctincman committed Apr 15, 2020
1 parent eb3a3b0 commit 6d9ac63
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Showing 15 changed files with 19 additions and 19 deletions.
2 changes: 1 addition & 1 deletion bsp/qemu-sifive-e31/core.dts
Original file line number Diff line number Diff line change
Expand Up @@ -86,7 +86,7 @@
aon: aon@10000000 {
compatible = "sifive,aon0";
reg = <0x10000000 0x8000>;
reg-names = "mem";
reg-names = "control";
};
prci: prci@10008000 {
compatible = "sifive,fe310-g000,prci";
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2 changes: 1 addition & 1 deletion bsp/qemu-sifive-e31/design.svd
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,7 @@
</peripheral>
<peripheral>
<name>sifive_aon0_0</name>
<description>From sifive,aon0,mem peripheral generator</description>
<description>From sifive,aon0,control peripheral generator</description>
<baseAddress>0x10000000</baseAddress>
<addressBlock>
<offset>0</offset>
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2 changes: 1 addition & 1 deletion bsp/qemu-sifive-e31/metal.h
Original file line number Diff line number Diff line change
Expand Up @@ -1095,7 +1095,7 @@ static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_lfrosc_p
static __inline__ unsigned long int __metal_driver_sifive_fe310_g000_lfrosc_config_reg(const struct metal_clock *clock)
{
if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_6) {
return 112;
return 268435568;
}
else {
return 0;
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2 changes: 1 addition & 1 deletion bsp/qemu-sifive-s51/core.dts
Original file line number Diff line number Diff line change
Expand Up @@ -89,7 +89,7 @@
aon: aon@10000000 {
compatible = "sifive,aon0";
reg = <0x10000000 0x8000>;
reg-names = "mem";
reg-names = "control";
};

prci: prci@10008000 {
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2 changes: 1 addition & 1 deletion bsp/qemu-sifive-s51/design.svd
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,7 @@
</peripheral>
<peripheral>
<name>sifive_aon0_0</name>
<description>From sifive,aon0,mem peripheral generator</description>
<description>From sifive,aon0,control peripheral generator</description>
<baseAddress>0x10000000</baseAddress>
<addressBlock>
<offset>0</offset>
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2 changes: 1 addition & 1 deletion bsp/qemu-sifive-s51/metal.h
Original file line number Diff line number Diff line change
Expand Up @@ -1095,7 +1095,7 @@ static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_lfrosc_p
static __inline__ unsigned long int __metal_driver_sifive_fe310_g000_lfrosc_config_reg(const struct metal_clock *clock)
{
if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_6) {
return 112;
return 268435568;
}
else {
return 0;
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2 changes: 1 addition & 1 deletion bsp/sifive-hifive1-revb/core.dts
Original file line number Diff line number Diff line change
Expand Up @@ -123,7 +123,7 @@
aon: aon@10000000 {
compatible = "sifive,aon0";
reg = <0x10000000 0x8000>;
reg-names = "mem";
reg-names = "control";
interrupt-parent = <&plic>;
interrupts = <1 2>;
clocks = <&lfclk>;
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2 changes: 1 addition & 1 deletion bsp/sifive-hifive1-revb/design.svd
Original file line number Diff line number Diff line change
Expand Up @@ -341,7 +341,7 @@
</peripheral>
<peripheral>
<name>sifive_aon0_0</name>
<description>From sifive,aon0,mem peripheral generator</description>
<description>From sifive,aon0,control peripheral generator</description>
<baseAddress>0x10000000</baseAddress>
<addressBlock>
<offset>0</offset>
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4 changes: 2 additions & 2 deletions bsp/sifive-hifive1-revb/metal.h
Original file line number Diff line number Diff line change
Expand Up @@ -1300,7 +1300,7 @@ static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_lfrosc_p
static __inline__ unsigned long int __metal_driver_sifive_fe310_g000_lfrosc_config_reg(const struct metal_clock *clock)
{
if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_7) {
return 112;
return 268435568;
}
else {
return 0;
Expand All @@ -1310,7 +1310,7 @@ static __inline__ unsigned long int __metal_driver_sifive_fe310_g000_lfrosc_conf
static __inline__ unsigned long int __metal_driver_sifive_fe310_g000_lfrosc_mux_reg(const struct metal_clock *clock)
{
if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_7) {
return 124;
return 268435580;
}
else {
return 0;
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2 changes: 1 addition & 1 deletion bsp/sifive-hifive1/core.dts
Original file line number Diff line number Diff line change
Expand Up @@ -85,7 +85,7 @@
aon: aon@10000000 {
compatible = "sifive,aon0";
reg = <0x10000000 0x8000>;
reg-names = "mem";
reg-names = "control";
};

prci: prci@10008000 {
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2 changes: 1 addition & 1 deletion bsp/sifive-hifive1/design.svd
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@
<peripherals>
<peripheral>
<name>sifive_aon0_0</name>
<description>From sifive,aon0,mem peripheral generator</description>
<description>From sifive,aon0,control peripheral generator</description>
<baseAddress>0x10000000</baseAddress>
<addressBlock>
<offset>0</offset>
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2 changes: 1 addition & 1 deletion bsp/sifive-hifive1/metal.h
Original file line number Diff line number Diff line change
Expand Up @@ -1159,7 +1159,7 @@ static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_lfrosc_p
static __inline__ unsigned long int __metal_driver_sifive_fe310_g000_lfrosc_config_reg(const struct metal_clock *clock)
{
if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_6) {
return 112;
return 268435568;
}
else {
return 0;
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8 changes: 4 additions & 4 deletions wit-manifest.json
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
[
{
"commit": "25b6abe2c925248e57958d60f9c95e258df7af4d",
"commit": "1a18125bca36f177caaebaa0ae5e98dcfbb7f977",
"name": "freedom-devicetree-tools",
"source": "[email protected]:sifive/freedom-devicetree-tools.git"
"source": "[email protected]:sctincman/freedom-devicetree-tools.git"
},
{
"commit": "6fd4b0a4e1c12b9ab159aea42fbe5ff7e6f7e81f",
Expand All @@ -25,9 +25,9 @@
"source": "[email protected]:sifive/ldscript-generator.git"
},
{
"commit": "c13d2fc23383cdbef08f4c7e070a5d775eaada71",
"commit": "9761b662d963067a1eaea9f0dbe1fbac332591c2",
"name": "cmsis-svd-generator",
"source": "[email protected]:sifive/cmsis-svd-generator.git"
"source": "[email protected]:sctincman/cmsis-svd-generator.git"
},
{
"commit": "b766f5cd74f6ab0980079dfded145144189e4325",
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