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Software Interrupt Additional Delay #459

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Software Interrupt Additional Delay #459

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a006b67
Update software-interrupt for 5000 cycle count delay
bsousi5 Apr 8, 2020
cb642d4
Update dhrystone to use its own strcmp.S
bsousi5 Apr 15, 2020
3f28da0
Avoid an extra instruction at the top of a function
bsousi5 Apr 21, 2020
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2 changes: 1 addition & 1 deletion software/dhrystone
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Submodule dhrystone updated 2 files
+1 −1 Makefile
+160 −0 strcmp.S
2 changes: 1 addition & 1 deletion software/software-interrupt
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Submodule software-interrupt updated 1 files
+11 −0 software-interrupt.c
4 changes: 2 additions & 2 deletions wit-manifest.json
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Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@
"source": "[email protected]:sifive/esdk-settings-generator.git"
},
{
"commit": "e3e7e91d48ae15f4a8e395cf998b0abbf5b70542",
"commit": "0ddff533cc9052c524990d5ace4560372053314b",
"name": "benchmark-dhrystone",
"source": "[email protected]:sifive/benchmark-dhrystone.git"
},
Expand Down Expand Up @@ -145,7 +145,7 @@
"source": "[email protected]:sifive/example-sifive-welcome.git"
},
{
"commit": "b10a32d2b079e8e454648bd605b49954ed0fd505",
"commit": "b72fda55491be700009954eff9056f8a29a1bbac",
"name": "example-software-interrupt",
"source": "[email protected]:sifive/example-software-interrupt.git"
},
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