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Since this device has CMOS inputs, it is very important to not allow them to float. If the inputs are not driven to either a high VCC state, or a low-GND state, an undesirable larger than expected ICC current may result. Since the input voltage settlement is governed by many factors (for example, capacitance, board-layout, package inductance, surrounding conditions, and so forth), ensuring that they these inputs are kept out of erroneous switching states and tying them to either a high or a low level minimizes the leakage-current.
We need to either connect the input B4 to ground, or tie DIR4 high to make B4 an output.
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From the SN74AVC4T774 datasheet
We need to either connect the input B4 to ground, or tie DIR4 high to make B4 an output.
The text was updated successfully, but these errors were encountered: