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jserv committed Oct 28, 2024
1 parent 4599b1d commit ccb2358
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Showing 4 changed files with 17 additions and 20 deletions.
4 changes: 4 additions & 0 deletions src/jit.c
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,10 @@
* https://github.com/iovisor/ubpf/blob/main/vm/ubpf_jit_arm64.c
*/

#if !RV32_HAS(JIT)
#error "Do not manage to build this file unless you enable JIT support."
#endif

#if !defined(__x86_64__) && !defined(__aarch64__)
#error "This implementation is dedicated to x64 and arm64."
#endif
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4 changes: 1 addition & 3 deletions src/riscv.c
Original file line number Diff line number Diff line change
Expand Up @@ -266,13 +266,11 @@ riscv_t *rv_create(riscv_user_t rv_attr)
}
#if RV32_HAS(SYSTEM)
else {
/*
* TODO: system emulator
/* TODO: Implement the essential functions for system emulation.
* e.g., kernel image, dtb, rootfs
*
* The test suite is compiled into a single ELF file, so load it as
* an ELF executable, just like a userspace ELF.
*
*/
elf_t *elf = elf_new();
assert(elf && elf_open(elf, (attr->data.system)->elf_program));
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1 change: 0 additions & 1 deletion src/syscall.c
Original file line number Diff line number Diff line change
Expand Up @@ -375,7 +375,6 @@ extern void syscall_control_audio(riscv_t *rv);
#endif

#if RV32_HAS(SYSTEM)

/* SBI related system calls */
static void syscall_sbi_timer(riscv_t *rv)
{
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28 changes: 12 additions & 16 deletions src/system.c
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,10 @@
* "LICENSE" for information on usage and redistribution of this file.
*/

#if !RV32_HAS(SYSTEM)
#error "Do not manage to build this file unless you enable system support."
#endif

#include "riscv_private.h"

static bool ppn_is_valid(riscv_t *rv, uint32_t ppn)
Expand Down Expand Up @@ -153,8 +157,7 @@ MMU_FAULT_CHECK_IMPL(write, pagefault_store)
: addr & MASK(RV_PG_SHIFT); \
} while (0)

/*
* The IO handler that operates when the Memory Management Unit (MMU)
/* The IO handler that operates when the Memory Management Unit (MMU)
* is enabled during system emulation is responsible for managing
* input/output operations. These callbacks are designed to implement
* the riscv_io_t interface, ensuring compatibility and consistency to
Expand All @@ -178,9 +181,8 @@ static uint32_t mmu_ifetch(riscv_t *rv, const uint32_t addr)
uint32_t level;
uint32_t *pte = mmu_walk(rv, addr, &level);
bool ok = MMU_FAULT_CHECK(ifetch, rv, pte, addr, PTE_X);
if (unlikely(!ok)) {
if (unlikely(!ok))
pte = mmu_walk(rv, addr, &level);
}

get_ppn_and_offset();
return memory_ifetch(ppn | offset);
Expand All @@ -194,9 +196,8 @@ static uint32_t mmu_read_w(riscv_t *rv, const uint32_t addr)
uint32_t level;
uint32_t *pte = mmu_walk(rv, addr, &level);
bool ok = MMU_FAULT_CHECK(read, rv, pte, addr, PTE_R);
if (unlikely(!ok)) {
if (unlikely(!ok))
pte = mmu_walk(rv, addr, &level);
}

get_ppn_and_offset();
return memory_read_w(ppn | offset);
Expand All @@ -210,9 +211,8 @@ static uint16_t mmu_read_s(riscv_t *rv, const uint32_t addr)
uint32_t level;
uint32_t *pte = mmu_walk(rv, addr, &level);
bool ok = MMU_FAULT_CHECK(read, rv, pte, addr, PTE_R);
if (unlikely(!ok)) {
if (unlikely(!ok))
pte = mmu_walk(rv, addr, &level);
}

get_ppn_and_offset();
return memory_read_s(ppn | offset);
Expand All @@ -226,9 +226,8 @@ static uint8_t mmu_read_b(riscv_t *rv, const uint32_t addr)
uint32_t level;
uint32_t *pte = mmu_walk(rv, addr, &level);
bool ok = MMU_FAULT_CHECK(read, rv, pte, addr, PTE_R);
if (unlikely(!ok)) {
if (unlikely(!ok))
pte = mmu_walk(rv, addr, &level);
}

get_ppn_and_offset();
return memory_read_b(ppn | offset);
Expand All @@ -242,9 +241,8 @@ static void mmu_write_w(riscv_t *rv, const uint32_t addr, const uint32_t val)
uint32_t level;
uint32_t *pte = mmu_walk(rv, addr, &level);
bool ok = MMU_FAULT_CHECK(write, rv, pte, addr, PTE_W);
if (unlikely(!ok)) {
if (unlikely(!ok))
pte = mmu_walk(rv, addr, &level);
}

get_ppn_and_offset();
memory_write_w(ppn | offset, (uint8_t *) &val);
Expand All @@ -258,9 +256,8 @@ static void mmu_write_s(riscv_t *rv, const uint32_t addr, const uint16_t val)
uint32_t level;
uint32_t *pte = mmu_walk(rv, addr, &level);
bool ok = MMU_FAULT_CHECK(write, rv, pte, addr, PTE_W);
if (unlikely(!ok)) {
if (unlikely(!ok))
pte = mmu_walk(rv, addr, &level);
}

get_ppn_and_offset();
memory_write_s(ppn | offset, (uint8_t *) &val);
Expand All @@ -274,9 +271,8 @@ static void mmu_write_b(riscv_t *rv, const uint32_t addr, const uint8_t val)
uint32_t level;
uint32_t *pte = mmu_walk(rv, addr, &level);
bool ok = MMU_FAULT_CHECK(write, rv, pte, addr, PTE_W);
if (unlikely(!ok)) {
if (unlikely(!ok))
pte = mmu_walk(rv, addr, &level);
}

get_ppn_and_offset();
memory_write_b(ppn | offset, (uint8_t *) &val);
Expand Down

1 comment on commit ccb2358

@jserv
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@jserv jserv commented on ccb2358 Oct 28, 2024

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Benchmarks

Benchmark suite Current: ccb2358 Previous: 6317605 Ratio
Dhrystone 1539 Average DMIPS over 10 runs 1422 Average DMIPS over 10 runs 0.92
Coremark 1407.86 Average iterations/sec over 10 runs 1431.449 Average iterations/sec over 10 runs 1.02

This comment was automatically generated by workflow using github-action-benchmark.

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