Intrinsics/Builtins: Support more powerful intrinsics selection

[PhilippvK]

When writing the YAML settings for the intrinsics defined for the Core-V Extension (Spec: https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md) I found quite a lot of use cases we can not cover right now.

Some of these might not be possible to solve without introducing pseudo-intructions and custom "expand-pseudos" passes but we should discuss which solutions would be possible to achieve without too much efforts to cover the most important needs.

Use Case A: Shared intrinsics for reg/imm variant of intruction

Use Case A.1: Select imm only if power of two

Example: int32_t __builtin_riscv_cv_alu_clip (int32_t i, uint32_t j)

Argument/result mapping:

Case a) where j is constant and j + 1 is an exact power of 2 up to 2^30

• result: rD
• i: rs1
• j: Is2 (5-bit unsigned value)

or case b)

• result: rD where j + 1 is not a power of 2
• i: rs1
• j: rs2.

Note: In case a), Is2 = log2 (j + 1) + 1.

Generated assembler:

Case a)

cv.clip  rD,rs1,Is2

or case b)

cv.clipr  rD,rs1,rs2

Use Case A.2: Select imm only if fits in range

Example: int32_t __builtin_riscv_cv_alu_addN (int32_t x, int32_t y, uint8_t shft)

Argument/result mapping:

Case a) shft is a constant in the range 0 <= shft <= 31

• result: rD
• x: rs1
• y: rs2
• shft: Is3 (5-bit unsigned value)

or case b)

• result, x: rD
• y: rs1
• shft: rs2

Generated assembler:

Case a)

cv.addN  rD,rs1,rs2,Is3

or case b)

cv.addNr  rD,rs1,rs2

Use Case B: Combination of multiple imm operands in a single argument

Example: uint32_t __builtin_riscv_cv_bitmanip_insert (uint32_t i, uint16_t range, uint32_t k)

Case a) range is a constant and (range[9:5] + range [4:0]) <= 32

• result, k: rD
• i: rs1
• range[4:0]: Is2 (5-bit unsigned value)
• range[9:5]: Is3 (5-bit unsigned value)

or case b)

• result, k: rD
• i: rs1
• range: rs2

Generated assembler:

Case a)

cv.insert  rD,rs1,Is3,Is2

or case b)

cv.insertr  rD,rs1,rs2

Use Case C: Select intruction based on argument values

Example: uint32_t __builtin_riscv_cv_simd_shuffle_sci_b (uint32_t i, const uint8_t flgs)

Argument/result mapping:

• result, k: rD
• i: rs1
• flgs[5:0]: Is2 (6-bit unsigned value)

Generated assembler:

cv.shuffleI0.sci.b  rD,rs1,Is2   ;; flgs[7:6] = 0
cv.shuffleI1.sci.b  rD,rs1,Is2   ;; flgs[7:6] = 1
cv.shuffleI2.sci.b  rD,rs1,Is2   ;; flgs[7:6] = 2
cv.shuffleI3.sci.b  rD,rs1,Is2   ;; flgs[7:6] = 3