In this lecture we will review behavioral logic design in SystemVerilog including flip-flops, registers, and counters.
- Review chapters 17 and 19 from Dr. Nelson's textbook.
- always_comb, always_ff blocks
- Synchronous and asynchronous resets
- Current state/next state styles
- Simple FF (D, T, JK, SR) in behavioral SystemVerilog
- Counters
- Shift registers
- Memories