HDL-Sandbox

A place for my HDL codes, such as answers to question in textbooks, projects or anything.

Implemented Designs:

• SystemVerilog

  • RC4 Cipher

• Verilog

  • UART (TX, RX, Controller)
  • FIFO
  • LIFO
  • Stopwatch with up & down functionality
  • Programmable Square Wave Generator
  • Multi Barrel Shifter (Right & Left)
  • BCD Incrementor
  • Dual Priority Encoder
  • Dual Edge Detector (Moore & Mealy)

• VHDL

  • Carry Propagation Adders
    • Carry-Lookahead Adder
    • Ripple Carry Adder
    • Full & Half Adders
  • ALU
  • Comparators
    • Equality Comparator
    • Magnitude Comparator
  • Subtractor