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Add support for flen=64 #49

Merged
merged 13 commits into from
Oct 10, 2023
Merged

Add support for flen=64 #49

merged 13 commits into from
Oct 10, 2023

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AntonLydike
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Currently still missing a lot of the D extension (all except fmadd, fmsub, fnmsub, fnmadd, fadd, fsub, fmul, fdiv, fsqrt, fsgnj, fsgnjn, fsgnjx, fmin, fmax, feq, flt, fle, fld, fsd), missing conversion and move instructions.

This may break some of the float32 stuff, so we should be very careful with this.

Todos:

  • Running with --flen=32 breaks because it tries to load the D extension but can't
  • Write changelog
  • Maybe refactor out some misc bugfixes in this

@AntonLydike AntonLydike added the enhancement New feature or request label Oct 9, 2023
@AntonLydike AntonLydike self-assigned this Oct 9, 2023
@AntonLydike
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@superlopuh any instructions you are missing so far?

@AntonLydike AntonLydike merged commit 9015094 into master Oct 10, 2023
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Joshy-R pushed a commit to Joshy-R/riscemu that referenced this pull request Oct 13, 2023
Currently still missing a lot of the D extension (all except `fmadd, fmsub, fnmsub, fnmadd, fadd, fsub, fmul, fdiv, fsqrt, fsgnj, fsgnjn, fsgnjx, fmin, fmax, feq, flt, fle, fld, fsd`), missing conversion and move instructions.

This may break some of the float32 stuff, so we should be very careful with this.
AntonLydike added a commit that referenced this pull request May 14, 2024
* fix jarl argument assertion bug

* fix mulh bug

* implement mulhsu and mulhu

* Fix typos and add codespell pre-commit hook (#45)

* Fix typos

Found via `codespell -L fle,sie`

* Update riscemu/decoder/__main__.py

Co-authored-by: Anton Lydike <[email protected]>

* Remove codespell

---------

Co-authored-by: Anton Lydike <[email protected]>

* Add p2align assembler directive (#46)

* add p2align assembler directive

* black

* add p2align to changelog

* Big cleanup work (#47)

This moves a lot of internal data structures from `types` into `core`, because some imports got confused apparently.

It also adds csr registers, performance improvements, etc.

* release 2.2.0

* fix python publish

* official bump commit

* a bunch of minor fixes

* version bump 2.2.2

* Add support for flen=64 (#49)

Currently still missing a lot of the D extension (all except `fmadd, fmsub, fnmsub, fnmadd, fadd, fsub, fmul, fdiv, fsqrt, fsgnj, fsgnjn, fsgnjx, fmin, fmax, feq, flt, fle, fld, fsd`), missing conversion and move instructions.

This may break some of the float32 stuff, so we should be very careful with this.

* fix a few minor errors

* fix a bug with libc not being found by packaged versions of riscemu

* update pyelftools, add importlib-resources as dependency

* fix issue with importlib.resources not working on python 3.8

* add missing float registers

* update changelog

* Snitch frep extension support (#50)

This patch adds the frep extension to the snitch emulator. Register staggering is not supported currently, but could be added at a later date.

This patch also adds f64 support to the xssr extension.

* release 2.2.4

* fix SimpleInstruction.get_imm and add test

* release 2.2.5

* add filecheck test

* Fix error from merge

* fix filecheck to print unsigned values when needed

---------

Co-authored-by: Kian-Meng Ang <[email protected]>
Co-authored-by: Anton Lydike <[email protected]>
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